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c00000000005870c t slice_area_is_free.part.4 c000000000058798 T slice_get_unmapped_area c000000000058e70 T arch_get_unmapped_area c000000000058e98 T arch_get_unmapped_area_topdown c000000000058ec0 T slice_set_user_psize c000000000058fbc T slice_set_range_psize c000000000059034 T is_hugepage_only_range c000000000059110 T __find_linux_pte c000000000059358 T huge_pte_offset c000000000059370 T huge_pte_alloc c00000000005974c T hugetlb_free_pgd_range c000000000059bcc T follow_huge_pd c000000000059d8c T hugetlb_get_unmapped_area c000000000059e20 T vma_mmu_pagesize c000000000059e78 T flush_dcache_icache_hugepage c000000000059f1c T gup_hugepte c00000000005a0e4 T gup_huge_pd c00000000005a1e4 T __hash_page_huge c00000000005a54c T __hash_page_thp c00000000005a9e4 t subpage_walk_pmd_entry c00000000005aa84 t hpte_flush_range c00000000005acf8 T subpage_prot_free c00000000005adc8 T subpage_prot_init_new_context c00000000005ae00 T sys_subpage_prot c00000000005b22c T copro_handle_mm_fault c00000000005b380 T copro_calculate_slb c00000000005b6d0 T copro_flush_all_slbs c00000000005b6fc T mm_iommu_preregistered c00000000005b710 T mm_iommu_lookup_rm c00000000005b754 T mm_iommu_lookup c00000000005b760 T mm_iommu_find c00000000005b798 T mm_iommu_ua_to_hpa c00000000005b7d8 T mm_iommu_mapped_inc c00000000005b810 T mm_iommu_mapped_dec c00000000005b844 T new_iommu_non_cma_page c00000000005b89c t mm_iommu_free c00000000005b968 T mm_iommu_ua_to_hpa_rm c00000000005b9f0 T mm_iommu_put c00000000005bb28 T mm_iommu_get c00000000005bfe0 T mm_iommu_init c00000000005bff0 T strncpy c00000000005c03c T strncmp c00000000005c074 T memchr c00000000005c0a8 T zalloc_maybe_bootmem c00000000005c118 t __patch_instruction c00000000005c144 T patch_instruction c00000000005c150 T is_conditional_branch c00000000005c190 T is_offset_in_branch_range c00000000005c1bc T create_branch c00000000005c220 T patch_branch c00000000005c25c T create_cond_branch c00000000005c2a0 T instr_is_relative_branch c00000000005c2c8 T instr_is_relative_link_branch c00000000005c304 T branch_target c00000000005c358 T instr_is_branch_to_addr c00000000005c3a8 T translate_branch c00000000005c444 t patch_feature_section c00000000005c54c T do_feature_fixups c00000000005c5d0 T do_stf_entry_barrier_fixups c00000000005c760 T do_stf_exit_barrier_fixups c00000000005c914 T do_stf_barrier_fixups c00000000005c94c T do_rfi_flush_fixups c00000000005cacc T do_lwsync_fixups c00000000005cb40 T __csum_partial c00000000005ccc4 T csum_partial_copy_generic c00000000005cef0 T csum_and_copy_to_user c00000000005cfd8 T csum_and_copy_from_user c00000000005d0d4 t read_mem c00000000005d270 t write_mem c00000000005d3d8 T emulate_dcbz c00000000005d478 t do_fp_load c00000000005d6e0 t do_fp_store c00000000005d924 T emulate_vsx_load c00000000005dc38 T emulate_vsx_store c00000000005decc T analyse_instr c000000000060fe8 T emulate_loadstore c000000000061fa8 T emulate_update_regs c00000000006216c T emulate_step c00000000006262c T get_fpr c000000000062768 T put_fpr c0000000000628a4 T get_vr c0000000000629e0 T put_vr c000000000062b1c T get_vsr c000000000062d3c T put_vsr c000000000062f5c T load_vsrn c000000000062fb4 T store_vsrn c000000000063004 T conv_sp_to_dp c000000000063030 T conv_dp_to_sp c00000000006305c T do_lq c000000000063078 T do_stq c00000000006308c T do_lqarx c0000000000630a8 T do_stqcx c0000000000630c4 T ftr_fixup_test1 c0000000000630d0 T end_ftr_fixup_test1 c0000000000630d0 T ftr_fixup_test1_orig c0000000000630dc T ftr_fixup_test1_expected c0000000000630e8 T ftr_fixup_test2 c0000000000630f4 T end_ftr_fixup_test2 c0000000000630f4 T ftr_fixup_test2_orig c000000000063100 T ftr_fixup_test2_alt c000000000063104 T ftr_fixup_test2_expected c000000000063110 T ftr_fixup_test3 c00000000006311c T end_ftr_fixup_test3 c00000000006311c T ftr_fixup_test3_orig c000000000063128 T ftr_fixup_test3_alt c000000000063130 T ftr_fixup_test4 c000000000063148 T end_ftr_fixup_test4 c000000000063148 T ftr_fixup_test4_expected c000000000063160 T ftr_fixup_test4_orig c000000000063178 T ftr_fixup_test4_alt c000000000063180 T ftr_fixup_test5 c0000000000631a4 T end_ftr_fixup_test5 c0000000000631a4 T ftr_fixup_test5_expected c0000000000631c8 T ftr_fixup_test6 c0000000000631f0 T end_ftr_fixup_test6 c0000000000631f0 T ftr_fixup_test6_expected c000000000063218 T ftr_fixup_test_FTR_macros c0000000000633c4 T ftr_fixup_test_FTR_macros_expected c000000000063570 T ftr_fixup_test_FW_FTR_macros c00000000006371c T ftr_fixup_test_FW_FTR_macros_expected c0000000000638c8 T lwsync_fixup_test c0000000000638d0 T end_lwsync_fixup_test c0000000000638d0 T lwsync_fixup_test_expected_LWSYNC c0000000000638d8 T lwsync_fixup_test_expected_SYNC c000000000063a7c T __xor_altivec_2 c000000000063aec T __xor_altivec_3 c000000000063b7c T __xor_altivec_4 c000000000063c2c T __xor_altivec_5 c000000000063cfc T xor_altivec_2 c000000000063d68 T xor_altivec_3 c000000000063ddc T xor_altivec_4 c000000000063e58 T xor_altivec_5 c000000000063edc T copy_page c000000000064080 T __copy_tofrom_user c00000000006408c T __copy_tofrom_user_base c000000000064600 T __memset16 c000000000064604 T __memset32 c000000000064608 T __memset64 c000000000064618 T memset c00000000006471c T memmove c000000000064730 T backwards_memcpy c0000000000647c8 T __arch_hweight8 c0000000000647d4 T __arch_hweight16 c0000000000647e8 T __arch_hweight32 c000000000064804 T __arch_hweight64 c000000000064914 T __copy_tofrom_user_power7 c0000000000650e0 T __clear_user c000000000065240 T copypage_power7 c000000000065400 T memcpy_power7 c000000000065c00 T memcpy c000000000065c30 T memcmp c000000000065e64 T enter_vmx_usercopy c000000000065ebc T exit_vmx_usercopy c000000000065f2c T enter_vmx_copy c000000000065f74 T exit_vmx_copy c000000000065fbc t mpic_mask_ipi c000000000065fc0 t mpic_end_ipi c000000000066024 T mpic_end_irq c000000000066030 t mpic_host_xlate c000000000066144 T mpic_get_coreint_irq c00000000006614c t mpic_suspend c00000000006627c t mpic_resume c000000000066390 T mpic_unmask_irq c000000000066518 T mpic_mask_irq c0000000000666a0 T mpic_set_affinity c00000000006682c t mpic_host_match c00000000006689c t mpic_unmask_ipi c000000000066974 t mpic_unmask_tm c000000000066a84 t mpic_mask_tm c000000000066b94 t _mpic_get_one_irq c000000000066d8c t mpic_init_sys c000000000066e00 T mpic_set_irq_type c000000000067004 t fsl_mpic_get_version c000000000067058 T mpic_set_vector c00000000006717c T fsl_mpic_primary_get_version c0000000000671a0 T mpic_irq_set_priority c000000000067464 t mpic_host_map c0000000000676e8 T mpic_setup_this_cpu c0000000000678c0 T mpic_cpu_get_priority c000000000067938 T mpic_cpu_set_priority c0000000000679a8 T mpic_teardown_this_cpu c000000000067bb8 T mpic_get_one_irq c000000000067bc8 t mpic_cascade c000000000067c38 T mpic_get_irq c000000000067c58 T mpic_get_mcirq c000000000067c7c T mpic_request_ipis c000000000067d28 T smp_mpic_message_pass c000000000067e0c T smp_mpic_setup_cpu c000000000067e18 T mpic_reset_core c000000000067fc8 t _mpic_map_mmio.isra.3 c00000000006800c T mpic_msi_reserve_hwirq c00000000006804c T mpic_msi_init_allocator c000000000068108 t u3msi_teardown_msi_irqs c00000000006818c t mpic_u3msi_unmask_irq c0000000000681c4 t mpic_u3msi_mask_irq c0000000000681fc t find_u4_magic_addr c000000000068278 t find_ht_magic_addr.isra.0 c000000000068344 t u3msi_setup_msi_irqs c0000000000684a8 T mpic_u3msi_init c000000000068540 T msi_bitmap_alloc_hwirqs c000000000068618 T msi_bitmap_free_hwirqs c000000000068678 T msi_bitmap_reserve_hwirq c0000000000686d4 T msi_bitmap_reserve_dt_hwirqs c000000000068824 T msi_bitmap_free c000000000068874 T msi_bitmap_alloc c000000000068934 t i8259_host_xlate c000000000068978 t i8259_mask_and_ack_irq c000000000068c14 t i8259_host_match c000000000068c84 t i8259_host_map c000000000068cfc t i8259_set_irq_mask.isra.0 c000000000068dbc t i8259_mask_irq c000000000068e54 t i8259_unmask_irq c000000000068eec T i8259_irq c000000000069280 T i8259_get_host c000000000069294 T i8259_init c0000000000697d4 T scom_find_parent c000000000069884 T scom_map_device c000000000069a20 t xics_host_match c000000000069a9c t xics_ipi_mask c000000000069aa0 t xics_host_xlate c000000000069ad4 t xics_host_map c000000000069b84 t xics_ipi_unmask c000000000069b88 T xics_update_irq_servers c000000000069c74 T xics_set_cpu_giq c000000000069d14 T xics_setup_cpu c000000000069d70 T xics_mask_unknown_vec c000000000069dec T xics_teardown_cpu c000000000069e64 T xics_kexec_teardown_cpu c000000000069ee0 T xics_migrate_irqs_away c00000000006a104 T xics_get_irq_server c00000000006a1f4 T xics_set_irq_type c00000000006a258 T xics_retrigger c00000000006a2a4 t icp_native_teardown_cpu c00000000006a2d8 t icp_native_flush_ipi c00000000006a310 t icp_native_cause_ipi c00000000006a358 T xics_wake_cpu c00000000006a388 t icp_native_set_cpu_priority c00000000006a3e4 T icp_native_eoi c00000000006a468 t icp_native_ipi_action c00000000006a4d8 t icp_native_get_irq c00000000006a5ec T icp_native_cause_ipi_rm c00000000006a620 T icp_native_flush_interrupt c00000000006a718 t icp_hv_teardown_cpu c00000000006a7a0 t icp_hv_flush_ipi c00000000006a830 t icp_hv_cause_ipi c00000000006a8b8 t icp_hv_ipi_action c00000000006a948 t icp_hv_eoi c00000000006aa2c t icp_hv_set_cpu_priority c00000000006aab4 t icp_hv_get_irq c00000000006ac38 T icp_hv_init c00000000006acb4 t ics_rtas_host_match c00000000006acf4 t ics_rtas_get_server c00000000006ad4c t ics_rtas_map c00000000006ae0c t ics_rtas_set_affinity c00000000006af2c t ics_rtas_unmask_irq c00000000006b014 t ics_rtas_startup c00000000006b05c t ics_rtas_mask_real_irq c00000000006b11c t ics_rtas_mask_unknown c00000000006b12c t ics_rtas_mask_irq c00000000006b148 t ics_opal_host_match c00000000006b150 t ics_opal_get_server c00000000006b1a4 t ics_opal_mask_real_irq c00000000006b210 t ics_opal_mask_unknown c00000000006b258 t ics_opal_mask_irq c00000000006b274 t ics_opal_map c00000000006b324 t ics_opal_set_affinity c00000000006b43c t ics_opal_unmask_irq c00000000006b4cc t ics_opal_startup c00000000006b514 t icp_opal_cause_ipi c00000000006b568 t icp_opal_teardown_cpu c00000000006b5a0 t icp_opal_ipi_action c00000000006b600 t icp_opal_flush_ipi c00000000006b640 t icp_opal_set_cpu_priority c00000000006b6a4 t icp_opal_eoi c00000000006b734 t icp_opal_get_xirr c00000000006b78c t icp_opal_get_irq c00000000006b860 T icp_opal_flush_interrupt c00000000006b908 T icp_opal_init c00000000006b97c T is_xive_irq c00000000006b99c t xive_ipi_do_nothing c00000000006b9a0 t xive_irq_domain_xlate c00000000006b9d4 t xive_irq_domain_match c00000000006ba1c t xive_cleanup_cpu_queues c00000000006ba7c t xive_setup_cpu c00000000006bb0c t xive_esb_read c00000000006bbcc t xive_cause_ipi c00000000006bc20 t xive_irq_set_type c00000000006bd18 t xive_dec_target_count c00000000006bdbc t xive_find_target_in_mask c00000000006bf84 t xive_scan_interrupts c00000000006c0e4 t xive_get_irq c00000000006c154 T xive_cleanup_irq_data c00000000006c1c8 t xive_muxed_ipi_action c00000000006c1f4 t xive_prepare_cpu c00000000006c308 t xive_irq_domain_unmap c00000000006c398 t xive_do_source_set_mask.part.0 c00000000006c3cc t xive_irq_mask c00000000006c458 t xive_irq_shutdown c00000000006c514 t xive_cleanup_cpu_ipi.part.1 c00000000006c59c t xive_pick_irq_target.isra.2 c00000000006c6e8 t xive_irq_set_affinity c00000000006c880 t xive_irq_domain_map c00000000006c990 t xive_do_source_set_mask.constprop.6 c00000000006c9b0 t xive_irq_startup c00000000006cadc t xive_setup_cpu_ipi c00000000006cc20 t xive_irq_unmask c00000000006ccb0 T xmon_xive_do_dump c00000000006cda8 T xive_do_source_eoi c00000000006cee4 t xive_irq_set_vcpu_affinity c00000000006d070 t xive_irq_retrigger c00000000006d0d4 t xive_irq_eoi c00000000006d14c t xive_flush_cpu_queue.isra.5 c00000000006d214 t xive_ipi_eoi c00000000006d274 T xive_smp_setup_cpu c00000000006d298 T xive_smp_prepare_cpu c00000000006d2e0 T xive_smp_disable_cpu c00000000006d380 T xive_flush_interrupt c00000000006d39c T xive_teardown_cpu c00000000006d464 T xive_kexec_teardown_cpu c00000000006d52c T xive_shutdown c00000000006d56c T xive_queue_page_alloc c00000000006d63c T xive_native_default_eq_shift c00000000006d650 T xive_native_populate_irq_data c00000000006d7f8 T xive_native_configure_irq c00000000006d864 T xive_native_configure_queue c00000000006d9b8 T xive_native_alloc_irq c00000000006da14 T xive_native_free_irq c00000000006da5c T xive_native_sync_source c00000000006da90 t xive_native_shutdown c00000000006dac0 t xive_native_eoi c00000000006daec t xive_native_update_pending c00000000006dbb4 t xive_native_match c00000000006dbf4 t xive_native_teardown_cpu c00000000006dc7c T xive_native_enable_vp c00000000006dcdc T xive_native_disable_vp c00000000006dd3c t xive_native_setup_cpu c00000000006de74 T xive_native_get_vp_info c00000000006dee0 t xive_native_setup_queue c00000000006df88 t xive_native_get_ipi c00000000006e04c T xive_native_alloc_vp_block c00000000006e158 t __xive_native_disable_queue.isra.0 c00000000006e1d4 T xive_native_disable_queue c00000000006e1e4 t xive_native_cleanup_queue c00000000006e270 t xive_native_put_ipi c00000000006e2cc T xive_native_free_vp_block c00000000006e318 t xive_spapr_match c00000000006e320 t xive_spapr_put_ipi c00000000006e3fc t xive_spapr_eoi c00000000006e400 t xive_spapr_teardown_cpu c00000000006e404 t xive_spapr_get_ipi c00000000006e514 t xive_spapr_esb_rw c00000000006e598 t xive_spapr_shutdown c00000000006e5e4 t xive_spapr_update_pending c00000000006e680 t xive_spapr_sync_source c00000000006e6d4 t xive_spapr_setup_queue c00000000006e884 t xive_spapr_configure_irq c00000000006e8fc t xive_spapr_populate_irq_data c00000000006ea58 t xive_spapr_setup_cpu c00000000006ea5c t xive_spapr_cleanup_queue c00000000006eb3c t pnv_progress c00000000006eb40 t pnv_memory_block_size c00000000006eb48 t pnv_shutdown c00000000006eb7c t pnv_get_proc_freq c00000000006ebc0 t pnv_show_cpuinfo c00000000006ec8c t pnv_power_off c00000000006ed0c t pnv_halt c00000000006ed24 t pnv_kexec_cpu_down c00000000006eec4 t pnv_restart c00000000006ef40 t fw_feature_is c00000000006efac t opal_return c00000000006effc t opal_real_call c00000000006f02c t opal_return_realmode c00000000006f074 t opal_tracepoint_entry c00000000006f11c t opal_tracepoint_return c00000000006f140 T opal_invalid_call c00000000006f1a8 T opal_console_write c00000000006f210 T opal_console_read c00000000006f278 T opal_console_write_buffer_space c00000000006f2e0 T opal_rtc_read c00000000006f348 T opal_rtc_write c00000000006f3b0 T opal_cec_power_down c00000000006f418 T opal_cec_reboot c00000000006f480 T opal_cec_reboot2 c00000000006f4e8 T opal_read_nvram c00000000006f550 T opal_write_nvram c00000000006f5b8 T opal_handle_interrupt c00000000006f620 T opal_poll_events c00000000006f688 T opal_pci_set_hub_tce_memory c00000000006f6f0 T opal_pci_set_phb_tce_memory c00000000006f758 T opal_pci_config_read_byte c00000000006f7c0 T opal_pci_config_read_half_word c00000000006f828 T opal_pci_config_read_word c00000000006f890 T opal_pci_config_write_byte c00000000006f8f8 T opal_pci_config_write_half_word c00000000006f960 T opal_pci_config_write_word c00000000006f9c8 T opal_set_xive c00000000006fa30 T opal_get_xive c00000000006fa98 T opal_register_exception_handler c00000000006fb00 T opal_pci_eeh_freeze_status c00000000006fb68 T opal_pci_eeh_freeze_clear c00000000006fbd0 T opal_pci_eeh_freeze_set c00000000006fc38 T opal_pci_err_inject c00000000006fca0 T opal_pci_shpc c00000000006fd08 T opal_pci_phb_mmio_enable c00000000006fd70 T opal_pci_set_phb_mem_window c00000000006fdd8 T opal_pci_map_pe_mmio_window c00000000006fe40 T opal_pci_set_phb_table_memory c00000000006fea8 T opal_pci_set_pe c00000000006ff10 T opal_pci_set_peltv c00000000006ff78 T opal_pci_set_mve c00000000006ffe0 T opal_pci_set_mve_enable c000000000070048 T opal_pci_get_xive_reissue c0000000000700b0 T opal_pci_set_xive_reissue c000000000070118 T opal_pci_set_xive_pe c000000000070180 T opal_get_xive_source c0000000000701e8 T opal_get_msi_32 c000000000070250 T opal_get_msi_64 c0000000000702b8 T opal_start_cpu c000000000070320 T opal_query_cpu_status c000000000070388 T opal_write_oppanel c0000000000703f0 T opal_pci_map_pe_dma_window c000000000070458 T opal_pci_map_pe_dma_window_real c0000000000704c0 T opal_pci_reset c000000000070528 T opal_pci_get_hub_diag_data c000000000070590 T opal_pci_get_phb_diag_data c0000000000705f8 T opal_pci_fence_phb c000000000070660 T opal_pci_reinit c0000000000706c8 T opal_pci_mask_pe_error c000000000070730 T opal_set_slot_led_status c000000000070798 T opal_get_epow_status c000000000070800 T opal_get_dpo_status c000000000070868 T opal_set_system_attention_led c0000000000708d0 T opal_pci_next_error c000000000070938 T opal_pci_poll c0000000000709a0 T opal_pci_msi_eoi c000000000070a08 T opal_pci_get_phb_diag_data2 c000000000070a70 T opal_xscom_read c000000000070ad8 T opal_xscom_write c000000000070b40 T opal_lpc_read c000000000070ba8 T opal_lpc_write c000000000070c10 T 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