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hash__tlb_flush c00000000007ad20 T __flush_hash_table_range c00000000007ae80 T flush_tlb_pmd_range c00000000007b080 t ___tlbie c00000000007b140 t native_hpte_clear c00000000007b330 t __tlbiel c00000000007b470 t native_hpte_remove c00000000007b590 t native_hpte_insert c00000000007b750 t native_hpte_find c00000000007b8d0 t native_flush_hash_range c00000000007bff0 t tlbie c00000000007c290 t native_hpte_removebolted c00000000007c4a0 t native_hpte_updatepp c00000000007c6a0 t native_hpte_updateboltedpp c00000000007c8e0 t native_hugepage_invalidate c00000000007cbd0 t native_hpte_invalidate c00000000007cda0 T hash__tlbiel_all c00000000007cf00 t radix_enabled c00000000007cf20 t __map_kernel_page c00000000007d610 T radix__map_kernel_page c00000000007d630 T setup_kuep c00000000007d6d0 T setup_kuap c00000000007d770 T radix__early_init_mmu_secondary c00000000007d850 T radix__mmu_cleanup_all c00000000007d8c0 T radix__pmd_hugepage_update c00000000007d9e0 T radix__pmdp_collapse_flush c00000000007da50 T radix__pgtable_trans_huge_deposit c00000000007db70 T radix__pgtable_trans_huge_withdraw c00000000007dc50 T radix__pmdp_huge_get_and_clear c00000000007dcb0 T radix__ptep_set_access_flags c00000000007ddc0 T radix__ptep_modify_prot_commit c00000000007dea0 T p4d_free_pud_page c00000000007deb0 T pud_set_huge c00000000007df40 T pud_clear_huge c00000000007df70 T pud_free_pmd_page c00000000007e0c0 T pmd_set_huge c00000000007e150 T pmd_clear_huge c00000000007e180 T pmd_free_pte_page c00000000007e210 t early_alloc_pgtable c00000000007e2ec t pte_update.constprop.0.isra.0 c00000000007e3c0 t pseries_rpt_invalidate.part.0 c00000000007e3d0 t do_tlbiel_kernel c00000000007e530 T radix__flush_pwc_lpid c00000000007e600 t __tlbie_va_range c00000000007e860 T radix__flush_tlb_lpid_page c00000000007ead0 t do_exit_flush_lazy_tlb c00000000007ed10 T radix__local_flush_tlb_mm c00000000007ee90 t do_tlbiel_va_range c00000000007f050 T radix__flush_all_lpid c00000000007f260 t do_tlbiel_va c00000000007f420 t _tlbie_pid c00000000007f6b0 t do_tlbiel_pid c00000000007f9d0 t _tlbiel_va_range_multicast c00000000007fd30 T radix_kvm_prefetch_workaround c00000000007ffa0 t __flush_all_mm c000000000080480 T radix__flush_all_mm c000000000080490 T radix__flush_tlb_mm c000000000080960 T radix__flush_tlb_kernel_range c000000000080c40 T radix__flush_tlb_range c0000000000815a0 T radix__tlbiel_all c0000000000816f0 T radix__local_flush_tlb_page_psize c0000000000817d0 T radix__local_flush_tlb_page c000000000081830 T radix__flush_tlb_page_psize c000000000081f50 T radix__flush_tlb_page c000000000081fb0 T radix__flush_all_lpid_guest c0000000000821c0 T radix__flush_tlb_range_psize c000000000082770 T radix__tlb_flush c000000000083210 T radix__flush_pmd_tlb_range c000000000083230 T radix__flush_tlb_collapsed_pmd c0000000000837f0 T radix__flush_tlb_all c000000000083820 T __rpte_sub_valid c000000000083840 T __hash_page_4K c000000000083dc0 T __hash_page_64K c000000000084280 T __hash_page_huge c000000000084650 T huge_ptep_modify_prot_start c000000000084790 T huge_ptep_modify_prot_commit c0000000000847e0 T hugetlbpage_init_default c000000000084840 T radix__flush_hugetlb_page c000000000084970 T radix__local_flush_hugetlb_page c000000000084aa0 T radix__flush_hugetlb_tlb_range c000000000084be0 T radix__hugetlb_get_unmapped_area c000000000084ea0 T radix__huge_ptep_modify_prot_commit c000000000084f90 T __hash_page_thp c0000000000854f0 t subpage_walk_pmd_entry c000000000085640 t hpte_flush_range c0000000000859a0 T __se_sys_subpage_prot c0000000000859a0 T sys_subpage_prot c000000000086060 T subpage_prot_free c000000000086190 T mm_iommu_preregistered c0000000000861b0 T mm_iommu_lookup c000000000086210 T mm_iommu_ua_to_hpa c000000000086290 T mm_iommu_is_devmem c000000000086310 T mm_iommu_mapped_inc c000000000086360 T mm_iommu_get c000000000086450 T mm_iommu_put c0000000000865c0 t mm_iommu_do_alloc c000000000086b00 T mm_iommu_new c000000000086b20 T mm_iommu_newdev c000000000086b30 t mm_iommu_free c000000000086c70 T mm_iommu_mapped_dec c000000000086cb0 T mm_iommu_lookup_rm c000000000086d10 T mm_iommu_ua_to_hpa_rm c000000000086df0 T mm_iommu_ua_mark_dirty_rm c000000000086ea0 T mm_iommu_init c000000000086eb0 T pkey_mm_init c000000000086ee0 T __arch_set_user_pkey_access c000000000086fa0 T thread_pkey_regs_save c000000000086fe0 T thread_pkey_regs_restore c000000000087030 T thread_pkey_regs_init c000000000087080 T execute_only_pkey c000000000087090 T __arch_override_mprotect_pkey c000000000087140 T arch_pte_access_permitted c000000000087210 T arch_vma_access_permitted c000000000087300 T arch_dup_pkeys c000000000087320 t arch_set_bit c000000000087360 t ppc_numa_cpu_dead c000000000087470 t read_n_cells c0000000000874c0 T __node_distance c000000000087570 t initialize_distance_lookup_table.part.0 c0000000000875e0 t associativity_to_nid c0000000000876a0 t of_node_to_nid_single c000000000087700 t map_cpu_to_node c0000000000877e0 T of_node_to_nid c0000000000878d0 t numa_setup_cpu c000000000087c00 t ppc_numa_cpu_prepare c000000000087d10 T cpu_distance c000000000087d90 T of_drconf_to_nid_single c000000000087fb0 T hot_add_scn_to_nid c000000000088470 T memory_hotplug_max c000000000088538 t node_set_online c000000000088590 T get_slice_psize c0000000000885f0 t slice_range_to_mask c000000000088710 t slice_scan_available c0000000000887c0 t slice_flush_segments c000000000088820 t slice_check_range_fits.constprop.0 c000000000088970 t slice_find_area_bottomup.constprop.0 c000000000088b70 t slice_find_area_topdown c000000000088e40 t slice_convert c000000000089130 T slice_get_unmapped_area c000000000089b50 T arch_get_unmapped_area c000000000089b80 T arch_get_unmapped_area_topdown c000000000089bb0 T slice_init_new_context_exec c000000000089d60 T slice_setup_new_exec c000000000089dc0 T slice_set_range_psize c000000000089e50 T slice_is_hugepage_only_range c000000000089f70 t radix_enabled c000000000089f90 t mmu_psize_to_shift.part.0 c000000000089fa0 T huge_pte_offset c000000000089fe0 T huge_pte_alloc c00000000008a580 T hugetlb_free_pgd_range c00000000008ad40 T follow_huge_pd c00000000008b010 T hugetlb_get_unmapped_area c00000000008b0f0 T vma_mmu_pagesize c00000000008b170 T flush_dcache_icache_hugepage c00000000008b240 T copro_handle_mm_fault c00000000008b3b0 T copro_flush_all_slbs c00000000008b3e0 T copro_calculate_slb c00000000008b8d0 T zalloc_maybe_bootmem c00000000008b970 T is_conditional_branch c00000000008b9c0 T patch_instruction c00000000008ba80 T raw_patch_instruction c00000000008baf0 T patch_branch c00000000008bb50 T is_offset_in_branch_range c00000000008bb90 T create_branch c00000000008bbf0 T create_cond_branch c00000000008bc50 T instr_is_relative_branch c00000000008bc90 T instr_is_relative_link_branch c00000000008bcd0 T branch_target c00000000008bd30 T instr_is_branch_to_addr c00000000008bdb0 T translate_branch c00000000008bed0 t patch_feature_section c00000000008c160 T do_feature_fixups c00000000008c250 T do_stf_barrier_fixups c00000000008c6f0 T do_uaccess_flush_fixups c00000000008c9d0 T do_entry_flush_fixups c00000000008cc90 T do_rfi_flush_fixups c00000000008cf20 T do_barrier_nospec_fixups_range c00000000008d000 T do_barrier_nospec_fixups c00000000008d120 T do_lwsync_fixups c00000000008d200 T arch_invalidate_pmem c00000000008d290 T arch_wb_cache_pmem c00000000008d320 T memcpy_flushcache c00000000008d3e0 T memcpy_page_flushcache c00000000008d4d0 T __copy_from_user_flushcache c00000000008d630 T probe_user_read_inst c00000000008d700 T probe_kernel_read_inst c00000000008d7c4 T code_patching_test1 c00000000008d7cc T code_patching_test1_expected c00000000008d7cc T end_code_patching_test1 c00000000008d7e0 T strncpy c00000000008d82c T strncmp c00000000008d864 T memchr c00000000008d8a0 T memcmp c00000000008df40 T override_function_with_return c00000000008dfb4 T __copy_tofrom_user_power7 c00000000008e760 T copypage_power7 c00000000008e920 T memcpy_power7 c00000000008f100 T __csum_partial c00000000008f284 T csum_partial_copy_generic c00000000008f480 T csum_ipv6_magic c00000000008f4d0 T csum_and_copy_from_user c00000000008f5c0 T csum_and_copy_to_user c00000000008f6c4 T __arch_clear_user c00000000008f820 T emulate_update_regs c00000000008fae0 T emulate_vsx_load c00000000008fee0 T emulate_vsx_store c0000000000902b0 T analyse_instr c000000000094b70 T emulate_dcbz c000000000094d90 t do_fp_store c0000000000951c0 t do_fp_load c000000000095700 t write_mem c000000000095be0 t read_mem c000000000096260 T emulate_loadstore c000000000097fb0 T emulate_step c0000000000984bc T get_fpr c0000000000985f8 T put_fpr c000000000098734 T get_vr c000000000098870 T put_vr c0000000000989ac T get_vsr c000000000098bcc T put_vsr c000000000098dec T load_vsrn c000000000098e44 T store_vsrn c000000000098e94 T conv_sp_to_dp c000000000098ec0 T conv_dp_to_sp c000000000098eec T ftr_fixup_test1 c000000000098ef8 T end_ftr_fixup_test1 c000000000098ef8 T ftr_fixup_test1_orig c000000000098f04 T ftr_fixup_test1_expected c000000000098f10 T ftr_fixup_test2 c000000000098f1c T end_ftr_fixup_test2 c000000000098f1c T ftr_fixup_test2_orig c000000000098f28 T ftr_fixup_test2_alt c000000000098f2c T ftr_fixup_test2_expected c000000000098f38 T ftr_fixup_test3 c000000000098f44 T end_ftr_fixup_test3 c000000000098f44 T ftr_fixup_test3_orig c000000000098f50 T ftr_fixup_test3_alt c000000000098f58 T ftr_fixup_test4 c000000000098f70 T end_ftr_fixup_test4 c000000000098f70 T ftr_fixup_test4_expected c000000000098f88 T ftr_fixup_test4_orig c000000000098fa0 T ftr_fixup_test4_alt c000000000098fa8 T ftr_fixup_test5 c000000000098fcc T end_ftr_fixup_test5 c000000000098fcc T ftr_fixup_test5_expected c000000000098ff0 T ftr_fixup_test6 c000000000099018 T end_ftr_fixup_test6 c000000000099018 T ftr_fixup_test6_expected c000000000099040 T ftr_fixup_test7 c000000000099068 T end_ftr_fixup_test7 c00000000009906c T ftr_fixup_test7_expected c000000000099090 T ftr_fixup_test_FTR_macros c00000000009923c T ftr_fixup_test_FTR_macros_expected c0000000000993e8 T ftr_fixup_test_FW_FTR_macros c000000000099594 T ftr_fixup_test_FW_FTR_macros_expected c000000000099740 T lwsync_fixup_test c000000000099748 T end_lwsync_fixup_test c000000000099748 T lwsync_fixup_test_expected_LWSYNC c000000000099750 T lwsync_fixup_test_expected_SYNC c000000000099758 T ftr_fixup_prefix1 c000000000099768 T end_ftr_fixup_prefix1 c000000000099768 T ftr_fixup_prefix1_orig c000000000099778 T ftr_fixup_prefix1_expected c000000000099788 T ftr_fixup_prefix2 c000000000099798 T end_ftr_fixup_prefix2 c000000000099798 T ftr_fixup_prefix2_orig c0000000000997a8 T ftr_fixup_prefix2_alt c0000000000997b0 T ftr_fixup_prefix2_expected c0000000000997c0 T ftr_fixup_prefix3 c0000000000997d4 T end_ftr_fixup_prefix3 c0000000000997d4 T ftr_fixup_prefix3_orig c0000000000997e8 T ftr_fixup_prefix3_alt c0000000000997f4 T ftr_fixup_prefix3_expected c0000000000999c0 T __xor_altivec_2 c000000000099a40 T __xor_altivec_3 c000000000099ad0 T __xor_altivec_4 c000000000099b80 T __xor_altivec_5 c000000000099c70 T xor_altivec_5 c000000000099d10 T xor_altivec_2 c000000000099d90 T xor_altivec_3 c000000000099e20 T xor_altivec_4 c000000000099eac T copy_page c00000000009a000 T __copy_tofrom_user c00000000009a00c T __copy_tofrom_user_base c00000000009a5b0 T __memset16 c00000000009a5b4 T __memset32 c00000000009a5b8 T __memset64 c00000000009a5c8 T memset c00000000009a6cc T memmove c00000000009a6e0 T backwards_memcpy c00000000009a778 T __arch_hweight8 c00000000009a784 T __arch_hweight16 c00000000009a798 T __arch_hweight32 c00000000009a7b4 T __arch_hweight64 c00000000009a880 T memcpy c00000000009a910 T copy_mc_generic c00000000009ab90 T enter_vmx_usercopy c00000000009abf0 T exit_vmx_usercopy c00000000009ac70 T enter_vmx_ops c00000000009acc0 T exit_vmx_ops c00000000009ad2c T do_lq c00000000009ad48 T do_stq c00000000009ad5c T do_lqarx c00000000009ad78 T do_stqcx c00000000009ada0 t mpic_mask_ipi c00000000009adb0 t mpic_host_xlate c00000000009af40 T mpic_get_coreint_irq c00000000009af50 t mpic_host_match c00000000009afb0 t mpic_init_sys c00000000009b040 t _mpic_write c00000000009b0a0 t _mpic_read c00000000009b0f0 t mpic_suspend c00000000009b280 t mpic_resume c00000000009b430 t fsl_mpic_get_version c00000000009b490 T mpic_end_irq c00000000009b530 t mpic_end_ipi c00000000009b5d0 t _mpic_cpu_write c00000000009b670 t _mpic_irq_write c00000000009b700 t mpic_unmask_ipi c00000000009b820 t mpic_unmask_tm c00000000009b980 t mpic_mask_tm c00000000009bae0 T mpic_mask_irq c00000000009bce0 T mpic_unmask_irq c00000000009bee0 T mpic_set_affinity c00000000009c100 T mpic_set_irq_type c00000000009c410 t _mpic_get_one_irq c00000000009c6f0 t mpic_cascade c00000000009c7b0 T mpic_get_irq c00000000009c7e0 T mpic_set_vector c00000000009c9a0 T fsl_mpic_primary_get_version c00000000009ca20 T mpic_irq_set_priority c00000000009cde0 t mpic_host_map c00000000009d130 T mpic_setup_this_cpu c00000000009d3b0 T mpic_cpu_get_priority c00000000009d460 T mpic_cpu_set_priority c00000000009d510 T mpic_teardown_this_cpu c00000000009d810 T mpic_get_one_irq c00000000009d820 T mpic_get_mcirq c00000000009d850 T mpic_request_ipis c00000000009d930 T smp_mpic_message_pass c00000000009da60 T smp_mpic_setup_cpu c00000000009da70 T mpic_reset_core c00000000009dcd8 t _mpic_map_mmio.constprop.0 c00000000009dd28 t kmalloc_array.constprop.0 c00000000009dd60 T mpic_msi_reserve_hwirq c00000000009dda0 T mpic_msi_init_allocator c00000000009deb0 t u3msi_teardown_msi_irqs c00000000009df60 t mpic_u3msi_unmask_irq c00000000009dfb0 t mpic_u3msi_mask_irq c00000000009e000 t find_ht_magic_addr.constprop.0 c00000000009e150 t u3msi_setup_msi_irqs c00000000009e480 T mpic_u3msi_init c00000000009e530 T msi_bitmap_free_hwirqs c00000000009e5c0 T msi_bitmap_alloc_hwirqs c00000000009e6d0 T msi_bitmap_reserve_hwirq c00000000009e750 T msi_bitmap_reserve_dt_hwirqs c00000000009e940 T msi_bitmap_free c00000000009e9d0 T msi_bitmap_alloc c00000000009eaf0 t i8259_host_xlate c00000000009eb30 t i8259_host_match c00000000009eb90 t i8259_host_map c00000000009ec20 t i8259_mask_irq c00000000009edc0 t i8259_unmask_irq c00000000009ef60 t i8259_mask_and_ack_irq c00000000009f290 T i8259_irq c00000000009f740 T i8259_get_host c00000000009f760 T i8259_init c00000000009fd90 t xics_host_match c00000000009fe50 t xics_ipi_unmask c00000000009fe60 t xics_host_xlate c00000000009fea0 t xics_host_map c00000000009ffc0 t xics_set_cpu_giq.part.0 c0000000000a0080 t xics_ipi_mask c0000000000a0090 T xics_update_irq_servers c0000000000a0230 T xics_set_cpu_giq c0000000000a02b0 T xics_setup_cpu c0000000000a0340 T xics_teardown_cpu c0000000000a03c0 T xics_kexec_teardown_cpu c0000000000a0470 T xics_migrate_irqs_away c0000000000a0750 T xics_get_irq_server c0000000000a08a0 T xics_set_irq_type c0000000000a0910 T xics_retrigger c0000000000a095c T xics_mask_unknown_vec c0000000000a09f0 T xics_wake_cpu c0000000000a0a30 t icp_native_cause_ipi c0000000000a0a90 t icp_native_teardown_cpu c0000000000a0ad0 t icp_native_set_cpu_priority c0000000000a0b40 t icp_native_ipi_action c0000000000a0bc0 t icp_native_get_irq c0000000000a0d70 t icp_native_flush_ipi c0000000000a0db0 T icp_native_eoi c0000000000a0e40 T icp_native_cause_ipi_rm c0000000000a0e80 T icp_native_flush_interrupt c0000000000a0fb0 t icp_hv_ipi_action c0000000000a1060 t icp_hv_set_cppr c0000000000a10d0 t icp_hv_get_irq c0000000000a1290 t icp_hv_set_cpu_priority c0000000000a1330 t icp_hv_flush_ipi c0000000000a13b0 t icp_hv_eoi c0000000000a14a0 t icp_hv_cause_ipi c0000000000a1540 t icp_hv_teardown_cpu c0000000000a15e0 T icp_hv_init c0000000000a1670 t ics_rtas_host_match c0000000000a16b0 t ics_rtas_get_server c0000000000a1730 t ics_rtas_map c0000000000a1820 t ics_rtas_set_affinity c0000000000a19d0 t ics_rtas_unmask_irq c0000000000a1b00 t ics_rtas_startup c0000000000a1b60 t ics_rtas_mask_real_irq.part.0 c0000000000a1c40 t ics_rtas_mask_unknown c0000000000a1c60 t ics_rtas_mask_irq c0000000000a1c80 t ics_opal_host_match c0000000000a1c90 t ics_opal_get_server c0000000000a1d10 t ics_opal_mask_irq c0000000000a1db0 t ics_opal_map c0000000000a1e90 t ics_opal_set_affinity c0000000000a2030 t ics_opal_unmask_irq c0000000000a2110 t ics_opal_mask_unknown c0000000000a21e0 t ics_opal_startup c0000000000a22f0 t icp_opal_cause_ipi c0000000000a2350 t icp_opal_teardown_cpu c0000000000a2390 t icp_opal_ipi_action c0000000000a2400 t icp_opal_flush_ipi c0000000000a2440 t icp_opal_set_cpu_priority c0000000000a24b0 t icp_opal_eoi c0000000000a2550 t icp_opal_get_irq c0000000000a2700 T icp_opal_flush_interrupt c0000000000a2850 T icp_opal_init c0000000000a28d0 T is_xive_irq c0000000000a28f0 t xive_ipi_do_nothing c0000000000a2900 t xive_irq_domain_match c0000000000a2950 t xive_esb_read c0000000000a2a30 t xive_setup_cpu c0000000000a2ad0 t xive_cause_ipi c0000000000a2b30 t xive_irq_set_type c0000000000a2c30 t xive_dec_target_count c0000000000a2cd0 t xive_scan_interrupts c0000000000a2f40 t xive_get_irq c0000000000a2fd0 T xive_cleanup_irq_data c0000000000a30b0 t xive_muxed_ipi_action c0000000000a30e0 t xive_irq_domain_unmap c0000000000a31b0 t xive_core_debug_open c0000000000a31f0 t xive_core_debug_show c0000000000a3610 t xive_irq_domain_xlate c0000000000a3650 t xive_do_source_eoi c0000000000a3820 t xive_irq_set_vcpu_affinity c0000000000a3a90 t xive_irq_retrigger c0000000000a3b00 t xive_irq_eoi c0000000000a3bc0 t xive_flush_cpu_queue.constprop.0 c0000000000a3d00 t xive_prepare_cpu c0000000000a3eb0 t xive_irq_domain_map c0000000000a4030 t xive_find_target_in_mask c0000000000a4270 t xive_pick_irq_target.isra.0 c0000000000a4470 t xive_irq_startup c0000000000a4650 t xive_irq_set_affinity c0000000000a48a0 t xive_ipi_eoi c0000000000a4930 t xive_irq_unmask c0000000000a4a40 t xive_setup_cpu_ipi c0000000000a4c00 t xive_irq_shutdown c0000000000a4cf0 t xive_irq_mask c0000000000a4dd0 t xive_get_irqchip_state c0000000000a4f10 T xmon_xive_do_dump c0000000000a5090 T xmon_xive_get_irq_config c0000000000a5280 T xive_smp_setup_cpu c0000000000a52b0 T xive_smp_prepare_cpu c0000000000a5310 T xive_smp_disable_cpu c0000000000a53d0 T xive_flush_interrupt c0000000000a53f0 T xive_teardown_cpu c0000000000a5590 T xive_shutdown c0000000000a55d0 T xive_queue_page_alloc c0000000000a56b0 T xive_core_debug_init c0000000000a5720 T xive_native_default_eq_shift c0000000000a5740 T xive_native_has_single_escalation c0000000000a5760 T xive_native_populate_irq_data c0000000000a5980 T xive_native_configure_irq c0000000000a5a20 T xive_native_get_queue_info c0000000000a5b70 T xive_native_configure_queue c0000000000a5d90 T xive_native_alloc_irq_on_chip c0000000000a5e30 t xive_native_get_ipi c0000000000a5ee0 T xive_native_free_irq c0000000000a5f40 T xive_native_sync_source c0000000000a5f80 T xive_native_sync_queue c0000000000a5fc0 t xive_native_shutdown c0000000000a5ff0 t xive_native_eoi c0000000000a6020 t xive_native_update_pending c0000000000a6110 t xive_native_match c0000000000a6150 t xive_native_teardown_cpu c0000000000a61f0 T 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