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radix__setup_initial_memory_limit c0000000000790a0 T radix__pmd_hugepage_update c000000000079210 T radix__pmdp_collapse_flush c000000000079280 T radix__pgtable_trans_huge_deposit c0000000000793a0 T radix__pgtable_trans_huge_withdraw c000000000079480 T radix__pmdp_huge_get_and_clear c0000000000795d0 T radix__ptep_set_access_flags c0000000000796e0 T radix__ptep_modify_prot_commit c0000000000797c0 T p4d_free_pud_page c0000000000797d0 T pud_set_huge c000000000079850 T pud_clear_huge c000000000079880 T pud_free_pmd_page c0000000000799d0 T pmd_set_huge c000000000079a50 T pmd_clear_huge c000000000079a80 T pmd_free_pte_page c000000000079b10 t early_alloc_pgtable c000000000079bec t pte_update.constprop.0 c000000000079ce0 T radix__flush_tlb_pwc c000000000079cf0 t exit_flush_lazy_tlbs c000000000079dc0 t do_tlbiel_kernel c000000000079f60 T radix__flush_tlb_lpid_page c00000000007a250 t do_exit_flush_lazy_tlb c00000000007a4a0 T radix__flush_pwc_lpid c00000000007a590 T radix__flush_all_lpid c00000000007a820 T radix__local_flush_tlb_mm c00000000007a9d0 t do_tlbiel_va_range c00000000007abe0 t _tlbie_pid c00000000007b0d0 t do_tlbiel_va c00000000007b340 t do_tlbiel_pid c00000000007b710 T radix_kvm_prefetch_workaround c00000000007b970 T radix__flush_tlb_kernel_range c00000000007be50 t __flush_all_mm c00000000007c550 T radix__flush_all_mm c00000000007c560 T radix__flush_tlb_mm c00000000007cc10 t __radix__flush_tlb_range c00000000007e4a0 T radix__flush_tlb_range c00000000007e4f0 T radix__tlbiel_all c00000000007e620 T radix__local_flush_tlb_page_psize c00000000007e740 T radix__local_flush_tlb_page c00000000007e7a0 T radix__flush_tlb_page_psize c00000000007ee30 T radix__flush_tlb_page c00000000007ee90 T radix__flush_all_lpid_guest c00000000007f120 T radix__flush_tlb_range_psize c00000000007fbb0 T radix__tlb_flush c000000000080bc0 T radix__flush_pmd_tlb_range c000000000080be0 T radix__flush_tlb_collapsed_pmd c0000000000814e0 T radix__flush_tlb_all c000000000081510 T __rpte_sub_valid c000000000081530 T __hash_page_4K c000000000081ae0 T __hash_page_64K c000000000082050 T __hash_page_huge c000000000082440 T huge_ptep_modify_prot_start c000000000082580 T huge_ptep_modify_prot_commit c0000000000825d0 T hugetlbpage_init_default c000000000082630 T radix__flush_hugetlb_page c000000000082760 T radix__local_flush_hugetlb_page c000000000082890 T radix__flush_hugetlb_tlb_range c0000000000829d0 T radix__hugetlb_get_unmapped_area c000000000082ca0 T radix__huge_ptep_modify_prot_commit c000000000082d90 T __hash_page_thp c000000000083310 t subpage_walk_pmd_entry c000000000083470 t hpte_flush_range c0000000000837e0 T __se_sys_subpage_prot c0000000000837e0 T sys_subpage_prot c000000000083e80 T subpage_prot_free c000000000083fc0 T mm_iommu_preregistered c000000000083fe0 T mm_iommu_lookup c000000000084040 T mm_iommu_ua_to_hpa c0000000000840c0 T mm_iommu_is_devmem c000000000084140 T mm_iommu_mapped_inc c000000000084190 T mm_iommu_mapped_dec c0000000000841d0 T mm_iommu_get c0000000000842c0 T mm_iommu_put c000000000084430 t mm_iommu_do_alloc c0000000000849e0 T mm_iommu_new c000000000084a00 T mm_iommu_newdev c000000000084a10 t mm_iommu_free c000000000084b90 T mm_iommu_lookup_rm c000000000084ba0 T mm_iommu_ua_to_hpa_rm c000000000084c80 T mm_iommu_ua_mark_dirty_rm c000000000084d30 T mm_iommu_init c000000000084d40 t pkey_initialize c000000000084fa0 t is_pkey_enabled c000000000084fe0 t pkey_access_permitted c0000000000850f0 T pkey_mm_init c000000000085120 T __arch_set_user_pkey_access c000000000085220 T thread_pkey_regs_save c000000000085270 T thread_pkey_regs_restore c0000000000852d0 T thread_pkey_regs_init c000000000085330 T __execute_only_pkey c000000000085340 T __arch_override_mprotect_pkey c0000000000853e0 T arch_pte_access_permitted c000000000085420 T arch_vma_access_permitted c0000000000854b0 T arch_dup_pkeys c0000000000854e0 t map_cpu_to_node c0000000000855b0 t ppc_numa_cpu_dead c0000000000856c0 T __node_distance c000000000085770 t initialize_distance_lookup_table.part.0 c000000000085800 t of_node_to_nid_single c0000000000858e0 T of_node_to_nid c0000000000859a0 t numa_setup_cpu c000000000085b20 t ppc_numa_cpu_prepare c000000000085c30 t of_drconf_to_nid_single.isra.0 c000000000085e20 T cpu_distance c000000000085ea0 T hot_add_scn_to_nid c000000000086260 T memory_hotplug_max c000000000086328 t node_set_online c0000000000863b0 T get_slice_psize c000000000086410 t slice_range_to_mask c000000000086530 t slice_check_range_fits.isra.0 c000000000086680 t slice_scan_available c000000000086730 t slice_flush_segments c000000000086790 t slice_area_is_free.part.0 c000000000086850 t slice_find_area_bottomup.isra.0 c0000000000869e0 t slice_find_area c000000000086cd0 t slice_convert c000000000086fc0 T slice_get_unmapped_area c0000000000878a0 T arch_get_unmapped_area c0000000000878d0 T arch_get_unmapped_area_topdown c000000000087900 T slice_init_new_context_exec c000000000087ac0 T slice_setup_new_exec c000000000087b20 T slice_set_range_psize c000000000087bb0 T slice_is_hugepage_only_range c000000000087ce0 t mmu_psize_to_shift.part.0 c000000000087cf0 T huge_pte_offset c000000000087d30 T huge_pte_alloc c000000000088370 T hugetlb_free_pgd_range c000000000088a70 T follow_huge_pd c000000000088d00 T hugetlb_get_unmapped_area c000000000088de0 T vma_mmu_pagesize c000000000088e50 T flush_dcache_icache_hugepage c000000000088f20 T copro_handle_mm_fault c0000000000890d0 T copro_flush_all_slbs c000000000089100 T copro_calculate_slb c0000000000895e0 T zalloc_maybe_bootmem c000000000089680 T is_conditional_branch c0000000000896d0 T raw_patch_instruction c000000000089700 T patch_instruction c000000000089760 T patch_branch c0000000000897b0 T is_offset_in_branch_range c0000000000897f0 T create_branch c000000000089840 T create_cond_branch c000000000089890 T instr_is_relative_branch c0000000000898c0 T instr_is_relative_link_branch c000000000089900 T branch_target c000000000089960 T instr_is_branch_to_addr c0000000000899d0 T translate_branch c000000000089b00 t patch_feature_section c000000000089c80 T do_feature_fixups c000000000089d40 T do_stf_barrier_fixups c00000000008a1a0 T do_rfi_flush_fixups c00000000008a400 T do_barrier_nospec_fixups_range c00000000008a4e0 T do_barrier_nospec_fixups c00000000008a550 T do_lwsync_fixups c00000000008a5e0 T arch_wb_cache_pmem c00000000008a650 T arch_invalidate_pmem c00000000008a660 T memcpy_flushcache c00000000008a700 T memcpy_page_flushcache c00000000008a740 T __copy_from_user_flushcache c00000000008a860 T strncpy c00000000008a8ac T strncmp c00000000008a8e4 T memchr c00000000008a920 T memcmp c00000000008afc0 T override_function_with_return c00000000008b034 T __copy_tofrom_user_power7 c00000000008b7e0 T copypage_power7 c00000000008b9a0 T memcpy_power7 c00000000008c180 T __csum_partial c00000000008c304 T csum_partial_copy_generic c00000000008c530 T csum_ipv6_magic c00000000008c580 T csum_and_copy_to_user c00000000008c720 T csum_and_copy_from_user c00000000008c940 T __clear_user c00000000008caa0 T emulate_update_regs c00000000008cd50 T emulate_vsx_load c00000000008d110 T emulate_vsx_store c00000000008d4b0 T analyse_instr c000000000091760 T emulate_dcbz c000000000091890 t do_fp_store c000000000091ce0 t do_fp_load c000000000092160 t write_mem c000000000092530 t read_mem c0000000000929d0 T emulate_loadstore c0000000000943d0 T emulate_step c0000000000949d4 T get_fpr c000000000094b10 T put_fpr c000000000094c4c T get_vr c000000000094d88 T put_vr c000000000094ec4 T get_vsr c0000000000950e4 T put_vsr c000000000095304 T load_vsrn c00000000009535c T store_vsrn c0000000000953ac T conv_sp_to_dp c0000000000953d8 T conv_dp_to_sp c000000000095404 T ftr_fixup_test1 c000000000095410 T end_ftr_fixup_test1 c000000000095410 T ftr_fixup_test1_orig c00000000009541c T ftr_fixup_test1_expected c000000000095428 T ftr_fixup_test2 c000000000095434 T end_ftr_fixup_test2 c000000000095434 T ftr_fixup_test2_orig c000000000095440 T ftr_fixup_test2_alt c000000000095444 T ftr_fixup_test2_expected c000000000095450 T ftr_fixup_test3 c00000000009545c T end_ftr_fixup_test3 c00000000009545c T ftr_fixup_test3_orig c000000000095468 T ftr_fixup_test3_alt c000000000095470 T ftr_fixup_test4 c000000000095488 T end_ftr_fixup_test4 c000000000095488 T ftr_fixup_test4_expected c0000000000954a0 T ftr_fixup_test4_orig c0000000000954b8 T ftr_fixup_test4_alt c0000000000954c0 T ftr_fixup_test5 c0000000000954e4 T end_ftr_fixup_test5 c0000000000954e4 T ftr_fixup_test5_expected c000000000095508 T ftr_fixup_test6 c000000000095530 T end_ftr_fixup_test6 c000000000095530 T ftr_fixup_test6_expected c000000000095558 T ftr_fixup_test7 c000000000095580 T end_ftr_fixup_test7 c000000000095584 T ftr_fixup_test7_expected c0000000000955a8 T ftr_fixup_test_FTR_macros c000000000095754 T ftr_fixup_test_FTR_macros_expected c000000000095900 T ftr_fixup_test_FW_FTR_macros c000000000095aac T ftr_fixup_test_FW_FTR_macros_expected c000000000095c58 T lwsync_fixup_test c000000000095c60 T end_lwsync_fixup_test c000000000095c60 T lwsync_fixup_test_expected_LWSYNC c000000000095c68 T lwsync_fixup_test_expected_SYNC c000000000095e30 T __xor_altivec_2 c000000000095eb0 T __xor_altivec_3 c000000000095f40 T __xor_altivec_4 c000000000095ff0 T __xor_altivec_5 c0000000000960e0 T xor_altivec_2 c000000000096160 T xor_altivec_3 c0000000000961f0 T xor_altivec_4 c000000000096280 T xor_altivec_5 c00000000009631c T copy_page c000000000096480 T __copy_tofrom_user c00000000009648c T __copy_tofrom_user_base c000000000096a30 T __memset16 c000000000096a34 T __memset32 c000000000096a38 T __memset64 c000000000096a48 T memset c000000000096b4c T memmove c000000000096b60 T backwards_memcpy c000000000096bf8 T __arch_hweight8 c000000000096c04 T __arch_hweight16 c000000000096c18 T __arch_hweight32 c000000000096c34 T __arch_hweight64 c000000000096d00 T memcpy c000000000096d90 T memcpy_mcsafe c000000000097010 T enter_vmx_usercopy c000000000097070 T exit_vmx_usercopy c0000000000970f0 T enter_vmx_ops c000000000097140 T exit_vmx_ops c0000000000971ac T do_lq c0000000000971c8 T do_stq c0000000000971dc T do_lqarx c0000000000971f8 T do_stqcx c000000000097220 t mpic_mask_ipi c000000000097230 t mpic_host_xlate c0000000000973c0 T mpic_get_coreint_irq c0000000000973d0 t mpic_host_match c000000000097430 t mpic_init_sys c0000000000974c0 t _mpic_write.isra.0.part.0 c0000000000974e0 t fsl_mpic_get_version.part.0 c000000000097530 t mpic_suspend c0000000000976d0 t _mpic_write.isra.0 c000000000097720 t mpic_resume c000000000097870 T mpic_end_irq c0000000000978e0 t mpic_end_ipi c0000000000978f0 t _mpic_cpu_write c000000000097960 t mpic_unmask_tm c000000000097ab0 t mpic_mask_tm c000000000097c00 t mpic_unmask_ipi c000000000097d20 T mpic_unmask_irq c000000000097ed0 T mpic_mask_irq c000000000098080 T mpic_set_irq_type c000000000098380 T mpic_set_affinity c000000000098550 t _mpic_get_one_irq c0000000000987a0 t mpic_cascade c000000000098860 T mpic_get_irq c000000000098890 T mpic_set_vector c000000000098a40 T fsl_mpic_primary_get_version c000000000098a80 T mpic_irq_set_priority c000000000098e20 t mpic_host_map c000000000099140 T mpic_setup_this_cpu c0000000000993b0 T mpic_cpu_get_priority c000000000099430 T mpic_cpu_set_priority c0000000000994b0 T mpic_teardown_this_cpu c000000000099770 T mpic_get_one_irq c000000000099780 T mpic_get_mcirq c0000000000997b0 T mpic_request_ipis c000000000099890 T smp_mpic_message_pass c000000000099990 T smp_mpic_setup_cpu c0000000000999a0 T mpic_reset_core c000000000099bc8 t _mpic_map_mmio.isra.0 c000000000099c18 t kmalloc_array.constprop.0 c000000000099c50 T mpic_msi_reserve_hwirq c000000000099c90 T mpic_msi_init_allocator c000000000099da0 t u3msi_teardown_msi_irqs c000000000099e50 t mpic_u3msi_unmask_irq c000000000099ea0 t mpic_u3msi_mask_irq c000000000099ef0 t find_u4_magic_addr c000000000099fa0 t find_ht_magic_addr.isra.0 c00000000009a0f0 t u3msi_setup_msi_irqs c00000000009a330 T mpic_u3msi_init c00000000009a3e0 T msi_bitmap_alloc_hwirqs c00000000009a510 T msi_bitmap_free_hwirqs c00000000009a5a0 T msi_bitmap_reserve_hwirq c00000000009a620 T msi_bitmap_reserve_dt_hwirqs c00000000009a810 T msi_bitmap_free c00000000009a8a0 T msi_bitmap_alloc c00000000009a9c0 t i8259_host_xlate c00000000009aa00 t i8259_host_match c00000000009aa60 t i8259_host_map c00000000009aaf0 t i8259_set_irq_mask.isra.0 c00000000009abd0 t i8259_mask_irq c00000000009acb0 t i8259_unmask_irq c00000000009ad90 t i8259_mask_and_ack_irq c00000000009b0a0 T i8259_irq c00000000009b550 T i8259_get_host c00000000009b570 T i8259_init c00000000009bb30 t xics_host_match c00000000009bbf0 t xics_ipi_unmask c00000000009bc00 t xics_host_xlate c00000000009bc40 t xics_host_map c00000000009bd60 t xics_ipi_mask c00000000009bd70 T xics_update_irq_servers c00000000009beb0 T xics_set_cpu_giq c00000000009bf70 T xics_setup_cpu c00000000009bfd0 T xics_teardown_cpu c00000000009c050 T xics_kexec_teardown_cpu c00000000009c0e0 T xics_migrate_irqs_away c00000000009c3b0 T xics_get_irq_server c00000000009c4f0 T xics_set_irq_type c00000000009c560 T xics_retrigger c00000000009c5ac T xics_mask_unknown_vec c00000000009c640 t icp_native_teardown_cpu c00000000009c680 t icp_native_flush_ipi c00000000009c6c0 t icp_native_cause_ipi c00000000009c710 T xics_wake_cpu c00000000009c740 t icp_native_set_cpu_priority c00000000009c7a0 T icp_native_eoi c00000000009c830 t icp_native_ipi_action c00000000009c8b0 t icp_native_get_irq c00000000009ca30 T icp_native_cause_ipi_rm c00000000009ca70 T icp_native_flush_interrupt c00000000009cb90 t icp_hv_ipi_action c00000000009cc40 t icp_hv_set_cppr c00000000009ccb0 t icp_hv_get_irq c00000000009ce70 t icp_hv_set_cpu_priority c00000000009cf10 t icp_hv_flush_ipi c00000000009cf90 t icp_hv_eoi c00000000009d080 t icp_hv_cause_ipi c00000000009d120 t icp_hv_teardown_cpu c00000000009d1c0 T icp_hv_init c00000000009d240 t ics_rtas_host_match c00000000009d280 t ics_rtas_get_server c00000000009d300 t ics_rtas_map c00000000009d3f0 t ics_rtas_set_affinity c00000000009d5a0 t ics_rtas_unmask_irq c00000000009d6d0 t ics_rtas_startup c00000000009d730 t ics_rtas_mask_real_irq.part.0 c00000000009d810 t ics_rtas_mask_unknown c00000000009d830 t ics_rtas_mask_irq c00000000009d850 t ics_opal_host_match c00000000009d860 t ics_opal_get_server c00000000009d8e0 t ics_opal_mask_real_irq c00000000009d960 t ics_opal_mask_unknown c00000000009d9e0 t ics_opal_mask_irq c00000000009da00 t ics_opal_map c00000000009dae0 t ics_opal_set_affinity c00000000009dc80 t ics_opal_unmask_irq c00000000009dd60 t ics_opal_startup c00000000009ddc0 t icp_opal_cause_ipi c00000000009de20 t icp_opal_teardown_cpu c00000000009de60 t icp_opal_ipi_action c00000000009ded0 t icp_opal_flush_ipi c00000000009df10 t icp_opal_set_cpu_priority c00000000009df80 t icp_opal_eoi c00000000009e020 t icp_opal_get_xirr.part.0 c00000000009e0a0 t icp_opal_get_irq c00000000009e230 T icp_opal_flush_interrupt c00000000009e340 T icp_opal_init c00000000009e3c0 T is_xive_irq c00000000009e3e0 t xive_ipi_do_nothing c00000000009e3f0 t xive_irq_domain_match c00000000009e440 t xive_setup_cpu c00000000009e4e0 t xive_esb_read c00000000009e5b0 t xive_get_irqchip_state c00000000009e640 t xive_cause_ipi c00000000009e6a0 t xive_irq_set_type c00000000009e7c0 t xive_dec_target_count c00000000009e860 t xive_find_target_in_mask c00000000009ea90 t xive_pick_irq_target c00000000009eca0 t xive_irq_set_affinity c00000000009eed0 t xive_scan_interrupts c00000000009f130 t xive_get_irq c00000000009f1c0 T xive_cleanup_irq_data c00000000009f270 t xive_muxed_ipi_action c00000000009f2a0 t xive_irq_domain_unmap c00000000009f370 t xive_irq_domain_xlate c00000000009f3b0 t xive_do_source_set_mask.part.0 c00000000009f410 t xive_irq_mask c00000000009f4a0 t xive_irq_shutdown c00000000009f570 t xive_do_source_set_mask.constprop.0 c00000000009f600 t xive_irq_startup c00000000009f790 t xive_setup_cpu_ipi c00000000009f920 t xive_irq_unmask c00000000009f9c0 t xive_do_source_eoi c00000000009fb90 t xive_irq_set_vcpu_affinity c00000000009fe10 t xive_irq_retrigger c00000000009fe80 t xive_irq_eoi c00000000009ff40 t xive_flush_cpu_queue.isra.0 c0000000000a0080 t xive_prepare_cpu c0000000000a0210 t xive_irq_domain_map c0000000000a0390 t xive_ipi_eoi c0000000000a0420 T xmon_xive_do_dump c0000000000a05a0 T xmon_xive_get_irq_config c0000000000a0710 T xive_smp_setup_cpu c0000000000a0740 T xive_smp_prepare_cpu c0000000000a07a0 T xive_smp_disable_cpu c0000000000a0860 T xive_flush_interrupt c0000000000a0880 T xive_teardown_cpu c0000000000a09d0 T xive_shutdown c0000000000a0a10 T xive_queue_page_alloc c0000000000a0af0 T xive_native_default_eq_shift c0000000000a0b10 T xive_native_has_single_escalation c0000000000a0b30 T xive_native_populate_irq_data c0000000000a0d50 T xive_native_configure_irq c0000000000a0df0 T xive_native_get_queue_info c0000000000a0f40 T xive_native_configure_queue c0000000000a1160 T xive_native_alloc_irq c0000000000a1200 t xive_native_get_ipi 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