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kmalloc_array.constprop.0 c000000000086470 T flush_icache_range c0000000000864a0 T flush_dcache_icache_folio c0000000000864d0 T clear_user_page c000000000086580 T copy_user_page c0000000000865e0 T flush_icache_user_page c000000000086610 T hash__alloc_context_id c0000000000866d0 T __destroy_context c000000000086720 T hash__setup_new_exec c000000000086760 T init_new_context c000000000086b60 T destroy_context c000000000086cc0 T arch_exit_mmap c000000000086e70 T radix__switch_mmu_context c000000000086e90 T cleanup_cpu_mmu_context c000000000086f30 T vm_get_page_prot c000000000086fc0 t do_serialize c000000000087020 T mmu_partition_table_set_entry c000000000087220 T pmdp_set_access_flags c000000000087380 T pudp_set_access_flags c0000000000874e0 T pmdp_test_and_clear_young c0000000000875f0 T pudp_test_and_clear_young c0000000000876c0 T set_pmd_at c0000000000877f0 T set_pud_at c000000000087920 T serialize_against_pte_lookup c000000000087980 T pmdp_invalidate c000000000087a80 T pmdp_huge_get_and_clear_full c000000000087b90 T pudp_huge_get_and_clear_full c000000000087c70 T pfn_pmd c000000000087ce0 T pfn_pud c000000000087d40 T mk_pmd c000000000087dd0 T pmd_modify c000000000087e30 T mmu_cleanup_all c000000000087f10 T pmd_fragment_alloc c0000000000881a0 T pmd_fragment_free c000000000088390 T pgtable_free_tlb c0000000000883f0 T __tlb_remove_table c000000000088570 T arch_report_meminfo c000000000088660 T ptep_modify_prot_start c0000000000887e0 T ptep_modify_prot_commit c000000000088870 T pmd_move_must_withdraw c0000000000888d0 t change_memory_range c0000000000889f0 t hash__change_memory_range c000000000088ba0 T hash__has_transparent_hugepage c000000000088c50 t change_memory_range_fn c000000000088dd0 T hash__vmemmap_remove_mapping c000000000088e80 T hash__map_kernel_page c000000000089220 T hash__pmdp_collapse_flush c0000000000892e0 T hash__pgtable_trans_huge_deposit c000000000089360 T hash__pgtable_trans_huge_withdraw c000000000089430 T hpte_do_hugepage_flush c0000000000896c0 T hash__pmd_hugepage_update c000000000089860 T hash__pmdp_huge_get_and_clear c000000000089950 T hash__mark_rodata_ro c0000000000899e0 T hash__mark_initmem_nx c000000000089a70 t subpage_protection c000000000089b40 t hpt_order_get c000000000089b70 t fops_hpt_order_open c000000000089bd0 t hpt_order_set c000000000089c70 t check_paca_psize c000000000089d90 T hash__tlbiel_all c000000000089fa0 T htab_convert_pte_flags c00000000008a150 T htab_bolt_mapping c00000000008a650 T htab_remove_mapping c00000000008a850 T htab_shift_for_mem_size c00000000008a8d0 T hash__create_section_mapping c00000000008aaa0 T hash__remove_section_mapping c00000000008ab80 T hash__early_init_mmu_secondary c00000000008ac80 T hash_page_do_lazy_icache c00000000008ae70 T demote_segment_4k c00000000008af70 T hash_failure_debug c00000000008b090 T hash_page_mm c00000000008b910 T hash_page c00000000008b980 T do_hash_fault c00000000008bcc0 T __update_mmu_cache c00000000008c0d0 T pte_get_hash_gslot c00000000008c1c0 T flush_hash_page c00000000008c410 T flush_hash_hugepage c00000000008c6c0 T flush_hash_range c00000000008c820 T hpte_insert_repeating c00000000008c9b0 T hpt_clear_stress c00000000008cb00 t stress_hpt_timer_fn c00000000008cc60 T hpt_do_stress c00000000008ce30 T hash__setup_initial_memory_limit c00000000008cf90 T arch_randomize_brk c00000000008d050 T __flush_tlb_pending c00000000008d160 T hpte_need_flush c00000000008d670 T hash__tlb_flush c00000000008d6e0 T __flush_hash_table_range c00000000008d870 T flush_hash_table_pmd_range c00000000008daa0 t preload_add c00000000008dbe0 t slb_insert_entry c00000000008dfb0 t slb_allocate_user c00000000008e0e0 T do_slb_fault c00000000008e350 T __slb_restore_bolted_realmode c00000000008e390 T slb_restore_bolted_realmode c00000000008e3f0 T slb_flush_all_realmode c00000000008e410 T slb_flush_and_restore_bolted c00000000008e4a0 T slb_save_contents c00000000008e5a0 T slb_dump_contents c00000000008e880 T slb_vmalloc_update c00000000008e890 T slb_setup_new_exec c00000000008e9b0 T preload_new_slb_context c00000000008eb40 T switch_slb c00000000008ede0 T slb_set_size c00000000008ee00 T slb_initialize c00000000008f440 T get_slice_psize c00000000008f4b0 t slice_area_is_free c00000000008f5a0 t slice_range_to_mask c00000000008f6d0 t slice_scan_available c00000000008f780 t slice_flush_segments c00000000008f800 t slice_check_range_fits.isra.0 c00000000008f930 t slice_find_area_bottomup.isra.0 c00000000008fb70 t slice_convert c00000000008fe80 t slice_find_area_topdown c000000000090180 T slice_get_unmapped_area c000000000090b20 T arch_get_unmapped_area c000000000090ba0 T arch_get_unmapped_area_topdown c000000000090c20 T slice_init_new_context_exec c000000000090e50 T slice_setup_new_exec c000000000090ec0 T slice_set_range_psize c000000000090fa0 T slice_is_hugepage_only_range c0000000000910e0 T vma_mmu_pagesize c0000000000911c0 T hugetlb_get_unmapped_area c0000000000912a0 t ___tlbie c0000000000913a0 t native_lock_hpte c000000000091430 t native_hpte_clear c000000000091690 t native_hpte_remove c000000000091810 t native_hpte_insert c000000000091a50 t __tlbiel c000000000091bd0 t native_hpte_find c000000000091da0 t native_flush_hash_range c000000000092590 t tlbie c000000000092900 t native_hugepage_invalidate c000000000092bf0 t native_hpte_removebolted c000000000092e30 t native_hpte_updatepp c000000000093050 t native_hpte_invalidate c000000000093260 t native_hpte_updateboltedpp c000000000093500 T __rpte_sub_valid c000000000093530 T __hash_page_4K c000000000093ad0 T __hash_page_64K c000000000093ff0 T __hash_page_thp c0000000000945e0 t subpage_walk_pmd_entry c000000000094790 t hpte_flush_range c000000000094b10 T subpage_prot_free c000000000094c60 T __se_sys_subpage_prot c000000000094c60 T sys_subpage_prot c0000000000955c0 T __hash_page_huge c0000000000959b0 T huge_ptep_modify_prot_start c000000000095b30 T huge_ptep_modify_prot_commit c000000000095bc0 t pgd_offset_pgd c000000000095c40 t pte_offset_kernel.isra.0 c000000000095cc0 t radix__change_memory_range c000000000096060 t __map_kernel_page c000000000096690 T radix__map_kernel_page c0000000000966b0 T radix__mark_rodata_ro c0000000000967b0 T radix__mark_initmem_nx c0000000000967e0 T radix__early_init_mmu_secondary c000000000096900 T radix__mmu_cleanup_all c000000000096990 T vmemmap_can_optimize c000000000096a10 T radix__pmd_hugepage_update c000000000096b50 T radix__pud_hugepage_update c000000000096c90 T radix__pmdp_collapse_flush c000000000096cf0 T radix__pgtable_trans_huge_deposit c000000000096e20 T radix__pgtable_trans_huge_withdraw c000000000096ef0 T radix__pmdp_huge_get_and_clear c000000000097000 T radix__pudp_huge_get_and_clear c000000000097110 T radix__ptep_set_access_flags c000000000097280 T radix__ptep_modify_prot_commit c000000000097350 T pud_set_huge c000000000097430 T pud_clear_huge c000000000097470 T pud_free_pmd_page c0000000000975f0 T pmd_set_huge c0000000000976d0 T pmd_clear_huge c000000000097710 T pmd_free_pte_page c0000000000977bc t pte_none c000000000097824 t free_reserved_page c0000000000978a0 t pte_update.constprop.0.isra.0 c0000000000979b8 t vmemmap_pte_alloc c000000000097ad4 t vmemmap_pmd_alloc c000000000097c9c t vmemmap_pud_alloc c000000000097e90 t early_alloc_pgtable c000000000097f9c T radix__vmemmap_free c000000000097fc0 t pseries_rpt_invalidate.isra.0 c0000000000980e0 T radix__flush_pwc_lpid c0000000000981e0 t __tlbie_va_range c000000000098440 T radix__flush_tlb_lpid_page c0000000000986b0 t do_tlbiel_kernel c000000000098830 t do_tlbiel_va_range c0000000000989f0 t _tlbie_va_range c000000000098d00 t _tlbiel_pid c000000000098ec0 T radix__local_flush_tlb_mm c000000000098f30 t do_tlbiel_pid c000000000099020 T radix__flush_all_lpid c000000000099230 t do_tlbiel_va c0000000000993d0 t _tlbiel_va_range_multicast c000000000099710 t _tlbie_pid c000000000099950 T radix__flush_tlb_kernel_range c000000000099e40 T do_h_rpt_invalidate_prt c00000000009a650 T radix__tlbiel_all c00000000009a8c0 T radix__local_flush_tlb_page_psize c00000000009a9e0 T radix__local_flush_tlb_page c00000000009aa50 T exit_lazy_flush_tlb c00000000009abf0 t flush_type_needed c00000000009aea0 T radix__flush_tlb_mm c00000000009b270 t __flush_all_mm c00000000009b630 T radix__flush_all_mm c00000000009b650 T radix__flush_tlb_range c00000000009bf00 t __radix__flush_tlb_range_psize c00000000009c4d0 T radix__flush_pmd_tlb_range c00000000009c4f0 T radix__flush_pud_tlb_range c00000000009c510 t do_exit_flush_lazy_tlb c00000000009c530 T radix__flush_tlb_page_psize c00000000009ca00 T radix__flush_tlb_page c00000000009ca70 T radix__flush_all_lpid_guest c00000000009cc80 T radix__tlb_flush c00000000009cdf0 T radix__flush_tlb_range_psize c00000000009ce10 T radix__flush_tlb_pwc_range_psize c00000000009ce30 T radix__flush_tlb_collapsed_pmd c00000000009d1e0 T radix__flush_tlb_all c00000000009d250 T radix__flush_hugetlb_page c00000000009d3f0 T radix__local_flush_hugetlb_page c00000000009d590 T radix__flush_hugetlb_tlb_range c00000000009d770 T radix__huge_ptep_modify_prot_commit c00000000009d840 T mm_iommu_preregistered c00000000009d870 T mm_iommu_lookup c00000000009d8e0 T mm_iommu_ua_to_hpa c00000000009d9a0 T mm_iommu_is_devmem c00000000009da70 T mm_iommu_mapped_inc c00000000009dac0 T mm_iommu_get c00000000009dbe0 T mm_iommu_put c00000000009dd80 t mm_iommu_free c00000000009dee0 t mm_iommu_do_alloc c00000000009e490 T mm_iommu_new c00000000009e4b0 T mm_iommu_newdev c00000000009e4d0 T mm_iommu_mapped_dec c00000000009e520 T mm_iommu_init c00000000009e540 t pkey_access_permitted c00000000009e610 T setup_kuep c00000000009e6e0 T setup_kuap c00000000009e7a0 T pkey_mm_init c00000000009e7e0 T __arch_set_user_pkey_access c00000000009e9a0 T execute_only_pkey c00000000009e9b0 T __arch_override_mprotect_pkey c00000000009ea60 T arch_pte_access_permitted c00000000009eaa0 T arch_vma_access_permitted c00000000009eb30 T arch_dup_pkeys c00000000009eb60 t arch_set_bit c00000000009ebb0 t ppc_numa_cpu_dead c00000000009ebc0 t __associativity_to_nid c00000000009ec40 t associativity_to_nid c00000000009ec70 t of_get_assoc_arrays c00000000009eda0 T __node_distance c00000000009eec0 t __initialize_form1_numa_distance.part.0 c00000000009efc0 t initialize_form1_numa_distance c00000000009f000 T of_node_to_nid c00000000009f120 T update_numa_distance c00000000009f240 T map_cpu_to_node c00000000009f350 t numa_setup_cpu c00000000009f6b0 t ppc_numa_cpu_prepare c00000000009f810 T unmap_cpu_from_node c00000000009f950 T cpu_relative_distance c00000000009fad0 T of_drconf_to_nid_single c00000000009fc10 T hot_add_scn_to_nid c00000000009ffa0 T memory_hotplug_max c0000000000a008c t find_next_bit c0000000000a00c4 t read_n_cells c0000000000a010c t node_set_online c0000000000a0180 t mmu_psize_to_shift.part.0 c0000000000a0190 T huge_pte_offset c0000000000a01e0 T huge_pte_alloc c0000000000a07c0 T hugetlb_free_pgd_range c0000000000a0fa0 T copro_flush_all_slbs c0000000000a0fe0 T copro_handle_mm_fault c0000000000a11d0 T copro_calculate_slb c0000000000a1710 t note_page_update_state c0000000000a1810 t note_page c0000000000a1cb0 T pt_dump_size c0000000000a1d90 T ptdump_check_wx c0000000000a1eb0 t __patch_instruction c0000000000a1f40 T is_conditional_branch c0000000000a1fb0 t text_area_cpu_down c0000000000a2080 t put_patching_mm c0000000000a2120 t text_area_cpu_down_mm c0000000000a21d0 t text_area_cpu_up_mm c0000000000a2370 T patch_instruction c0000000000a2850 t text_area_cpu_up c0000000000a2e30 T raw_patch_instruction c0000000000a2ec0 T patch_branch c0000000000a2f20 T create_cond_branch c0000000000a2f90 T instr_is_relative_branch c0000000000a2fd0 T instr_is_relative_link_branch c0000000000a3040 T branch_target c0000000000a30d0 T translate_branch c0000000000a3240 t patch_feature_section_mask c0000000000a34f0 t do_feature_fixups_mask c0000000000a3600 t do_patch_entry_fixups c0000000000a37e0 t __do_stf_barrier_fixups c0000000000a3b20 t __do_entry_flush_fixups c0000000000a3d50 t __do_rfi_flush_fixups c0000000000a4020 T do_feature_fixups c0000000000a4040 T do_stf_barrier_fixups c0000000000a4160 T do_uaccess_flush_fixups c0000000000a4450 T do_entry_flush_fixups c0000000000a44b0 T do_rfi_flush_fixups c0000000000a45e0 T do_barrier_nospec_fixups_range c0000000000a4760 T do_barrier_nospec_fixups c0000000000a4970 T do_lwsync_fixups c0000000000a4a70 T arch_invalidate_pmem c0000000000a4b80 T arch_wb_cache_pmem c0000000000a4c90 T memcpy_flushcache c0000000000a4db0 T __copy_from_user_flushcache c0000000000a4fc0 t create_branch.isra.0 c0000000000a5030 T strncpy c0000000000a507c T strncmp c0000000000a50b4 T memchr c0000000000a50f0 T memcmp c0000000000a57f4 T __copy_tofrom_user_power7 c0000000000a5fa0 T copypage_power7 c0000000000a6160 T memcpy_power7 c0000000000a6930 T search_kernel_soft_mask_table c0000000000a6a50 T search_kernel_restart_table c0000000000a6ae0 t steal_spins_set c0000000000a6b10 t steal_spins_get c0000000000a6b40 t remote_steal_spins_set c0000000000a6b70 t remote_steal_spins_get c0000000000a6ba0 t head_spins_set c0000000000a6bd0 t head_spins_get c0000000000a6c00 T queued_spin_lock_slowpath c0000000000a6ff0 t fops_head_spins_open c0000000000a7050 t fops_remote_steal_spins_open c0000000000a70b0 t fops_steal_spins_open c0000000000a7160 T __csum_partial c0000000000a72e4 T csum_partial_copy_generic c0000000000a74e0 T csum_ipv6_magic c0000000000a7530 T csum_and_copy_from_user c0000000000a7670 T csum_and_copy_to_user c0000000000a77c8 T __arch_clear_user c0000000000a7930 T emulate_update_regs c0000000000a7c10 T emulate_dcbz c0000000000a7f80 t do_fp_load c0000000000a85d0 t do_fp_store c0000000000a8bc0 T emulate_vsx_load c0000000000a9230 T emulate_vsx_store c0000000000a97d0 T analyse_instr c0000000000ae600 t read_mem.part.0 c0000000000aeb00 t read_mem c0000000000aeb70 t write_mem.part.0 c0000000000aeff0 t write_mem c0000000000af060 T emulate_loadstore c0000000000b1610 T emulate_step c0000000000b19c4 T get_fpr c0000000000b1b00 T put_fpr c0000000000b1c3c T get_vr c0000000000b1d78 T put_vr c0000000000b1eb4 T get_vsr c0000000000b20d4 T put_vsr c0000000000b22f4 T load_vsrn c0000000000b234c T store_vsrn c0000000000b239c T conv_sp_to_dp c0000000000b23c8 T conv_dp_to_sp c0000000000b23f4 T ftr_fixup_test1 c0000000000b2400 T end_ftr_fixup_test1 c0000000000b2400 T ftr_fixup_test1_orig c0000000000b240c T ftr_fixup_test1_expected c0000000000b2418 T ftr_fixup_test2 c0000000000b2424 T end_ftr_fixup_test2 c0000000000b2424 T ftr_fixup_test2_orig c0000000000b2430 T ftr_fixup_test2_alt c0000000000b2434 T ftr_fixup_test2_expected c0000000000b2440 T ftr_fixup_test3 c0000000000b244c T end_ftr_fixup_test3 c0000000000b244c T ftr_fixup_test3_orig c0000000000b2458 T ftr_fixup_test3_alt c0000000000b2460 T ftr_fixup_test4 c0000000000b2478 T end_ftr_fixup_test4 c0000000000b2478 T ftr_fixup_test4_expected c0000000000b2490 T ftr_fixup_test4_orig c0000000000b24a8 T ftr_fixup_test4_alt c0000000000b24b0 T ftr_fixup_test5 c0000000000b24d4 T end_ftr_fixup_test5 c0000000000b24d4 T ftr_fixup_test5_expected c0000000000b24f8 T ftr_fixup_test6 c0000000000b2520 T end_ftr_fixup_test6 c0000000000b2520 T ftr_fixup_test6_expected c0000000000b2548 T ftr_fixup_test7 c0000000000b2570 T end_ftr_fixup_test7 c0000000000b2574 T ftr_fixup_test7_expected c0000000000b2598 T ftr_fixup_test_FTR_macros c0000000000b2744 T ftr_fixup_test_FTR_macros_expected c0000000000b28f0 T ftr_fixup_test_FW_FTR_macros c0000000000b2a9c T ftr_fixup_test_FW_FTR_macros_expected c0000000000b2c48 T lwsync_fixup_test c0000000000b2c50 T end_lwsync_fixup_test c0000000000b2c50 T lwsync_fixup_test_expected_LWSYNC c0000000000b2c58 T lwsync_fixup_test_expected_SYNC c0000000000b2c60 T ftr_fixup_prefix1 c0000000000b2c70 T end_ftr_fixup_prefix1 c0000000000b2c70 T ftr_fixup_prefix1_orig c0000000000b2c80 T ftr_fixup_prefix1_expected c0000000000b2c90 T ftr_fixup_prefix2 c0000000000b2ca0 T end_ftr_fixup_prefix2 c0000000000b2ca0 T ftr_fixup_prefix2_orig c0000000000b2cb0 T ftr_fixup_prefix2_alt c0000000000b2cb8 T ftr_fixup_prefix2_expected c0000000000b2cc8 T ftr_fixup_prefix3 c0000000000b2cdc T end_ftr_fixup_prefix3 c0000000000b2cdc T ftr_fixup_prefix3_orig c0000000000b2cf0 T ftr_fixup_prefix3_alt c0000000000b2cfc T ftr_fixup_prefix3_expected c0000000000b2ed0 T __xor_altivec_2 c0000000000b2f70 T __xor_altivec_3 c0000000000b3030 T __xor_altivec_4 c0000000000b3120 T __xor_altivec_5 c0000000000b3240 T xor_altivec_5 c0000000000b3370 T xor_altivec_2 c0000000000b3450 T xor_altivec_3 c0000000000b3550 T xor_altivec_4 c0000000000b365c T copy_page c0000000000b3800 T __copy_tofrom_user c0000000000b380c T __copy_tofrom_user_base c0000000000b3db0 T __memset16 c0000000000b3db4 T __memset32 c0000000000b3db8 T __memset64 c0000000000b3dc8 T memset c0000000000b3ecc T memmove c0000000000b3ee0 T backwards_memcpy c0000000000b3f78 T __arch_hweight8 c0000000000b3f84 T __arch_hweight16 c0000000000b3f98 T __arch_hweight32 c0000000000b3fb4 T __arch_hweight64 c0000000000b4080 T memcpy c0000000000b4110 T copy_mc_generic c0000000000b4390 T enter_vmx_usercopy c0000000000b4420 T exit_vmx_usercopy c0000000000b44c0 T enter_vmx_ops c0000000000b4540 T exit_vmx_ops c0000000000b45c4 T do_lq c0000000000b45e0 T do_stq c0000000000b45f4 T do_lqarx c0000000000b4610 T do_stqcx c0000000000b4630 t mpic_mask_ipi c0000000000b4640 t mpic_host_match c0000000000b46f0 t mpic_init_sys c0000000000b4790 t mpic_host_xlate c0000000000b4a20 t cpumask_weight.constprop.0 c0000000000b4a70 t _mpic_write c0000000000b4b40 t _mpic_read c0000000000b4bb0 t _mpic_map_mmio.isra.0 c0000000000b4c20 t mpic_suspend c0000000000b4de0 t mpic_resume c0000000000b4f80 T mpic_end_irq c0000000000b5080 t mpic_end_ipi c0000000000b5180 t _mpic_irq_write c0000000000b5270 t _mpic_cpu_write c0000000000b5370 t mpic_unmask_ipi c0000000000b54a0 t mpic_unmask_tm c0000000000b5620 t mpic_mask_tm c0000000000b57a0 T mpic_unmask_irq c0000000000b59e0 T mpic_mask_irq c0000000000b5c20 T mpic_set_affinity c0000000000b5e50 T mpic_set_irq_type c0000000000b6160 t _mpic_get_one_irq c0000000000b6470 t mpic_cascade c0000000000b6560 T mpic_get_irq c0000000000b6590 T mpic_set_vector c0000000000b6760 T fsl_mpic_primary_get_version c0000000000b6800 T mpic_irq_set_priority c0000000000b6ba0 t mpic_host_map c0000000000b6eb0 T mpic_setup_this_cpu c0000000000b7140 T mpic_cpu_get_priority c0000000000b7200 T mpic_cpu_set_priority c0000000000b72f0 T mpic_teardown_this_cpu c0000000000b75e0 T mpic_get_one_irq c0000000000b7600 T mpic_get_coreint_irq c0000000000b7610 T mpic_get_mcirq c0000000000b7640 T smp_mpic_message_pass c0000000000b7810 T smp_mpic_setup_cpu c0000000000b7830 T mpic_reset_core c0000000000b7ab0 T mpic_msi_reserve_hwirq c0000000000b7b10 t u3msi_teardown_msi_irqs c0000000000b7c10 t mpic_u3msi_unmask_irq c0000000000b7c70 t mpic_u3msi_mask_irq c0000000000b7cd0 t find_ht_magic_addr.isra.0 c0000000000b7e40 t u3msi_setup_msi_irqs c0000000000b8240 T msi_bitmap_free_hwirqs c0000000000b8310 T msi_bitmap_alloc_hwirqs c0000000000b84c0 T msi_bitmap_reserve_hwirq c0000000000b8580 T msi_bitmap_reserve_dt_hwirqs c0000000000b87b0 T msi_bitmap_free c0000000000b8860 T msi_bitmap_alloc c0000000000b8a00 t i8259_host_xlate c0000000000b8a70 t i8259_host_match c0000000000b8b20 t i8259_host_map c0000000000b8c00 t i8259_mask_irq c0000000000b8e50 t i8259_unmask_irq c0000000000b90a0 t i8259_mask_and_ack_irq c0000000000b9410 T i8259_irq c0000000000b9910 T i8259_init c0000000000b9fb0 t xics_ipi_unmask c0000000000b9fc0 t xics_host_match c0000000000ba060 t xics_host_map c0000000000ba1f0 t xics_host_domain_alloc c0000000000ba320 t xics_host_domain_free c0000000000ba3b0 t xics_set_cpu_giq.part.0 c0000000000ba4b0 t xics_ipi_mask c0000000000ba4c0 t xics_host_xlate c0000000000ba540 t xics_host_domain_translate c0000000000ba5c0 T xics_update_irq_servers c0000000000ba790 T xics_set_cpu_giq c0000000000ba820 T xics_setup_cpu c0000000000ba8d0 T xics_migrate_irqs_away c0000000000bac00 T xics_get_irq_server c0000000000bada0 T xics_set_irq_type c0000000000bae40 T xics_retrigger c0000000000baea8 T xics_mask_unknown_vec c0000000000baf40 T xics_wake_cpu c0000000000bafa0 t icp_native_cause_ipi c0000000000bb030 t icp_native_teardown_cpu c0000000000bb0a0 t icp_native_set_cpu_priority c0000000000bb130 t icp_native_ipi_action c0000000000bb1d0 t icp_native_get_irq c0000000000bb3d0 t icp_native_flush_ipi c0000000000bb440 T icp_native_eoi c0000000000bb570 T icp_native_cause_ipi_rm c0000000000bb5c0 T icp_native_flush_interrupt c0000000000bb718 t of_address_count c0000000000bb7f0 t icp_hv_ipi_action c0000000000bb8c0 t icp_hv_set_cppr c0000000000bb950 t icp_hv_get_irq c0000000000bbb80 t icp_hv_set_cpu_priority c0000000000bbc50 t icp_hv_flush_ipi c0000000000bbce0 t icp_hv_eoi c0000000000bbe00 t icp_hv_cause_ipi c0000000000bbed0 t icp_hv_teardown_cpu c0000000000bbfa0 t ics_rtas_host_match c0000000000bbff0 t ics_rtas_get_server c0000000000bc0a0 t ics_rtas_check c0000000000bc190 t ics_rtas_unmask_irq c0000000000bc2e0 t ics_rtas_startup c0000000000bc320 t ics_rtas_set_affinity c0000000000bc540 t ics_rtas_mask_real_irq.part.0 c0000000000bc650 t ics_rtas_mask_unknown c0000000000bc680 t ics_rtas_mask_irq c0000000000bc6b0 t ics_opal_host_match c0000000000bc6c0 t ics_opal_get_server c0000000000bc770 t ics_opal_mask_irq c0000000000bc830 t ics_opal_check c0000000000bc900 t ics_opal_unmask_irq c0000000000bc9f0 t ics_opal_set_affinity c0000000000bcc10 t ics_opal_mask_unknown c0000000000bcd20 t ics_opal_startup c0000000000bce10 t icp_opal_cause_ipi c0000000000bcea0 t icp_opal_teardown_cpu c0000000000bcef0 t icp_opal_ipi_action c0000000000bcf80 t icp_opal_flush_ipi c0000000000bcfd0 t icp_opal_set_cpu_priority c0000000000bd050 t icp_opal_eoi c0000000000bd110 t icp_opal_get_irq c0000000000bd330 T icp_opal_flush_interrupt c0000000000bd4a0 T is_xive_irq c0000000000bd4d0 t xive_ipi_do_nothing c0000000000bd4e0 t xive_irq_domain_match c0000000000bd540 t xive_esb_read c0000000000bd650 t xive_setup_cpu c0000000000bd720 t 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c0000000000bf550 t xive_irq_domain_alloc c0000000000bf720 t xive_irq_domain_map c0000000000bf7d0 t xive_flush_cpu_queue.isra.0 c0000000000bf920 t xive_setup_cpu_ipi c0000000000bfc60 t xive_irq_domain_xlate c0000000000bfce0 t xive_irq_domain_translate c0000000000bfd60 t xive_ipi_eoi c0000000000bfe10 t xive_ipi_debug_show c0000000000bfef0 t xive_find_target_in_mask c0000000000c0120 t xive_pick_irq_target.isra.0 c0000000000c0380 t xive_irq_startup c0000000000c0590 t xive_irq_set_affinity c0000000000c0830 t xive_irq_domain_free c0000000000c0930 t xive_irq_domain_unmap c0000000000c0a00 t xive_irq_mask c0000000000c0af0 t xive_get_irqchip_state c0000000000c0c50 T xmon_xive_do_dump c0000000000c0dc0 T xmon_xive_get_irq_config c0000000000c0f90 T xmon_xive_get_irq_all c0000000000c1060 T xive_smp_setup_cpu c0000000000c1130 T xive_smp_prepare_cpu c0000000000c11a0 T xive_smp_disable_cpu c0000000000c1280 T xive_flush_interrupt c0000000000c12b0 T xive_shutdown c0000000000c1310 T xive_queue_page_alloc c0000000000c1410 T xive_core_debug_init c0000000000c1680 T xive_native_default_eq_shift c0000000000c16a0 T xive_native_has_single_escalation c0000000000c16c0 T xive_native_has_save_restore c0000000000c16e0 T xive_native_populate_irq_data c0000000000c1910 T xive_native_configure_irq c0000000000c19d0 T xive_native_get_queue_info c0000000000c1b70 T xive_native_configure_queue c0000000000c1dd0 T xive_native_alloc_irq_on_chip c0000000000c1ea0 t xive_native_get_ipi c0000000000c1f60 T xive_native_free_irq c0000000000c1fe0 T xive_native_sync_source c0000000000c2030 T xive_native_sync_queue c0000000000c2080 t xive_native_shutdown c0000000000c20c0 t xive_native_debug_create c0000000000c2120 t xive_native_update_pending c0000000000c2270 t xive_native_match c0000000000c22c0 t xive_native_teardown_cpu c0000000000c2390 T xive_native_enable_vp c0000000000c2450 T xive_native_disable_vp c0000000000c2500 t xive_native_setup_cpu c0000000000c2700 T xive_native_get_vp_info c0000000000c2800 t xive_native_prepare_cpu c0000000000c2860 t xive_native_setup_queue c0000000000c2960 t xive_native_get_irq_config c0000000000c2a30 T xive_native_alloc_vp_block c0000000000c2bf0 T xive_native_get_queue_state c0000000000c2d00 T xive_native_set_queue_state c0000000000c2d90 T xive_native_has_queue_state_support c0000000000c2e10 T xive_native_get_vp_state c0000000000c2ef0 t xive_native_put_ipi c0000000000c2fa0 T xive_native_free_vp_block c0000000000c3010 t xive_native_cleanup_queue c0000000000c3140 T xive_native_disable_queue c0000000000c3210 t xive_spapr_match c0000000000c3220 t xive_spapr_put_ipi c0000000000c3370 t xive_spapr_teardown_cpu c0000000000c3380 t xive_spapr_debug_show c0000000000c34b0 t xive_spapr_get_ipi c0000000000c3660 t xive_spapr_update_pending c0000000000c3740 t xive_spapr_setup_cpu c0000000000c3830 t xive_spapr_populate_irq_data c0000000000c3b40 t xive_spapr_shutdown c0000000000c3c60 t xive_spapr_sync_source c0000000000c3d90 t plpar_int_set_queue_config c0000000000c3f70 t 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opal_cec_reboot c0000000000c5e40 T opal_cec_reboot2 c0000000000c5ea0 T opal_read_nvram c0000000000c5f00 T opal_write_nvram c0000000000c5f60 T opal_handle_interrupt c0000000000c5fc0 T opal_poll_events c0000000000c6020 T opal_pci_set_hub_tce_memory c0000000000c6080 T opal_pci_set_phb_tce_memory c0000000000c60e0 T opal_pci_config_read_byte c0000000000c6140 T opal_pci_config_read_half_word c0000000000c61a0 T opal_pci_config_read_word c0000000000c6200 T opal_pci_config_write_byte c0000000000c6260 T opal_pci_config_write_half_word c0000000000c62c0 T opal_pci_config_write_word c0000000000c6320 T opal_set_xive c0000000000c6380 T opal_get_xive c0000000000c63e0 T opal_register_exception_handler c0000000000c6440 T opal_pci_eeh_freeze_status c0000000000c64a0 T opal_pci_eeh_freeze_clear c0000000000c6500 T opal_pci_eeh_freeze_set c0000000000c6560 T opal_pci_err_inject c0000000000c65c0 T opal_pci_shpc c0000000000c6620 T opal_pci_phb_mmio_enable c0000000000c6680 T opal_pci_set_phb_mem_window c0000000000c66e0 T opal_pci_map_pe_mmio_window c0000000000c6740 T opal_pci_set_phb_table_memory c0000000000c67a0 T opal_pci_set_pe c0000000000c6800 T opal_pci_set_peltv c0000000000c6860 T opal_pci_get_xive_reissue c0000000000c68c0 T opal_pci_set_xive_reissue c0000000000c6920 T opal_pci_set_xive_pe c0000000000c6980 T opal_get_xive_source c0000000000c69e0 T opal_get_msi_32 c0000000000c6a40 T opal_get_msi_64 c0000000000c6aa0 T opal_start_cpu c0000000000c6b00 T opal_query_cpu_status c0000000000c6b60 T opal_write_oppanel c0000000000c6bc0 T opal_pci_map_pe_dma_window c0000000000c6c20 T opal_pci_map_pe_dma_window_real c0000000000c6c80 T opal_pci_reset c0000000000c6ce0 T opal_pci_get_hub_diag_data c0000000000c6d40 T opal_pci_get_phb_diag_data c0000000000c6da0 T opal_pci_fence_phb c0000000000c6e00 T opal_pci_reinit c0000000000c6e60 T opal_pci_mask_pe_error c0000000000c6ec0 T opal_set_slot_led_status c0000000000c6f20 T opal_get_epow_status c0000000000c6f80 T opal_get_dpo_status c0000000000c6fe0 T opal_set_system_attention_led c0000000000c7040 T opal_pci_next_error c0000000000c70a0 T opal_pci_poll c0000000000c7100 T opal_pci_msi_eoi c0000000000c7160 T opal_pci_get_phb_diag_data2 c0000000000c71c0 T opal_xscom_read c0000000000c7220 T opal_xscom_write c0000000000c7280 T opal_lpc_read c0000000000c72e0 T opal_lpc_write c0000000000c7340 T opal_return_cpu c0000000000c73a0 T opal_reinit_cpus c0000000000c7400 T opal_read_elog c0000000000c7460 T opal_send_ack_elog c0000000000c74c0 T opal_get_elog_size c0000000000c7520 T opal_resend_pending_logs c0000000000c7580 T opal_write_elog c0000000000c75e0 T opal_validate_flash c0000000000c7640 T opal_manage_flash c0000000000c76a0 T opal_update_flash c0000000000c7700 T opal_resync_timebase c0000000000c7760 T opal_check_token c0000000000c77c0 T opal_dump_init c0000000000c7820 T opal_dump_info c0000000000c7880 T opal_dump_info2 c0000000000c78e0 T opal_dump_read c0000000000c7940 T opal_dump_ack c0000000000c79a0 T opal_get_msg c0000000000c7a00 T opal_write_oppanel_async c0000000000c7a60 T opal_check_completion c0000000000c7ac0 T opal_dump_resend_notification c0000000000c7b20 T opal_sync_host_reboot c0000000000c7b80 T opal_sensor_read c0000000000c7be0 T opal_get_param c0000000000c7c40 T opal_set_param c0000000000c7ca0 T opal_handle_hmi c0000000000c7d00 T opal_handle_hmi2 c0000000000c7d60 T opal_config_cpu_idle_state c0000000000c7dc0 T opal_slw_set_reg c0000000000c7e20 T opal_register_dump_region c0000000000c7e80 T opal_unregister_dump_region c0000000000c7ee0 T opal_pci_set_phb_cxl_mode c0000000000c7f40 T opal_tpo_write c0000000000c7fa0 T opal_tpo_read c0000000000c8000 T opal_ipmi_send c0000000000c8060 T opal_ipmi_recv c0000000000c80c0 T opal_i2c_request c0000000000c8120 T opal_flash_read c0000000000c8180 T opal_flash_write c0000000000c81e0 T opal_flash_erase c0000000000c8240 T opal_prd_msg c0000000000c82a0 T opal_leds_get_ind c0000000000c8300 T opal_leds_set_ind c0000000000c8360 T opal_console_flush c0000000000c83c0 T opal_get_device_tree c0000000000c8420 T opal_pci_get_presence_state c0000000000c8480 T opal_pci_get_power_state c0000000000c84e0 T opal_pci_set_power_state c0000000000c8540 T opal_int_get_xirr c0000000000c85a0 T opal_int_set_cppr c0000000000c8600 T opal_int_eoi c0000000000c8660 T opal_int_set_mfrr c0000000000c86c0 T opal_pci_tce_kill c0000000000c8720 T opal_nmmu_set_ptcr c0000000000c8780 T opal_xive_reset c0000000000c87e0 T opal_xive_get_irq_info c0000000000c8840 T opal_xive_get_irq_config c0000000000c88a0 T opal_xive_set_irq_config c0000000000c8900 T opal_xive_get_queue_info c0000000000c8960 T opal_xive_set_queue_info c0000000000c89c0 T opal_xive_donate_page c0000000000c8a20 T opal_xive_alloc_vp_block c0000000000c8a80 T opal_xive_free_vp_block c0000000000c8ae0 T opal_xive_allocate_irq_raw c0000000000c8b40 T opal_xive_free_irq c0000000000c8ba0 T opal_xive_get_vp_info c0000000000c8c00 T opal_xive_set_vp_info c0000000000c8c60 T opal_xive_sync c0000000000c8cc0 T opal_xive_dump c0000000000c8d20 T opal_xive_get_queue_state c0000000000c8d80 T opal_xive_set_queue_state c0000000000c8de0 T opal_xive_get_vp_state c0000000000c8e40 T opal_signal_system_reset c0000000000c8ea0 T opal_npu_map_lpar c0000000000c8f00 T opal_imc_counters_init c0000000000c8f60 T opal_imc_counters_start c0000000000c8fc0 T opal_imc_counters_stop c0000000000c9020 T opal_get_powercap c0000000000c9080 T opal_set_powercap c0000000000c90e0 T opal_get_power_shift_ratio c0000000000c9140 T opal_set_power_shift_ratio c0000000000c91a0 T opal_sensor_group_clear c0000000000c9200 T opal_quiesce c0000000000c9260 T opal_npu_spa_setup c0000000000c92c0 T opal_npu_spa_clear_cache c0000000000c9320 T opal_npu_tl_set c0000000000c9380 T opal_pci_get_pbcq_tunnel_bar c0000000000c93e0 T opal_pci_set_pbcq_tunnel_bar c0000000000c9440 T opal_sensor_read_u64 c0000000000c94a0 T opal_sensor_group_enable c0000000000c9500 T opal_nx_coproc_init c0000000000c9560 T opal_mpipl_update c0000000000c95c0 T opal_mpipl_register_tag c0000000000c9620 T opal_mpipl_query_tag c0000000000c9680 T opal_secvar_get c0000000000c96e0 T opal_secvar_get_next c0000000000c9740 T opal_secvar_enqueue_update c0000000000c979c T __opal_call c0000000000c97e4 t opal_return c0000000000c9820 T opal_error_code c0000000000c9a30 T opal_message_notifier_unregister c0000000000c9a80 t __opal_put_chars c0000000000c9d80 t __opal_flush_console c0000000000c9ea0 t export_attr_read c0000000000c9f10 T opal_message_notifier_register c0000000000ca100 t kopald c0000000000ca220 t opal_add_one_export c0000000000ca3c0 t opal_add_exported_attrs c0000000000ca810 t opal_message_notify c0000000000caaf0 T opal_get_chars c0000000000cac10 T opal_put_chars c0000000000cac30 T opal_put_chars_atomic c0000000000cac50 T opal_flush_console c0000000000caef0 T opal_flush_chars c0000000000cafd0 T pnv_platform_error_reboot c0000000000cb080 T opal_machine_check c0000000000cb230 T opal_hmi_exception_early c0000000000cb290 T opal_hmi_exception_early2 c0000000000cb3a0 T opal_handle_hmi_exception c0000000000cb450 T opal_mce_check_early_recovery c0000000000cb5e0 T opal_wake_poller c0000000000cb640 T opal_shutdown c0000000000cb710 T opal_free_sg_list c0000000000cb7c0 T opal_vmalloc_to_sg_list c0000000000cb9c0 T powernv_set_nmmu_ptcr c0000000000cba58 t __machine_is.constprop.0 c0000000000cbaa0 T opal_async_get_token_interruptible c0000000000cbc50 T opal_async_release_token c0000000000cbdc0 T opal_async_wait_response c0000000000cbf90 T opal_async_wait_response_interruptible c0000000000cc1d0 t opal_async_comp_event c0000000000cc350 T pnv_get_supported_cpuidle_states c0000000000cc370 T pnv_power9_force_smt4_catch c0000000000cc620 T pnv_power9_force_smt4_release c0000000000cc6d0 t store_fastsleep_workaround_applyonce c0000000000cc840 t show_fastsleep_workaround_applyonce c0000000000cc8a0 t pnv_fastsleep_workaround_apply c0000000000cc940 t power10_idle_stop c0000000000ccce0 t power7_idle_insn c0000000000cd500 t power7_idle c0000000000cd5c0 t power9_idle_stop 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