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c000000000089820 T radix__switch_mmu_context c000000000089840 T cleanup_cpu_mmu_context c0000000000898d0 t do_serialize c000000000089920 T mmu_partition_table_set_entry c000000000089b30 T pmdp_set_access_flags c000000000089c90 T pmdp_test_and_clear_young c000000000089d90 T set_pmd_at c000000000089ec0 T serialize_against_pte_lookup c000000000089f20 T pmdp_invalidate c00000000008a020 T pmdp_huge_get_and_clear_full c00000000008a120 T pfn_pmd c00000000008a190 T mk_pmd c00000000008a210 T pmd_modify c00000000008a270 T mmu_cleanup_all c00000000008a370 T pmd_fragment_alloc c00000000008a5d0 T pmd_fragment_free c00000000008a770 T pgtable_free_tlb c00000000008a7c0 T __tlb_remove_table c00000000008a920 T arch_report_meminfo c00000000008aa00 T ptep_modify_prot_start c00000000008ab30 T ptep_modify_prot_commit c00000000008abc0 T pmd_move_must_withdraw c00000000008ac10 T __flush_tlb_pending c00000000008ad20 T hpte_need_flush c00000000008b240 T hash__tlb_flush c00000000008b2b0 T __flush_hash_table_range c00000000008b430 T flush_tlb_pmd_range c00000000008b670 t ___tlbie c00000000008b770 t native_hpte_clear c00000000008b980 t __tlbiel c00000000008bb00 t native_hpte_remove c00000000008bc70 t native_hpte_insert c00000000008be80 t native_hpte_find c00000000008c050 t native_flush_hash_range c00000000008c740 t tlbie c00000000008c9c0 t native_hpte_removebolted c00000000008cc00 t native_hpte_updatepp c00000000008ce60 t native_hpte_updateboltedpp c00000000008d0a0 t native_hugepage_invalidate c00000000008d3b0 t native_hpte_invalidate c00000000008d5e0 T hash__tlbiel_all c00000000008d7d0 t radix__change_memory_range c00000000008db40 t __map_kernel_page c00000000008e270 T radix__map_kernel_page c00000000008e290 T radix__mark_rodata_ro c00000000008e2b0 T radix__mark_initmem_nx c00000000008e2d0 T radix__early_init_mmu_secondary c00000000008e3e0 T radix__mmu_cleanup_all c00000000008e470 T radix__pmd_hugepage_update c00000000008e5c0 T radix__pmdp_collapse_flush c00000000008e640 T radix__pgtable_trans_huge_deposit c00000000008e770 T radix__pgtable_trans_huge_withdraw c00000000008e840 T radix__pmdp_huge_get_and_clear c00000000008e940 T radix__ptep_set_access_flags c00000000008eaa0 T radix__ptep_modify_prot_commit c00000000008ebb0 T pud_set_huge c00000000008ec80 T pud_clear_huge c00000000008ecc0 T pud_free_pmd_page c00000000008ee30 T pmd_set_huge c00000000008ef00 T pmd_clear_huge c00000000008ef40 T pmd_free_pte_page c00000000008eff0 t early_alloc_pgtable c00000000008f0ec t pte_update.constprop.0.isra.0 c00000000008f210 t pseries_rpt_invalidate.part.0 c00000000008f220 t fixup_tlbie_pid c00000000008f3a0 t fixup_tlbie_va c00000000008f530 t fixup_tlbie_pid_lpid c00000000008f6c0 T radix__flush_pwc_lpid c00000000008f7b0 t __tlbie_va_range c00000000008fa10 T radix__flush_tlb_lpid_page c00000000008fc80 t do_tlbiel_va_range c00000000008fe40 T radix__flush_all_lpid c000000000090040 t _tlbie_va_range c000000000090350 t _tlbiel_pid c000000000090510 t do_tlbiel_pid c000000000090600 T radix__local_flush_tlb_mm c000000000090660 t do_tlbiel_kernel c000000000090680 t do_tlbiel_va c000000000090810 t _tlbie_pid c000000000090a70 t _tlbiel_va_range_multicast c000000000090db0 T radix__flush_tlb_kernel_range c000000000091230 T do_h_rpt_invalidate_prt c000000000091760 T radix__tlbiel_all c0000000000919b0 T radix__local_flush_tlb_page_psize c000000000091ac0 T radix__local_flush_tlb_page c000000000091b30 T exit_lazy_flush_tlb c000000000091cf0 t flush_type_needed c000000000091fa0 T radix__flush_tlb_mm c0000000000922e0 t __flush_all_mm c000000000092600 T radix__flush_all_mm c000000000092610 T radix__flush_tlb_range c000000000092dd0 t __radix__flush_tlb_range_psize c000000000093310 T radix__flush_pmd_tlb_range c000000000093330 t do_exit_flush_lazy_tlb c000000000093340 T radix__flush_tlb_page_psize c0000000000936f0 T radix__flush_tlb_page c000000000093760 T radix__flush_all_lpid_guest c000000000093960 T radix__tlb_flush c000000000093a60 T radix__flush_tlb_range_psize c000000000093a70 T radix__flush_tlb_pwc_range_psize c000000000093a80 T radix__flush_tlb_collapsed_pmd c000000000093de0 T radix__flush_tlb_all c000000000093e10 T __rpte_sub_valid c000000000093e30 T __hash_page_4K c000000000094440 T __hash_page_64K c000000000094990 T __hash_page_huge c000000000094d90 T huge_ptep_modify_prot_start c000000000094ec0 T huge_ptep_modify_prot_commit c000000000094f50 T hugetlbpage_init_default c000000000094fc0 T radix__flush_hugetlb_page c0000000000951a0 T radix__local_flush_hugetlb_page c000000000095380 T radix__flush_hugetlb_tlb_range c000000000095520 T radix__hugetlb_get_unmapped_area c000000000095850 T radix__huge_ptep_modify_prot_commit c000000000095960 T __hash_page_thp c000000000095f40 t subpage_walk_pmd_entry c0000000000960f0 t hpte_flush_range c0000000000964a0 T __se_sys_subpage_prot c0000000000964a0 T sys_subpage_prot c000000000096cd0 T subpage_prot_free c000000000096e10 T mm_iommu_preregistered c000000000096e30 T mm_iommu_ua_to_hpa c000000000096ef0 T mm_iommu_mapped_inc c000000000096f40 T mm_iommu_get c000000000097050 T mm_iommu_put c0000000000971e0 T mm_iommu_lookup c000000000097280 T mm_iommu_is_devmem c000000000097390 t mm_iommu_do_alloc c000000000097940 T mm_iommu_new c000000000097960 T mm_iommu_newdev c000000000097970 t mm_iommu_free c000000000097ad0 T mm_iommu_mapped_dec c000000000097b20 T mm_iommu_lookup_rm c000000000097b90 T mm_iommu_ua_to_hpa_rm c000000000097cc0 T mm_iommu_ua_mark_dirty_rm c000000000097dd0 T mm_iommu_init c000000000097df0 t pkey_access_permitted c000000000097eb0 T setup_kuep c000000000097f80 T setup_kuap c000000000098050 T pkey_mm_init c000000000098090 T __arch_set_user_pkey_access c0000000000981d0 T execute_only_pkey c0000000000981e0 T __arch_override_mprotect_pkey c000000000098290 T arch_pte_access_permitted c0000000000982d0 T arch_vma_access_permitted c000000000098350 T arch_dup_pkeys c000000000098380 t arch_set_bit c0000000000983d0 t ppc_numa_cpu_dead c0000000000983e0 t __first_node c000000000098450 t __associativity_to_nid c0000000000984e0 t associativity_to_nid c000000000098500 t read_n_cells c000000000098570 t of_get_assoc_arrays c0000000000986a0 T __node_distance c0000000000987b0 t __initialize_form1_numa_distance.part.0 c0000000000988a0 t initialize_form1_numa_distance c0000000000988d0 T of_node_to_nid c0000000000989e0 t of_node_to_nid_single c000000000098a50 T map_cpu_to_node c000000000098af0 t numa_setup_cpu c000000000098e70 t ppc_numa_cpu_prepare c000000000098f70 T unmap_cpu_from_node c000000000099060 T cpu_relative_distance c0000000000991d0 T update_numa_distance c0000000000992e0 T of_drconf_to_nid_single c000000000099420 T hot_add_scn_to_nid c000000000099890 T memory_hotplug_max c000000000099968 t __next_node c0000000000999d8 t node_set_online c000000000099a40 T get_slice_psize c000000000099ac0 t slice_range_to_mask c000000000099c00 t slice_scan_available c000000000099cc0 t slice_flush_segments c000000000099d40 t slice_check_range_fits.constprop.0 c000000000099ec0 t slice_find_area_bottomup.constprop.0 c00000000009a0d0 t slice_find_area_topdown c00000000009a3a0 t slice_convert c00000000009a6a0 T slice_get_unmapped_area c00000000009b130 T arch_get_unmapped_area c00000000009b160 T arch_get_unmapped_area_topdown c00000000009b190 T slice_init_new_context_exec c00000000009b3c0 T slice_setup_new_exec c00000000009b430 T slice_set_range_psize c00000000009b500 T slice_is_hugepage_only_range c00000000009b650 t mmu_psize_to_shift.part.0 c00000000009b660 T huge_pte_offset c00000000009b6b0 T huge_pte_alloc c00000000009bcd0 T hugetlb_free_pgd_range c00000000009c520 T follow_huge_pd c00000000009c810 T hugetlb_get_unmapped_area c00000000009c930 T vma_mmu_pagesize c00000000009c9b0 T copro_flush_all_slbs c00000000009c9f0 T copro_handle_mm_fault c00000000009cbf0 T copro_calculate_slb c00000000009d120 t note_page_update_state c00000000009d220 t note_page c00000000009d740 T pt_dump_size c00000000009d800 T ptdump_check_wx c00000000009d910 T zalloc_maybe_bootmem c00000000009d9d0 t __patch_instruction c00000000009da30 T is_conditional_branch c00000000009daa0 t text_area_cpu_down c00000000009daf0 t text_area_cpu_up c00000000009dbd0 T patch_instruction c00000000009dfb0 T raw_patch_instruction c00000000009e010 T patch_branch c00000000009e060 T is_offset_in_branch_range c00000000009e0b0 T is_offset_in_cond_branch_range c00000000009e0f0 T create_branch c00000000009e160 T create_cond_branch c00000000009e1d0 T instr_is_relative_branch c00000000009e210 T instr_is_relative_link_branch c00000000009e260 T branch_target c00000000009e2f0 T translate_branch c00000000009e408 t instr_is_branch_to_addr c00000000009e490 t patch_feature_section c00000000009e780 t __do_rfi_flush_fixups c00000000009ea00 t __do_stf_barrier_fixups c00000000009ee50 t __do_entry_flush_fixups c00000000009f260 T do_feature_fixups c00000000009f340 T do_stf_barrier_fixups c00000000009f460 T do_uaccess_flush_fixups c00000000009f710 T do_entry_flush_fixups c00000000009f770 T do_rfi_flush_fixups c00000000009f8a0 T do_barrier_nospec_fixups_range c00000000009f9e0 T do_barrier_nospec_fixups c00000000009fb70 T do_lwsync_fixups c00000000009fc70 T arch_invalidate_pmem c00000000009fd70 T arch_wb_cache_pmem c00000000009fe70 T memcpy_flushcache c00000000009ff80 T memcpy_page_flushcache c0000000000a00c0 T __copy_from_user_flushcache c0000000000a02c8 T code_patching_test1 c0000000000a02d0 T code_patching_test1_expected c0000000000a02d0 T end_code_patching_test1 c0000000000a02e0 T strncpy c0000000000a032c T strncmp c0000000000a0364 T memchr c0000000000a03a0 T memcmp c0000000000a0a40 T override_function_with_return c0000000000a0ad4 T __copy_tofrom_user_power7 c0000000000a1280 T copypage_power7 c0000000000a1440 T memcpy_power7 c0000000000a1c10 T search_kernel_soft_mask_table c0000000000a1d20 T search_kernel_restart_table c0000000000a1da0 T __csum_partial c0000000000a1f24 T csum_partial_copy_generic c0000000000a2120 T csum_ipv6_magic c0000000000a2170 T csum_and_copy_from_user c0000000000a22f0 T csum_and_copy_to_user c0000000000a247c T __arch_clear_user c0000000000a25e0 T emulate_update_regs c0000000000a28a0 T emulate_vsx_load c0000000000a2ed0 T emulate_vsx_store c0000000000a3440 T analyse_instr c0000000000a7e30 T emulate_dcbz c0000000000a80f0 t do_fp_load c0000000000a8770 t do_fp_store c0000000000a8ce0 t read_mem c0000000000a94c0 t write_mem c0000000000a9be0 T emulate_loadstore c0000000000ac500 T emulate_step c0000000000ac920 T get_fpr c0000000000aca5c T put_fpr c0000000000acb98 T get_vr c0000000000accd4 T put_vr c0000000000ace10 T get_vsr c0000000000ad030 T put_vsr c0000000000ad250 T load_vsrn c0000000000ad2a8 T store_vsrn c0000000000ad2f8 T conv_sp_to_dp c0000000000ad324 T conv_dp_to_sp c0000000000ad350 T ftr_fixup_test1 c0000000000ad35c T end_ftr_fixup_test1 c0000000000ad35c T ftr_fixup_test1_orig c0000000000ad368 T ftr_fixup_test1_expected c0000000000ad374 T ftr_fixup_test2 c0000000000ad380 T end_ftr_fixup_test2 c0000000000ad380 T ftr_fixup_test2_orig c0000000000ad38c T ftr_fixup_test2_alt c0000000000ad390 T ftr_fixup_test2_expected c0000000000ad39c T ftr_fixup_test3 c0000000000ad3a8 T end_ftr_fixup_test3 c0000000000ad3a8 T ftr_fixup_test3_orig c0000000000ad3b4 T ftr_fixup_test3_alt c0000000000ad3bc T ftr_fixup_test4 c0000000000ad3d4 T end_ftr_fixup_test4 c0000000000ad3d4 T ftr_fixup_test4_expected c0000000000ad3ec T ftr_fixup_test4_orig c0000000000ad404 T ftr_fixup_test4_alt c0000000000ad40c T ftr_fixup_test5 c0000000000ad430 T end_ftr_fixup_test5 c0000000000ad430 T ftr_fixup_test5_expected c0000000000ad454 T ftr_fixup_test6 c0000000000ad47c T end_ftr_fixup_test6 c0000000000ad47c T ftr_fixup_test6_expected c0000000000ad4a4 T ftr_fixup_test7 c0000000000ad4cc T end_ftr_fixup_test7 c0000000000ad4d0 T ftr_fixup_test7_expected c0000000000ad4f4 T ftr_fixup_test_FTR_macros c0000000000ad6a0 T ftr_fixup_test_FTR_macros_expected c0000000000ad84c T ftr_fixup_test_FW_FTR_macros c0000000000ad9f8 T ftr_fixup_test_FW_FTR_macros_expected c0000000000adba4 T lwsync_fixup_test c0000000000adbac T end_lwsync_fixup_test c0000000000adbac T lwsync_fixup_test_expected_LWSYNC c0000000000adbb4 T lwsync_fixup_test_expected_SYNC c0000000000adbbc T ftr_fixup_prefix1 c0000000000adbcc T end_ftr_fixup_prefix1 c0000000000adbcc T ftr_fixup_prefix1_orig c0000000000adbdc T ftr_fixup_prefix1_expected c0000000000adbec T ftr_fixup_prefix2 c0000000000adbfc T end_ftr_fixup_prefix2 c0000000000adbfc T ftr_fixup_prefix2_orig c0000000000adc0c T ftr_fixup_prefix2_alt c0000000000adc14 T ftr_fixup_prefix2_expected c0000000000adc24 T ftr_fixup_prefix3 c0000000000adc38 T end_ftr_fixup_prefix3 c0000000000adc38 T ftr_fixup_prefix3_orig c0000000000adc4c T ftr_fixup_prefix3_alt c0000000000adc58 T ftr_fixup_prefix3_expected c0000000000ade30 T __xor_altivec_2 c0000000000aded0 T __xor_altivec_3 c0000000000adf80 T __xor_altivec_4 c0000000000ae060 T __xor_altivec_5 c0000000000ae170 T xor_altivec_5 c0000000000ae250 T xor_altivec_2 c0000000000ae300 T xor_altivec_3 c0000000000ae3c0 T xor_altivec_4 c0000000000ae488 T copy_page c0000000000ae600 T __copy_tofrom_user c0000000000ae60c T __copy_tofrom_user_base c0000000000aebb0 T __memset16 c0000000000aebb4 T __memset32 c0000000000aebb8 T __memset64 c0000000000aebc8 T memset c0000000000aeccc T memmove c0000000000aece0 T backwards_memcpy c0000000000aed78 T __arch_hweight8 c0000000000aed84 T __arch_hweight16 c0000000000aed98 T __arch_hweight32 c0000000000aedb4 T __arch_hweight64 c0000000000aee80 T memcpy c0000000000aef10 T copy_mc_generic c0000000000af190 T enter_vmx_usercopy c0000000000af240 T exit_vmx_usercopy c0000000000af2d0 T enter_vmx_ops c0000000000af360 T exit_vmx_ops c0000000000af3d4 T do_lq c0000000000af3f0 T do_stq c0000000000af404 T do_lqarx c0000000000af420 T do_stqcx c0000000000af440 t mpic_mask_ipi c0000000000af450 t mpic_host_xlate c0000000000af620 T mpic_get_coreint_irq c0000000000af630 t mpic_host_match c0000000000af6b0 t mpic_init_sys c0000000000af740 t _mpic_write c0000000000af810 t _mpic_read c0000000000af880 t mpic_suspend c0000000000afa10 t mpic_resume c0000000000afba0 t fsl_mpic_get_version c0000000000afc20 T mpic_end_irq c0000000000afd10 t mpic_end_ipi c0000000000afe00 t _mpic_irq_write c0000000000afef0 t _mpic_cpu_write c0000000000afff0 t mpic_unmask_ipi c0000000000b0110 t mpic_mask_tm c0000000000b0280 t mpic_unmask_tm c0000000000b03f0 T mpic_mask_irq c0000000000b0630 T mpic_unmask_irq c0000000000b0870 T mpic_set_affinity c0000000000b0aa0 T mpic_set_irq_type c0000000000b0d80 t _mpic_get_one_irq c0000000000b1080 t mpic_cascade c0000000000b1160 T mpic_get_irq c0000000000b1190 T mpic_set_vector c0000000000b1350 T fsl_mpic_primary_get_version c0000000000b13e0 T mpic_irq_set_priority c0000000000b1770 t mpic_host_map c0000000000b1ae0 T mpic_setup_this_cpu c0000000000b1d60 T mpic_cpu_get_priority c0000000000b1e20 T mpic_cpu_set_priority c0000000000b1f10 T mpic_teardown_this_cpu c0000000000b2200 T mpic_get_one_irq c0000000000b2210 T mpic_get_mcirq c0000000000b2240 T mpic_request_ipis c0000000000b2330 T smp_mpic_message_pass c0000000000b2500 T smp_mpic_setup_cpu c0000000000b2510 T mpic_reset_core c0000000000b2778 t _mpic_map_mmio.constprop.0 c0000000000b27e0 t kmalloc_array.constprop.0 c0000000000b2820 T mpic_msi_reserve_hwirq c0000000000b2880 T mpic_msi_init_allocator c0000000000b29c0 t u3msi_teardown_msi_irqs c0000000000b2a80 t mpic_u3msi_unmask_irq c0000000000b2ad0 t mpic_u3msi_mask_irq c0000000000b2b20 t find_ht_magic_addr.constprop.0.isra.0 c0000000000b2c90 t u3msi_setup_msi_irqs c0000000000b2ff0 T mpic_u3msi_init c0000000000b30b0 T msi_bitmap_free_hwirqs c0000000000b3150 T msi_bitmap_alloc_hwirqs c0000000000b3280 T msi_bitmap_reserve_hwirq c0000000000b3310 T msi_bitmap_reserve_dt_hwirqs c0000000000b3510 T msi_bitmap_free c0000000000b35b0 T msi_bitmap_alloc c0000000000b36e0 t i8259_host_xlate c0000000000b3740 t i8259_host_match c0000000000b37c0 t i8259_host_map c0000000000b3860 t i8259_mask_irq c0000000000b3a60 t i8259_unmask_irq c0000000000b3c60 t i8259_mask_and_ack_irq c0000000000b3fc0 T i8259_irq c0000000000b44a0 T i8259_get_host c0000000000b44c0 T i8259_init c0000000000b4b60 t xics_ipi_unmask c0000000000b4b70 t xics_host_domain_free c0000000000b4b80 t xics_host_match c0000000000b4c10 t xics_host_map c0000000000b4dd0 t xics_host_domain_alloc c0000000000b4ec0 t xics_set_cpu_giq.part.0 c0000000000b4f90 t xics_ipi_mask c0000000000b4fa0 t xics_host_xlate c0000000000b5020 t xics_host_domain_translate c0000000000b50a0 T xics_update_irq_servers c0000000000b5270 T xics_set_cpu_giq c0000000000b52f0 T xics_setup_cpu c0000000000b53a0 T xics_teardown_cpu c0000000000b5440 T xics_kexec_teardown_cpu c0000000000b5500 T xics_migrate_irqs_away c0000000000b5800 T xics_get_irq_server c0000000000b5970 T xics_set_irq_type c0000000000b5a10 T xics_retrigger c0000000000b5a68 T xics_mask_unknown_vec c0000000000b5af0 T xics_wake_cpu c0000000000b5b50 t icp_native_cause_ipi c0000000000b5bd0 t icp_native_teardown_cpu c0000000000b5c30 t icp_native_set_cpu_priority c0000000000b5cb0 t icp_native_ipi_action c0000000000b5d50 t icp_native_get_irq c0000000000b5f30 t icp_native_flush_ipi c0000000000b5f90 T icp_native_eoi c0000000000b60b0 T icp_native_cause_ipi_rm c0000000000b60f0 T icp_native_flush_interrupt c0000000000b6240 t icp_hv_ipi_action c0000000000b6310 t icp_hv_set_cppr c0000000000b6390 t icp_hv_get_irq c0000000000b65c0 t icp_hv_set_cpu_priority c0000000000b6680 t icp_hv_flush_ipi c0000000000b6710 t icp_hv_cause_ipi c0000000000b67e0 t icp_hv_teardown_cpu c0000000000b68b0 t icp_hv_eoi c0000000000b69c0 T icp_hv_init c0000000000b6a70 t ics_rtas_host_match c0000000000b6ac0 t ics_rtas_get_server c0000000000b6b60 t ics_rtas_check c0000000000b6c30 t ics_rtas_set_affinity c0000000000b6e00 t ics_rtas_unmask_irq c0000000000b6f40 t ics_rtas_startup c0000000000b6f70 t ics_rtas_mask_real_irq.part.0 c0000000000b7070 t ics_rtas_mask_unknown c0000000000b7090 t ics_rtas_mask_irq c0000000000b70c0 t ics_opal_host_match c0000000000b70d0 t ics_opal_get_server c0000000000b7160 t ics_opal_mask_irq c0000000000b7220 t ics_opal_check c0000000000b72e0 t ics_opal_set_affinity c0000000000b74a0 t ics_opal_unmask_irq c0000000000b75a0 t ics_opal_mask_unknown c0000000000b76a0 t ics_opal_startup c0000000000b77b0 t icp_opal_cause_ipi c0000000000b7830 t icp_opal_teardown_cpu c0000000000b7880 t icp_opal_ipi_action c0000000000b7910 t icp_opal_flush_ipi c0000000000b7960 t icp_opal_set_cpu_priority c0000000000b79e0 t icp_opal_eoi c0000000000b7a90 t icp_opal_get_irq c0000000000b7c70 T icp_opal_flush_interrupt c0000000000b7de0 T icp_opal_init c0000000000b7e80 T is_xive_irq c0000000000b7eb0 t xive_ipi_do_nothing c0000000000b7ec0 t xive_irq_domain_match c0000000000b7f20 t xive_esb_read c0000000000b8030 t xive_setup_cpu c0000000000b8100 t xive_cause_ipi c0000000000b8180 t xive_irq_set_type c0000000000b82e0 t xive_dec_target_count c0000000000b83e0 t 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t xive_native_cleanup_queue c0000000000bd220 T xive_native_disable_queue c0000000000bd2e0 t xive_spapr_match c0000000000bd2f0 t xive_spapr_put_ipi c0000000000bd430 t xive_spapr_setup_cpu c0000000000bd440 t xive_spapr_debug_show c0000000000bd570 t xive_spapr_update_pending c0000000000bd680 t xive_spapr_get_ipi c0000000000bd830 t xive_spapr_teardown_cpu c0000000000bd840 t xive_spapr_shutdown c0000000000bd930 t xive_spapr_sync_source c0000000000bda40 t xive_spapr_configure_irq c0000000000bdb90 t xive_spapr_esb_rw c0000000000bdd10 t xive_spapr_get_irq_config c0000000000bdeb0 t xive_spapr_cleanup_queue c0000000000be070 t xive_spapr_populate_irq_data c0000000000be300 t xive_spapr_setup_queue c0000000000be680 t pnv_progress c0000000000be690 t pnv_machine_check_early c0000000000be720 t pnv_memory_block_size c0000000000be750 t pnv_shutdown c0000000000be790 t pnv_get_proc_freq c0000000000be7e0 t pnv_show_cpuinfo c0000000000be930 t pnv_kexec_cpu_down c0000000000bebf0 t pnv_prepare_going_down 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opal_pci_config_write_byte c0000000000bffd0 T opal_pci_config_write_half_word c0000000000c0030 T opal_pci_config_write_word c0000000000c0090 T opal_set_xive c0000000000c00f0 T opal_get_xive c0000000000c0150 T opal_register_exception_handler c0000000000c01b0 T opal_pci_eeh_freeze_status c0000000000c0210 T opal_pci_eeh_freeze_clear c0000000000c0270 T opal_pci_eeh_freeze_set c0000000000c02d0 T opal_pci_err_inject c0000000000c0330 T opal_pci_shpc c0000000000c0390 T opal_pci_phb_mmio_enable c0000000000c03f0 T opal_pci_set_phb_mem_window c0000000000c0450 T opal_pci_map_pe_mmio_window c0000000000c04b0 T opal_pci_set_phb_table_memory c0000000000c0510 T opal_pci_set_pe c0000000000c0570 T opal_pci_set_peltv c0000000000c05d0 T opal_pci_set_mve c0000000000c0630 T opal_pci_set_mve_enable c0000000000c0690 T opal_pci_get_xive_reissue c0000000000c06f0 T opal_pci_set_xive_reissue c0000000000c0750 T opal_pci_set_xive_pe c0000000000c07b0 T opal_get_xive_source c0000000000c0810 T opal_get_msi_32 c0000000000c0870 T opal_get_msi_64 c0000000000c08d0 T opal_start_cpu c0000000000c0930 T opal_query_cpu_status c0000000000c0990 T opal_write_oppanel c0000000000c09f0 T opal_pci_map_pe_dma_window c0000000000c0a50 T opal_pci_map_pe_dma_window_real c0000000000c0ab0 T opal_pci_reset c0000000000c0b10 T opal_pci_get_hub_diag_data c0000000000c0b70 T opal_pci_get_phb_diag_data c0000000000c0bd0 T opal_pci_fence_phb c0000000000c0c30 T opal_pci_reinit c0000000000c0c90 T opal_pci_mask_pe_error c0000000000c0cf0 T opal_set_slot_led_status c0000000000c0d50 T opal_get_epow_status c0000000000c0db0 T opal_get_dpo_status c0000000000c0e10 T opal_set_system_attention_led c0000000000c0e70 T opal_pci_next_error c0000000000c0ed0 T opal_pci_poll c0000000000c0f30 T opal_pci_msi_eoi c0000000000c0f90 T opal_pci_get_phb_diag_data2 c0000000000c0ff0 T opal_xscom_read c0000000000c1050 T opal_xscom_write c0000000000c10b0 T opal_lpc_read c0000000000c1110 T opal_lpc_write c0000000000c1170 T opal_return_cpu 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