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hash__tlb_flush c00000000007ae40 T __flush_hash_table_range c00000000007afa0 T flush_tlb_pmd_range c00000000007b1a0 t ___tlbie c00000000007b260 t native_hpte_clear c00000000007b450 t __tlbiel c00000000007b590 t native_hpte_remove c00000000007b6b0 t native_hpte_insert c00000000007b870 t native_hpte_find c00000000007b9f0 t native_flush_hash_range c00000000007c110 t tlbie c00000000007c3b0 t native_hpte_removebolted c00000000007c5c0 t native_hpte_updatepp c00000000007c7c0 t native_hpte_updateboltedpp c00000000007ca00 t native_hugepage_invalidate c00000000007ccf0 t native_hpte_invalidate c00000000007cec0 T hash__tlbiel_all c00000000007d020 t radix_enabled c00000000007d040 t __map_kernel_page c00000000007d730 T radix__map_kernel_page c00000000007d750 T setup_kuep c00000000007d7f0 T setup_kuap c00000000007d890 T radix__early_init_mmu_secondary c00000000007d970 T radix__mmu_cleanup_all c00000000007d9e0 T radix__pmd_hugepage_update c00000000007db00 T radix__pmdp_collapse_flush c00000000007db70 T radix__pgtable_trans_huge_deposit c00000000007dc90 T radix__pgtable_trans_huge_withdraw c00000000007dd70 T radix__pmdp_huge_get_and_clear c00000000007ddd0 T radix__ptep_set_access_flags c00000000007dee0 T radix__ptep_modify_prot_commit c00000000007dfc0 T p4d_free_pud_page c00000000007dfd0 T pud_set_huge c00000000007e060 T pud_clear_huge c00000000007e090 T pud_free_pmd_page c00000000007e1e0 T pmd_set_huge c00000000007e270 T pmd_clear_huge c00000000007e2a0 T pmd_free_pte_page c00000000007e330 t early_alloc_pgtable c00000000007e40c t pte_update.constprop.0.isra.0 c00000000007e4e0 t pseries_rpt_invalidate.part.0 c00000000007e4f0 t do_tlbiel_kernel c00000000007e650 T radix__flush_pwc_lpid c00000000007e720 t __tlbie_va_range c00000000007e980 T radix__flush_tlb_lpid_page c00000000007ebf0 t do_exit_flush_lazy_tlb c00000000007ee30 T radix__local_flush_tlb_mm c00000000007efb0 t do_tlbiel_va_range c00000000007f170 T radix__flush_all_lpid c00000000007f380 t do_tlbiel_va c00000000007f540 t _tlbie_pid c00000000007f7d0 t do_tlbiel_pid c00000000007faf0 t _tlbiel_va_range_multicast c00000000007fe50 T radix_kvm_prefetch_workaround c0000000000800c0 t __flush_all_mm c0000000000805a0 T radix__flush_all_mm c0000000000805b0 T radix__flush_tlb_mm c000000000080a80 T radix__flush_tlb_kernel_range c000000000080d60 T radix__flush_tlb_range c0000000000816c0 T radix__tlbiel_all c000000000081810 T radix__local_flush_tlb_page_psize c0000000000818f0 T radix__local_flush_tlb_page c000000000081950 T radix__flush_tlb_page_psize c000000000082070 T radix__flush_tlb_page c0000000000820d0 T radix__flush_all_lpid_guest c0000000000822e0 T radix__flush_tlb_range_psize c000000000082890 T radix__tlb_flush c000000000083330 T radix__flush_pmd_tlb_range c000000000083350 T radix__flush_tlb_collapsed_pmd c000000000083910 T radix__flush_tlb_all c000000000083940 T __rpte_sub_valid c000000000083960 T __hash_page_4K c000000000083ee0 T __hash_page_64K c0000000000843a0 T __hash_page_huge c000000000084770 T huge_ptep_modify_prot_start c0000000000848b0 T huge_ptep_modify_prot_commit c000000000084900 T hugetlbpage_init_default c000000000084960 T radix__flush_hugetlb_page c000000000084a90 T radix__local_flush_hugetlb_page c000000000084bc0 T radix__flush_hugetlb_tlb_range c000000000084d00 T radix__hugetlb_get_unmapped_area c000000000084fc0 T radix__huge_ptep_modify_prot_commit c0000000000850b0 T __hash_page_thp c000000000085610 t subpage_walk_pmd_entry c000000000085760 t hpte_flush_range c000000000085ac0 T __se_sys_subpage_prot c000000000085ac0 T sys_subpage_prot c000000000086180 T subpage_prot_free c0000000000862b0 T mm_iommu_preregistered c0000000000862d0 T mm_iommu_lookup c000000000086330 T mm_iommu_ua_to_hpa c0000000000863b0 T mm_iommu_is_devmem c000000000086430 T mm_iommu_mapped_inc c000000000086480 T mm_iommu_get c000000000086570 T mm_iommu_put c0000000000866e0 t mm_iommu_do_alloc c000000000086c20 T mm_iommu_new c000000000086c40 T mm_iommu_newdev c000000000086c50 t mm_iommu_free c000000000086d90 T mm_iommu_mapped_dec c000000000086dd0 T mm_iommu_lookup_rm c000000000086e30 T mm_iommu_ua_to_hpa_rm c000000000086f10 T mm_iommu_ua_mark_dirty_rm c000000000086fc0 T mm_iommu_init c000000000086fd0 T pkey_mm_init c000000000087000 T __arch_set_user_pkey_access c0000000000870c0 T thread_pkey_regs_save c000000000087100 T thread_pkey_regs_restore c000000000087150 T thread_pkey_regs_init c0000000000871a0 T execute_only_pkey c0000000000871b0 T __arch_override_mprotect_pkey c000000000087260 T arch_pte_access_permitted c000000000087330 T arch_vma_access_permitted c000000000087420 T arch_dup_pkeys c000000000087440 t arch_set_bit c000000000087480 t ppc_numa_cpu_dead c000000000087590 t read_n_cells c0000000000875e0 T __node_distance c000000000087690 t initialize_distance_lookup_table.part.0 c000000000087700 t associativity_to_nid c0000000000877c0 t of_node_to_nid_single c000000000087820 t map_cpu_to_node c000000000087900 T of_node_to_nid c0000000000879f0 t numa_setup_cpu c000000000087d20 t ppc_numa_cpu_prepare c000000000087e30 T cpu_distance c000000000087eb0 T of_drconf_to_nid_single c0000000000880d0 T hot_add_scn_to_nid c000000000088590 T memory_hotplug_max c000000000088658 t node_set_online c0000000000886b0 T get_slice_psize c000000000088710 t slice_range_to_mask c000000000088830 t slice_scan_available c0000000000888e0 t slice_flush_segments c000000000088940 t slice_check_range_fits.constprop.0 c000000000088a90 t slice_find_area_bottomup.constprop.0 c000000000088c90 t slice_find_area_topdown c000000000088f60 t slice_convert c000000000089250 T slice_get_unmapped_area c000000000089c60 T arch_get_unmapped_area c000000000089c90 T arch_get_unmapped_area_topdown c000000000089cc0 T slice_init_new_context_exec c000000000089e70 T slice_setup_new_exec c000000000089ed0 T slice_set_range_psize c000000000089f60 T slice_is_hugepage_only_range c00000000008a080 t radix_enabled c00000000008a0a0 t mmu_psize_to_shift.part.0 c00000000008a0b0 T huge_pte_offset c00000000008a0f0 T huge_pte_alloc c00000000008a690 T hugetlb_free_pgd_range c00000000008ae50 T follow_huge_pd c00000000008b120 T hugetlb_get_unmapped_area c00000000008b200 T vma_mmu_pagesize c00000000008b280 T flush_dcache_icache_hugepage c00000000008b350 T copro_handle_mm_fault c00000000008b4c0 T copro_flush_all_slbs c00000000008b4f0 T copro_calculate_slb c00000000008b9e0 T zalloc_maybe_bootmem c00000000008ba80 T is_conditional_branch c00000000008bad0 T patch_instruction c00000000008bb90 T raw_patch_instruction c00000000008bc00 T patch_branch c00000000008bc60 T is_offset_in_branch_range c00000000008bca0 T create_branch c00000000008bd00 T create_cond_branch c00000000008bd60 T instr_is_relative_branch c00000000008bda0 T instr_is_relative_link_branch c00000000008bde0 T branch_target c00000000008be40 T instr_is_branch_to_addr c00000000008bec0 T translate_branch c00000000008bfe0 t patch_feature_section c00000000008c270 T do_feature_fixups c00000000008c360 T do_stf_barrier_fixups c00000000008c800 T do_uaccess_flush_fixups c00000000008cae0 T do_entry_flush_fixups c00000000008cda0 T do_rfi_flush_fixups c00000000008d030 T do_barrier_nospec_fixups_range c00000000008d110 T do_barrier_nospec_fixups c00000000008d230 T do_lwsync_fixups c00000000008d310 T arch_invalidate_pmem c00000000008d3a0 T arch_wb_cache_pmem c00000000008d430 T memcpy_flushcache c00000000008d4f0 T memcpy_page_flushcache c00000000008d5e0 T __copy_from_user_flushcache c00000000008d740 T probe_user_read_inst c00000000008d810 T probe_kernel_read_inst c00000000008d8d4 T code_patching_test1 c00000000008d8dc T code_patching_test1_expected c00000000008d8dc T end_code_patching_test1 c00000000008d8f0 T strncpy c00000000008d93c T strncmp c00000000008d974 T memchr c00000000008d9b0 T memcmp c00000000008e050 T override_function_with_return c00000000008e0b4 T __copy_tofrom_user_power7 c00000000008e860 T copypage_power7 c00000000008ea20 T memcpy_power7 c00000000008f200 T __csum_partial c00000000008f384 T csum_partial_copy_generic c00000000008f580 T csum_ipv6_magic c00000000008f5d0 T csum_and_copy_from_user c00000000008f6c0 T csum_and_copy_to_user c00000000008f7c4 T __arch_clear_user c00000000008f920 T emulate_update_regs c00000000008fbe0 T emulate_vsx_load c00000000008ffe0 T emulate_vsx_store c0000000000903b0 T analyse_instr c000000000094cd0 T emulate_dcbz c000000000094ef0 t do_fp_store c000000000095320 t do_fp_load c000000000095860 t write_mem c000000000095d40 t read_mem c0000000000963c0 T emulate_loadstore c000000000098110 T emulate_step c00000000009861c T get_fpr c000000000098758 T put_fpr c000000000098894 T get_vr c0000000000989d0 T put_vr c000000000098b0c T get_vsr c000000000098d2c T put_vsr c000000000098f4c T load_vsrn c000000000098fa4 T store_vsrn c000000000098ff4 T conv_sp_to_dp c000000000099020 T conv_dp_to_sp c00000000009904c T ftr_fixup_test1 c000000000099058 T end_ftr_fixup_test1 c000000000099058 T ftr_fixup_test1_orig c000000000099064 T ftr_fixup_test1_expected c000000000099070 T ftr_fixup_test2 c00000000009907c T end_ftr_fixup_test2 c00000000009907c T ftr_fixup_test2_orig c000000000099088 T ftr_fixup_test2_alt c00000000009908c T ftr_fixup_test2_expected c000000000099098 T ftr_fixup_test3 c0000000000990a4 T end_ftr_fixup_test3 c0000000000990a4 T ftr_fixup_test3_orig c0000000000990b0 T ftr_fixup_test3_alt c0000000000990b8 T ftr_fixup_test4 c0000000000990d0 T end_ftr_fixup_test4 c0000000000990d0 T ftr_fixup_test4_expected c0000000000990e8 T ftr_fixup_test4_orig c000000000099100 T ftr_fixup_test4_alt c000000000099108 T ftr_fixup_test5 c00000000009912c T end_ftr_fixup_test5 c00000000009912c T ftr_fixup_test5_expected c000000000099150 T ftr_fixup_test6 c000000000099178 T end_ftr_fixup_test6 c000000000099178 T ftr_fixup_test6_expected c0000000000991a0 T ftr_fixup_test7 c0000000000991c8 T end_ftr_fixup_test7 c0000000000991cc T ftr_fixup_test7_expected c0000000000991f0 T ftr_fixup_test_FTR_macros c00000000009939c T ftr_fixup_test_FTR_macros_expected c000000000099548 T ftr_fixup_test_FW_FTR_macros c0000000000996f4 T ftr_fixup_test_FW_FTR_macros_expected c0000000000998a0 T lwsync_fixup_test c0000000000998a8 T end_lwsync_fixup_test c0000000000998a8 T lwsync_fixup_test_expected_LWSYNC c0000000000998b0 T lwsync_fixup_test_expected_SYNC c0000000000998b8 T ftr_fixup_prefix1 c0000000000998c8 T end_ftr_fixup_prefix1 c0000000000998c8 T ftr_fixup_prefix1_orig c0000000000998d8 T ftr_fixup_prefix1_expected c0000000000998e8 T ftr_fixup_prefix2 c0000000000998f8 T end_ftr_fixup_prefix2 c0000000000998f8 T ftr_fixup_prefix2_orig c000000000099908 T ftr_fixup_prefix2_alt c000000000099910 T ftr_fixup_prefix2_expected c000000000099920 T ftr_fixup_prefix3 c000000000099934 T end_ftr_fixup_prefix3 c000000000099934 T ftr_fixup_prefix3_orig c000000000099948 T ftr_fixup_prefix3_alt c000000000099954 T ftr_fixup_prefix3_expected c000000000099b20 T __xor_altivec_2 c000000000099ba0 T __xor_altivec_3 c000000000099c30 T __xor_altivec_4 c000000000099ce0 T __xor_altivec_5 c000000000099dd0 T xor_altivec_5 c000000000099e70 T xor_altivec_2 c000000000099ef0 T xor_altivec_3 c000000000099f80 T xor_altivec_4 c00000000009a00c T copy_page c00000000009a180 T __copy_tofrom_user c00000000009a18c T __copy_tofrom_user_base c00000000009a730 T __memset16 c00000000009a734 T __memset32 c00000000009a738 T __memset64 c00000000009a748 T memset c00000000009a84c T memmove c00000000009a860 T backwards_memcpy c00000000009a8f8 T __arch_hweight8 c00000000009a904 T __arch_hweight16 c00000000009a918 T __arch_hweight32 c00000000009a934 T __arch_hweight64 c00000000009aa00 T memcpy c00000000009aa90 T copy_mc_generic c00000000009ad10 T enter_vmx_usercopy c00000000009ad70 T exit_vmx_usercopy c00000000009adf0 T enter_vmx_ops c00000000009ae40 T exit_vmx_ops c00000000009aeac T do_lq c00000000009aec8 T do_stq c00000000009aedc T do_lqarx c00000000009aef8 T do_stqcx c00000000009af20 t mpic_mask_ipi c00000000009af30 t mpic_host_xlate c00000000009b0c0 T mpic_get_coreint_irq c00000000009b0d0 t mpic_host_match c00000000009b130 t mpic_init_sys c00000000009b1c0 t _mpic_write c00000000009b220 t _mpic_read c00000000009b270 t mpic_suspend c00000000009b400 t mpic_resume c00000000009b5b0 t fsl_mpic_get_version c00000000009b610 T mpic_end_irq c00000000009b6b0 t mpic_end_ipi c00000000009b750 t _mpic_cpu_write c00000000009b7f0 t _mpic_irq_write c00000000009b880 t mpic_unmask_ipi c00000000009b9a0 t mpic_unmask_tm c00000000009bb00 t mpic_mask_tm c00000000009bc60 T mpic_mask_irq c00000000009be60 T mpic_unmask_irq c00000000009c060 T mpic_set_affinity c00000000009c280 T mpic_set_irq_type c00000000009c590 t _mpic_get_one_irq c00000000009c870 t mpic_cascade c00000000009c930 T mpic_get_irq c00000000009c960 T mpic_set_vector c00000000009cb20 T fsl_mpic_primary_get_version c00000000009cba0 T mpic_irq_set_priority c00000000009cf60 t mpic_host_map c00000000009d2b0 T mpic_setup_this_cpu c00000000009d530 T mpic_cpu_get_priority c00000000009d5e0 T mpic_cpu_set_priority c00000000009d690 T mpic_teardown_this_cpu c00000000009d990 T mpic_get_one_irq c00000000009d9a0 T mpic_get_mcirq c00000000009d9d0 T mpic_request_ipis c00000000009dab0 T smp_mpic_message_pass c00000000009dbe0 T smp_mpic_setup_cpu c00000000009dbf0 T mpic_reset_core c00000000009de58 t _mpic_map_mmio.constprop.0 c00000000009dea8 t kmalloc_array.constprop.0 c00000000009dee0 T mpic_msi_reserve_hwirq c00000000009df20 T mpic_msi_init_allocator c00000000009e030 t u3msi_teardown_msi_irqs c00000000009e0e0 t mpic_u3msi_unmask_irq c00000000009e130 t mpic_u3msi_mask_irq c00000000009e180 t find_ht_magic_addr.constprop.0 c00000000009e2d0 t u3msi_setup_msi_irqs c00000000009e600 T mpic_u3msi_init c00000000009e6b0 T msi_bitmap_alloc_hwirqs c00000000009e7c0 T msi_bitmap_free_hwirqs c00000000009e850 T msi_bitmap_reserve_hwirq c00000000009e8d0 T msi_bitmap_reserve_dt_hwirqs c00000000009eac0 T msi_bitmap_free c00000000009eb50 T msi_bitmap_alloc c00000000009ec70 t i8259_host_xlate c00000000009ecb0 t i8259_host_match c00000000009ed10 t i8259_host_map c00000000009eda0 t i8259_mask_irq c00000000009ef40 t i8259_unmask_irq c00000000009f0e0 t i8259_mask_and_ack_irq c00000000009f410 T i8259_irq c00000000009f8c0 T i8259_get_host c00000000009f8e0 T i8259_init c00000000009ff10 t xics_host_match c00000000009ffd0 t xics_ipi_unmask c00000000009ffe0 t xics_host_xlate c0000000000a0020 t xics_host_map c0000000000a0140 t xics_set_cpu_giq.part.0 c0000000000a0200 t xics_ipi_mask c0000000000a0210 T xics_update_irq_servers c0000000000a03b0 T xics_set_cpu_giq c0000000000a0430 T xics_setup_cpu c0000000000a04c0 T xics_teardown_cpu c0000000000a0540 T xics_kexec_teardown_cpu c0000000000a05f0 T xics_migrate_irqs_away c0000000000a08d0 T xics_get_irq_server c0000000000a0a20 T xics_set_irq_type c0000000000a0a90 T xics_retrigger c0000000000a0adc T xics_mask_unknown_vec c0000000000a0b70 T xics_wake_cpu c0000000000a0bb0 t icp_native_cause_ipi c0000000000a0c10 t icp_native_teardown_cpu c0000000000a0c50 t icp_native_set_cpu_priority c0000000000a0cc0 t icp_native_ipi_action c0000000000a0d40 t icp_native_get_irq c0000000000a0ef0 t icp_native_flush_ipi c0000000000a0f30 T icp_native_eoi c0000000000a0fc0 T icp_native_cause_ipi_rm c0000000000a1000 T icp_native_flush_interrupt c0000000000a1130 t icp_hv_ipi_action c0000000000a11e0 t icp_hv_set_cppr c0000000000a1250 t icp_hv_get_irq c0000000000a1410 t icp_hv_set_cpu_priority c0000000000a14b0 t icp_hv_flush_ipi c0000000000a1530 t icp_hv_eoi c0000000000a1620 t icp_hv_cause_ipi c0000000000a16c0 t icp_hv_teardown_cpu c0000000000a1760 T icp_hv_init c0000000000a17f0 t ics_rtas_host_match c0000000000a1830 t ics_rtas_get_server c0000000000a18b0 t ics_rtas_map c0000000000a19a0 t ics_rtas_set_affinity c0000000000a1b50 t ics_rtas_unmask_irq c0000000000a1c80 t ics_rtas_startup c0000000000a1ce0 t ics_rtas_mask_real_irq.part.0 c0000000000a1dc0 t ics_rtas_mask_unknown c0000000000a1de0 t ics_rtas_mask_irq c0000000000a1e00 t ics_opal_host_match c0000000000a1e10 t ics_opal_get_server c0000000000a1e90 t ics_opal_mask_irq c0000000000a1f30 t ics_opal_map c0000000000a2010 t ics_opal_set_affinity c0000000000a21b0 t ics_opal_unmask_irq c0000000000a2290 t ics_opal_mask_unknown c0000000000a2360 t ics_opal_startup c0000000000a2470 t icp_opal_cause_ipi c0000000000a24d0 t icp_opal_teardown_cpu c0000000000a2510 t icp_opal_ipi_action c0000000000a2580 t icp_opal_flush_ipi c0000000000a25c0 t icp_opal_set_cpu_priority c0000000000a2630 t icp_opal_eoi c0000000000a26d0 t icp_opal_get_irq c0000000000a2880 T icp_opal_flush_interrupt c0000000000a29d0 T icp_opal_init c0000000000a2a50 T is_xive_irq c0000000000a2a70 t xive_ipi_do_nothing c0000000000a2a80 t xive_irq_domain_match c0000000000a2ad0 t xive_esb_read c0000000000a2bb0 t xive_setup_cpu c0000000000a2c50 t xive_cause_ipi c0000000000a2cb0 t xive_irq_set_type c0000000000a2db0 t xive_dec_target_count c0000000000a2e50 t xive_scan_interrupts c0000000000a30c0 t xive_get_irq c0000000000a3150 T xive_cleanup_irq_data c0000000000a3230 t xive_muxed_ipi_action c0000000000a3260 t xive_irq_domain_unmap c0000000000a3330 t xive_core_debug_open c0000000000a3370 t xive_core_debug_show c0000000000a3790 t xive_irq_domain_xlate c0000000000a37d0 t xive_do_source_eoi c0000000000a39a0 t xive_irq_set_vcpu_affinity c0000000000a3c10 t xive_irq_retrigger c0000000000a3c80 t xive_irq_eoi c0000000000a3d40 t xive_flush_cpu_queue.constprop.0 c0000000000a3e80 t xive_prepare_cpu c0000000000a4030 t xive_irq_domain_map c0000000000a41b0 t xive_find_target_in_mask c0000000000a43f0 t xive_pick_irq_target.isra.0 c0000000000a45f0 t xive_irq_startup c0000000000a47d0 t xive_irq_set_affinity c0000000000a4a20 t xive_ipi_eoi c0000000000a4ab0 t xive_irq_unmask c0000000000a4bc0 t xive_setup_cpu_ipi c0000000000a4d80 t xive_irq_shutdown c0000000000a4e70 t xive_irq_mask c0000000000a4f50 t xive_get_irqchip_state c0000000000a5090 T xmon_xive_do_dump c0000000000a5210 T xmon_xive_get_irq_config c0000000000a5400 T xive_smp_setup_cpu c0000000000a5430 T xive_smp_prepare_cpu c0000000000a5490 T xive_smp_disable_cpu c0000000000a5550 T xive_flush_interrupt c0000000000a5570 T xive_teardown_cpu c0000000000a5710 T xive_shutdown c0000000000a5750 T xive_queue_page_alloc c0000000000a5830 T xive_core_debug_init c0000000000a58a0 T xive_native_default_eq_shift c0000000000a58c0 T xive_native_has_single_escalation c0000000000a58e0 T xive_native_populate_irq_data c0000000000a5b00 T xive_native_configure_irq c0000000000a5ba0 T xive_native_get_queue_info c0000000000a5cf0 T xive_native_configure_queue c0000000000a5f10 T xive_native_alloc_irq_on_chip c0000000000a5fb0 t xive_native_get_ipi c0000000000a6060 T xive_native_free_irq c0000000000a60c0 T xive_native_sync_source c0000000000a6100 T xive_native_sync_queue c0000000000a6140 t xive_native_shutdown c0000000000a6170 t xive_native_eoi c0000000000a61a0 t xive_native_update_pending c0000000000a6290 t xive_native_match c0000000000a62d0 t xive_native_teardown_cpu c0000000000a6370 T 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