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c0000000000788f0 t native_hpte_remove c000000000078a10 t native_hpte_insert c000000000078bd0 t tlbie c000000000078eb0 t native_hpte_find c000000000078fa0 t native_hpte_removebolted c0000000000791b0 t native_hpte_updateboltedpp c0000000000793f0 t native_flush_hash_range c000000000079b00 t native_hpte_updatepp c000000000079d00 t native_hugepage_invalidate c00000000007a000 t native_hpte_invalidate c00000000007a1e0 T hash__tlbiel_all c00000000007a350 t radix_enabled c00000000007a370 t __map_kernel_page c00000000007aa80 T radix__map_kernel_page c00000000007aaa0 T setup_kuep c00000000007ab30 T setup_kuap c00000000007abd0 T radix__early_init_mmu_secondary c00000000007acb0 T radix__mmu_cleanup_all c00000000007ad20 T radix__setup_initial_memory_limit c00000000007ad50 T radix__pmd_hugepage_update c00000000007aec0 T radix__pmdp_collapse_flush c00000000007af30 T radix__pgtable_trans_huge_deposit c00000000007b050 T radix__pgtable_trans_huge_withdraw c00000000007b130 T radix__pmdp_huge_get_and_clear c00000000007b1b0 T radix__ptep_set_access_flags c00000000007b2c0 T radix__ptep_modify_prot_commit c00000000007b3a0 T p4d_free_pud_page c00000000007b3b0 T pud_set_huge c00000000007b430 T pud_clear_huge c00000000007b460 T pud_free_pmd_page c00000000007b5b0 T pmd_set_huge c00000000007b630 T pmd_clear_huge c00000000007b660 T pmd_free_pte_page c00000000007b6f0 t early_alloc_pgtable c00000000007b7cc t __raw_spin_unlock.constprop.0 c00000000007b814 t pte_update.constprop.0.isra.0 c00000000007b8e0 T radix__flush_tlb_pwc c00000000007b8f0 t exit_flush_lazy_tlbs c00000000007b9c0 t do_tlbiel_kernel c00000000007bb60 T radix__flush_pwc_lpid c00000000007bc50 t do_exit_flush_lazy_tlb c00000000007bea0 t __tlbie_va_range c00000000007c160 T radix__flush_tlb_lpid_page c00000000007c450 T radix__local_flush_tlb_page c00000000007c5a0 T radix__local_flush_tlb_mm c00000000007c750 t do_tlbiel_va_range c00000000007c950 T radix__flush_all_lpid c00000000007cbe0 t do_tlbiel_va c00000000007ce50 t do_tlbiel_pid c00000000007d220 T radix_kvm_prefetch_workaround c00000000007d490 t _tlbie_pid c00000000007d980 t __flush_all_mm c00000000007deb0 T radix__flush_all_mm c00000000007dec0 T radix__flush_tlb_kernel_range c00000000007e3a0 T radix__flush_tlb_mm c00000000007eab0 t __radix__flush_tlb_range c00000000007f590 T radix__flush_tlb_range c00000000007f5e0 T radix__tlbiel_all c00000000007f730 T radix__local_flush_tlb_page_psize c00000000007f850 T radix__flush_tlb_page_psize c00000000007fee0 T radix__flush_tlb_page c00000000007ff40 T radix__flush_all_lpid_guest c0000000000801d0 T radix__flush_tlb_range_psize c000000000080690 T radix__tlb_flush c000000000080ea0 T radix__flush_pmd_tlb_range c000000000080ec0 T radix__flush_tlb_collapsed_pmd c000000000081760 T radix__flush_tlb_all c000000000081790 T __rpte_sub_valid c0000000000817b0 T __hash_page_4K c000000000081d60 T __hash_page_64K c000000000082240 T __hash_page_huge c000000000082630 T huge_ptep_modify_prot_start c000000000082770 T huge_ptep_modify_prot_commit c0000000000827c0 T hugetlbpage_init_default c000000000082820 T radix__flush_hugetlb_page c000000000082950 T radix__local_flush_hugetlb_page c000000000082a80 T radix__flush_hugetlb_tlb_range c000000000082bc0 T radix__hugetlb_get_unmapped_area c000000000082e80 T radix__huge_ptep_modify_prot_commit c000000000082f70 T __hash_page_thp c0000000000834f0 t subpage_walk_pmd_entry c000000000083640 t hpte_flush_range c0000000000839b0 T __se_sys_subpage_prot c0000000000839b0 T sys_subpage_prot c000000000084080 T subpage_prot_free c0000000000841b0 T mm_iommu_preregistered c0000000000841d0 T mm_iommu_lookup c000000000084230 T mm_iommu_ua_to_hpa c0000000000842b0 T mm_iommu_is_devmem c000000000084330 T mm_iommu_mapped_inc c000000000084380 T mm_iommu_get c000000000084470 T mm_iommu_put c0000000000845e0 t mm_iommu_do_alloc c000000000084ba0 T mm_iommu_new c000000000084bc0 T mm_iommu_newdev c000000000084bd0 T mm_iommu_mapped_dec c000000000084c10 t mm_iommu_free c000000000084d90 T mm_iommu_lookup_rm c000000000084df0 T mm_iommu_ua_to_hpa_rm c000000000084ed0 T mm_iommu_ua_mark_dirty_rm c000000000084f80 T mm_iommu_init c000000000084f90 t pkey_initialize c000000000085220 t pkey_access_permitted c0000000000852f0 T pkey_mm_init c000000000085320 T __arch_set_user_pkey_access c0000000000853e0 T thread_pkey_regs_save c000000000085430 T thread_pkey_regs_restore c000000000085490 T thread_pkey_regs_init c0000000000854f0 T __execute_only_pkey c000000000085500 T __arch_override_mprotect_pkey c0000000000855a0 T arch_pte_access_permitted c0000000000855e0 T arch_vma_access_permitted c000000000085670 T arch_dup_pkeys c0000000000856a0 t set_bit c0000000000856e0 t ppc_numa_cpu_dead c0000000000857f0 t read_n_cells c000000000085840 T __node_distance c0000000000858f0 t initialize_distance_lookup_table.part.0 c000000000085960 t associativity_to_nid c000000000085a10 t of_node_to_nid_single c000000000085a70 t of_drconf_to_nid_single c000000000085c70 t map_cpu_to_node c000000000085d50 T of_node_to_nid c000000000085e40 t numa_setup_cpu c000000000085fe0 t ppc_numa_cpu_prepare c000000000086100 T cpu_distance c000000000086180 T hot_add_scn_to_nid c0000000000865f0 T memory_hotplug_max c0000000000866b8 t node_set_online c000000000086710 T get_slice_psize c000000000086770 t slice_range_to_mask c000000000086890 t slice_scan_available c000000000086940 t slice_flush_segments c0000000000869a0 t slice_check_range_fits.constprop.0 c000000000086af0 t slice_find_area_bottomup.constprop.0 c000000000086d10 t slice_find_area_topdown c000000000086ff0 t slice_convert c0000000000872e0 T slice_get_unmapped_area c000000000087cf0 T arch_get_unmapped_area c000000000087d20 T arch_get_unmapped_area_topdown c000000000087d50 T slice_init_new_context_exec c000000000087f00 T slice_setup_new_exec c000000000087f60 T slice_set_range_psize c000000000087ff0 T slice_is_hugepage_only_range c000000000088110 t radix_enabled c000000000088130 t mmu_psize_to_shift.part.0 c000000000088140 T huge_pte_offset c000000000088180 T huge_pte_alloc c000000000088750 T hugetlb_free_pgd_range c000000000088ea0 T follow_huge_pd c000000000089140 T hugetlb_get_unmapped_area c000000000089220 T vma_mmu_pagesize c0000000000892a0 T flush_dcache_icache_hugepage c000000000089370 T copro_handle_mm_fault c000000000089520 T copro_flush_all_slbs c000000000089550 T copro_calculate_slb c000000000089a40 T zalloc_maybe_bootmem c000000000089ae0 T patch_instruction c000000000089b70 T is_conditional_branch c000000000089bc0 T raw_patch_instruction c000000000089bf0 T patch_branch c000000000089c40 T is_offset_in_branch_range c000000000089c80 T create_branch c000000000089cd0 T create_cond_branch c000000000089d20 T instr_is_relative_branch c000000000089d50 T instr_is_relative_link_branch c000000000089d90 T branch_target c000000000089df0 T instr_is_branch_to_addr c000000000089e70 T translate_branch c000000000089f80 t patch_feature_section c00000000008a160 T do_feature_fixups c00000000008a250 T do_stf_barrier_fixups c00000000008a6b0 T do_rfi_flush_fixups c00000000008a930 T do_barrier_nospec_fixups_range c00000000008aa50 T do_barrier_nospec_fixups c00000000008abd0 T do_lwsync_fixups c00000000008acb0 T arch_wb_cache_pmem c00000000008ad50 T arch_invalidate_pmem c00000000008adf0 T memcpy_flushcache c00000000008aec0 T memcpy_page_flushcache c00000000008afc0 T __copy_from_user_flushcache c00000000008b110 T strncpy c00000000008b15c T strncmp c00000000008b194 T memchr c00000000008b1d0 T memcmp c00000000008b870 T override_function_with_return c00000000008b8d4 T __copy_tofrom_user_power7 c00000000008c080 T copypage_power7 c00000000008c240 T memcpy_power7 c00000000008ca20 T __csum_partial c00000000008cba4 T csum_partial_copy_generic c00000000008cdd0 T csum_ipv6_magic c00000000008ce20 t csum_partial c00000000008ce50 T csum_and_copy_from_user c00000000008d050 T csum_and_copy_to_user c00000000008d21c T __arch_clear_user c00000000008d380 T emulate_update_regs c00000000008d630 T emulate_vsx_load c00000000008da40 T emulate_vsx_store c00000000008de10 T analyse_instr c000000000092030 T emulate_dcbz c000000000092160 t do_fp_store c0000000000925b0 t do_fp_load c000000000092a50 t write_mem.part.0 c000000000092e00 t write_mem c000000000092e60 t read_mem.part.0 c0000000000932d0 t read_mem c000000000093330 T emulate_loadstore c000000000094e80 T emulate_step c0000000000954a4 T get_fpr c0000000000955e0 T put_fpr c00000000009571c T get_vr c000000000095858 T put_vr c000000000095994 T get_vsr c000000000095bb4 T put_vsr c000000000095dd4 T load_vsrn c000000000095e2c T store_vsrn c000000000095e7c T conv_sp_to_dp c000000000095ea8 T conv_dp_to_sp c000000000095ed4 T ftr_fixup_test1 c000000000095ee0 T end_ftr_fixup_test1 c000000000095ee0 T ftr_fixup_test1_orig c000000000095eec T ftr_fixup_test1_expected c000000000095ef8 T ftr_fixup_test2 c000000000095f04 T end_ftr_fixup_test2 c000000000095f04 T ftr_fixup_test2_orig c000000000095f10 T ftr_fixup_test2_alt c000000000095f14 T ftr_fixup_test2_expected c000000000095f20 T ftr_fixup_test3 c000000000095f2c T end_ftr_fixup_test3 c000000000095f2c T ftr_fixup_test3_orig c000000000095f38 T ftr_fixup_test3_alt c000000000095f40 T ftr_fixup_test4 c000000000095f58 T end_ftr_fixup_test4 c000000000095f58 T ftr_fixup_test4_expected c000000000095f70 T ftr_fixup_test4_orig c000000000095f88 T ftr_fixup_test4_alt c000000000095f90 T ftr_fixup_test5 c000000000095fb4 T end_ftr_fixup_test5 c000000000095fb4 T ftr_fixup_test5_expected c000000000095fd8 T ftr_fixup_test6 c000000000096000 T end_ftr_fixup_test6 c000000000096000 T ftr_fixup_test6_expected c000000000096028 T ftr_fixup_test7 c000000000096050 T end_ftr_fixup_test7 c000000000096054 T ftr_fixup_test7_expected c000000000096078 T ftr_fixup_test_FTR_macros c000000000096224 T ftr_fixup_test_FTR_macros_expected c0000000000963d0 T ftr_fixup_test_FW_FTR_macros c00000000009657c T ftr_fixup_test_FW_FTR_macros_expected c000000000096728 T lwsync_fixup_test c000000000096730 T end_lwsync_fixup_test c000000000096730 T lwsync_fixup_test_expected_LWSYNC c000000000096738 T lwsync_fixup_test_expected_SYNC c000000000096900 T __xor_altivec_2 c000000000096980 T __xor_altivec_3 c000000000096a10 T __xor_altivec_4 c000000000096ac0 T __xor_altivec_5 c000000000096bb0 T xor_altivec_5 c000000000096c50 T xor_altivec_2 c000000000096cd0 T xor_altivec_3 c000000000096d60 T xor_altivec_4 c000000000096dec T copy_page c000000000096f80 T __copy_tofrom_user c000000000096f8c T __copy_tofrom_user_base c000000000097530 T __memset16 c000000000097534 T __memset32 c000000000097538 T __memset64 c000000000097548 T memset c00000000009764c T memmove c000000000097660 T backwards_memcpy c0000000000976f8 T __arch_hweight8 c000000000097704 T __arch_hweight16 c000000000097718 T __arch_hweight32 c000000000097734 T __arch_hweight64 c000000000097800 T memcpy c000000000097890 T memcpy_mcsafe c000000000097b10 T enter_vmx_usercopy c000000000097b70 T exit_vmx_usercopy c000000000097bf0 T enter_vmx_ops c000000000097c40 T exit_vmx_ops c000000000097cac T do_lq c000000000097cc8 T do_stq c000000000097cdc T do_lqarx c000000000097cf8 T do_stqcx c000000000097d20 t mpic_mask_ipi c000000000097d30 t mpic_host_xlate c000000000097ec0 T mpic_get_coreint_irq c000000000097ed0 t mpic_host_match c000000000097f30 t mpic_init_sys c000000000097fc0 t _mpic_write c000000000098020 t _mpic_read c000000000098070 t mpic_suspend c000000000098200 t mpic_resume c0000000000983b0 t fsl_mpic_get_version c000000000098410 T mpic_end_irq c0000000000984b0 t mpic_end_ipi c000000000098550 t _mpic_cpu_write c0000000000985f0 t _mpic_irq_write c000000000098680 t mpic_unmask_ipi c0000000000987a0 t mpic_unmask_tm c000000000098900 t mpic_mask_tm c000000000098a60 T mpic_mask_irq c000000000098c60 T mpic_unmask_irq c000000000098e60 T mpic_set_affinity c000000000099080 T mpic_set_irq_type c000000000099390 t _mpic_get_one_irq c000000000099670 t mpic_cascade c000000000099730 T mpic_get_irq c000000000099760 T mpic_set_vector c000000000099920 T fsl_mpic_primary_get_version c0000000000999a0 T mpic_irq_set_priority c000000000099d60 t mpic_host_map c00000000009a0b0 T mpic_setup_this_cpu c00000000009a330 T mpic_cpu_get_priority c00000000009a3e0 T mpic_cpu_set_priority c00000000009a490 T mpic_teardown_this_cpu c00000000009a790 T mpic_get_one_irq c00000000009a7a0 T mpic_get_mcirq c00000000009a7d0 T mpic_request_ipis c00000000009a8b0 T smp_mpic_message_pass c00000000009a9e0 T smp_mpic_setup_cpu c00000000009a9f0 T mpic_reset_core c00000000009ac58 t _mpic_map_mmio.constprop.0 c00000000009aca8 t kmalloc_array.constprop.0 c00000000009ace0 T mpic_msi_reserve_hwirq c00000000009ad20 T mpic_msi_init_allocator c00000000009ae30 t u3msi_teardown_msi_irqs c00000000009aee0 t mpic_u3msi_unmask_irq c00000000009af30 t mpic_u3msi_mask_irq c00000000009af80 t find_ht_magic_addr.constprop.0 c00000000009b0d0 t u3msi_setup_msi_irqs c00000000009b400 T mpic_u3msi_init c00000000009b4b0 T msi_bitmap_alloc_hwirqs c00000000009b5e0 T msi_bitmap_free_hwirqs c00000000009b670 T msi_bitmap_reserve_hwirq c00000000009b6f0 T msi_bitmap_reserve_dt_hwirqs c00000000009b8e0 T msi_bitmap_free c00000000009b970 T msi_bitmap_alloc c00000000009ba90 t i8259_host_xlate c00000000009bad0 t i8259_host_match c00000000009bb30 t i8259_host_map c00000000009bbc0 t i8259_mask_irq c00000000009bd60 t i8259_unmask_irq c00000000009bf00 t i8259_mask_and_ack_irq c00000000009c230 T i8259_irq c00000000009c6e0 T i8259_get_host c00000000009c700 T i8259_init c00000000009cd30 t xics_host_match c00000000009cdf0 t xics_ipi_unmask c00000000009ce00 t xics_host_xlate c00000000009ce40 t xics_host_map c00000000009cf60 t xics_set_cpu_giq.part.0 c00000000009d020 t xics_ipi_mask c00000000009d030 T xics_update_irq_servers c00000000009d1d0 T xics_set_cpu_giq c00000000009d250 T xics_setup_cpu c00000000009d2e0 T xics_teardown_cpu c00000000009d360 T xics_kexec_teardown_cpu c00000000009d410 T xics_migrate_irqs_away c00000000009d6f0 T xics_get_irq_server c00000000009d840 T xics_set_irq_type c00000000009d8b0 T xics_retrigger c00000000009d8fc T xics_mask_unknown_vec c00000000009d990 T xics_wake_cpu c00000000009d9d0 t icp_native_cause_ipi c00000000009da30 t icp_native_teardown_cpu c00000000009da70 t icp_native_set_cpu_priority c00000000009dae0 t icp_native_ipi_action c00000000009db60 t icp_native_get_irq c00000000009dd10 t icp_native_flush_ipi c00000000009dd50 T icp_native_eoi c00000000009dde0 T icp_native_cause_ipi_rm c00000000009de20 T icp_native_flush_interrupt c00000000009df50 t icp_hv_ipi_action c00000000009e000 t icp_hv_set_cppr c00000000009e070 t icp_hv_get_irq c00000000009e230 t icp_hv_set_cpu_priority c00000000009e2d0 t icp_hv_flush_ipi c00000000009e350 t icp_hv_eoi c00000000009e440 t icp_hv_cause_ipi c00000000009e4e0 t icp_hv_teardown_cpu c00000000009e580 T icp_hv_init c00000000009e600 t ics_rtas_host_match c00000000009e640 t ics_rtas_get_server c00000000009e6c0 t ics_rtas_map c00000000009e7b0 t ics_rtas_set_affinity c00000000009e960 t ics_rtas_unmask_irq c00000000009ea90 t ics_rtas_startup c00000000009eaf0 t ics_rtas_mask_real_irq.part.0 c00000000009ebd0 t ics_rtas_mask_unknown c00000000009ebf0 t ics_rtas_mask_irq c00000000009ec10 t ics_opal_host_match c00000000009ec20 t ics_opal_get_server c00000000009eca0 t ics_opal_mask_irq c00000000009ed40 t ics_opal_map c00000000009ee20 t ics_opal_set_affinity c00000000009efc0 t ics_opal_unmask_irq c00000000009f0a0 t ics_opal_mask_unknown c00000000009f170 t ics_opal_startup c00000000009f280 t icp_opal_cause_ipi c00000000009f2e0 t icp_opal_teardown_cpu c00000000009f320 t icp_opal_ipi_action c00000000009f390 t icp_opal_flush_ipi c00000000009f3d0 t icp_opal_set_cpu_priority c00000000009f440 t icp_opal_eoi c00000000009f4e0 t icp_opal_get_irq c00000000009f690 T icp_opal_flush_interrupt c00000000009f7e0 T icp_opal_init c00000000009f860 T is_xive_irq c00000000009f880 t xive_ipi_do_nothing c00000000009f890 t xive_irq_domain_match c00000000009f8e0 t xive_esb_read c00000000009f9b0 t xive_setup_cpu c00000000009fa50 t xive_cause_ipi c00000000009fab0 t xive_irq_set_type c00000000009fbb0 t xive_dec_target_count c00000000009fc50 t xive_scan_interrupts c00000000009fec0 t xive_get_irq c00000000009ff50 T xive_cleanup_irq_data c0000000000a0030 t xive_muxed_ipi_action c0000000000a0060 t xive_irq_domain_unmap c0000000000a0130 t xive_irq_domain_xlate c0000000000a0170 t xive_do_source_eoi c0000000000a0340 t xive_irq_set_vcpu_affinity c0000000000a05b0 t xive_irq_retrigger c0000000000a0620 t xive_irq_eoi c0000000000a06e0 t xive_flush_cpu_queue.constprop.0 c0000000000a0820 t xive_prepare_cpu c0000000000a09d0 t xive_irq_domain_map c0000000000a0b50 t xive_find_target_in_mask c0000000000a0d90 t xive_pick_irq_target.isra.0 c0000000000a0f90 t xive_irq_startup c0000000000a1170 t xive_irq_set_affinity c0000000000a13c0 t xive_ipi_eoi c0000000000a1450 t xive_irq_unmask c0000000000a1560 t xive_setup_cpu_ipi c0000000000a1720 t xive_irq_shutdown c0000000000a1810 t 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xive_native_update_pending c0000000000a2b80 t xive_native_match c0000000000a2bc0 t xive_native_teardown_cpu c0000000000a2c60 T xive_native_enable_vp c0000000000a2d00 T xive_native_disable_vp c0000000000a2d80 t xive_native_setup_cpu c0000000000a2f50 T xive_native_get_vp_info c0000000000a3000 t xive_native_setup_queue c0000000000a30d0 t xive_native_get_irq_config c0000000000a3170 T xive_native_alloc_vp_block c0000000000a32e0 T xive_native_get_queue_state c0000000000a33d0 T xive_native_set_queue_state c0000000000a3450 T xive_native_has_queue_state_support c0000000000a34c0 T xive_native_get_vp_state c0000000000a3570 t xive_native_put_ipi c0000000000a35f0 T xive_native_free_vp_block c0000000000a3650 t xive_native_cleanup_queue c0000000000a3760 T xive_native_disable_queue c0000000000a3800 t xive_spapr_match c0000000000a3810 t xive_spapr_put_ipi c0000000000a3930 t xive_spapr_eoi c0000000000a3940 t xive_spapr_setup_cpu c0000000000a3950 t xive_spapr_get_ipi c0000000000a3ae0 t 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