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c0000000000763c0 T __flush_hash_table_range c000000000076640 T flush_tlb_pmd_range c000000000076840 t native_hpte_find c000000000076930 t native_hpte_remove c000000000076a50 t native_hpte_insert c000000000076c50 t native_flush_hash_range c0000000000775c0 t native_hpte_clear c000000000077850 t native_hugepage_invalidate c000000000077f70 t tlbie c0000000000784e0 t native_hpte_removebolted c000000000078700 t native_hpte_invalidate c0000000000788e0 t native_hpte_updatepp c000000000078b00 t native_hpte_updateboltedpp c000000000078d70 T hash__tlbiel_all c000000000078f00 t __map_kernel_page c000000000079610 T radix__map_kernel_page c000000000079630 T setup_kuep c0000000000796c0 T setup_kuap c000000000079760 T radix__early_init_mmu_secondary c000000000079840 T radix__mmu_cleanup_all c0000000000798b0 T radix__setup_initial_memory_limit c0000000000798e0 T radix__pmd_hugepage_update c000000000079a50 T radix__pmdp_collapse_flush c000000000079ac0 T radix__pgtable_trans_huge_deposit c000000000079be0 T radix__pgtable_trans_huge_withdraw c000000000079cc0 T radix__pmdp_huge_get_and_clear c000000000079e10 T radix__ptep_set_access_flags c000000000079f20 T radix__ptep_modify_prot_commit c00000000007a000 T p4d_free_pud_page c00000000007a010 T pud_set_huge c00000000007a090 T pud_clear_huge c00000000007a0c0 T pud_free_pmd_page c00000000007a210 T pmd_set_huge c00000000007a290 T pmd_clear_huge c00000000007a2c0 T pmd_free_pte_page c00000000007a350 t early_alloc_pgtable c00000000007a42c t pte_update.constprop.0 c00000000007a520 T radix__flush_tlb_pwc c00000000007a530 t exit_flush_lazy_tlbs c00000000007a600 t do_tlbiel_kernel c00000000007a7a0 T radix__flush_tlb_lpid_page c00000000007aa90 t do_exit_flush_lazy_tlb c00000000007ace0 T radix__flush_pwc_lpid c00000000007add0 T radix__flush_all_lpid c00000000007b060 T radix__local_flush_tlb_mm c00000000007b210 t do_tlbiel_va_range c00000000007b420 t _tlbie_pid c00000000007b910 t do_tlbiel_va c00000000007bb80 t do_tlbiel_pid c00000000007bf50 T radix_kvm_prefetch_workaround c00000000007c1b0 T radix__flush_tlb_kernel_range c00000000007c690 t __flush_all_mm c00000000007cd90 T radix__flush_all_mm c00000000007cda0 T radix__flush_tlb_mm c00000000007d450 t __radix__flush_tlb_range c00000000007ece0 T radix__flush_tlb_range c00000000007ed30 T radix__tlbiel_all c00000000007ee60 T radix__local_flush_tlb_page_psize c00000000007ef80 T radix__local_flush_tlb_page c00000000007efe0 T radix__flush_tlb_page_psize c00000000007f670 T radix__flush_tlb_page c00000000007f6d0 T radix__flush_all_lpid_guest c00000000007f960 T radix__flush_tlb_range_psize c0000000000803f0 T radix__tlb_flush c000000000081400 T radix__flush_pmd_tlb_range c000000000081420 T radix__flush_tlb_collapsed_pmd c000000000081d20 T radix__flush_tlb_all c000000000081d50 T __rpte_sub_valid c000000000081d70 T __hash_page_4K c000000000082320 T __hash_page_64K c000000000082890 T __hash_page_huge c000000000082c80 T huge_ptep_modify_prot_start c000000000082dc0 T huge_ptep_modify_prot_commit c000000000082e10 T hugetlbpage_init_default c000000000082e70 T radix__flush_hugetlb_page c000000000082fa0 T radix__local_flush_hugetlb_page c0000000000830d0 T radix__flush_hugetlb_tlb_range c000000000083210 T radix__hugetlb_get_unmapped_area c0000000000834e0 T radix__huge_ptep_modify_prot_commit c0000000000835d0 T __hash_page_thp c000000000083b50 t subpage_walk_pmd_entry c000000000083ca0 t hpte_flush_range c000000000084010 T __se_sys_subpage_prot c000000000084010 T sys_subpage_prot c0000000000846a0 T subpage_prot_free c0000000000847e0 T mm_iommu_preregistered c000000000084800 T mm_iommu_lookup c000000000084860 T mm_iommu_ua_to_hpa c0000000000848e0 T mm_iommu_is_devmem c000000000084960 T mm_iommu_mapped_inc c0000000000849b0 T mm_iommu_mapped_dec c0000000000849f0 T mm_iommu_get c000000000084ae0 T mm_iommu_put c000000000084c50 t mm_iommu_do_alloc c000000000085200 T mm_iommu_new c000000000085220 T mm_iommu_newdev c000000000085230 t mm_iommu_free c0000000000853b0 T mm_iommu_lookup_rm c0000000000853c0 T mm_iommu_ua_to_hpa_rm c0000000000854a0 T mm_iommu_ua_mark_dirty_rm c000000000085550 T mm_iommu_init c000000000085560 t pkey_initialize c0000000000857c0 t is_pkey_enabled c000000000085800 t pkey_access_permitted c000000000085910 T pkey_mm_init c000000000085940 T __arch_set_user_pkey_access c000000000085a40 T thread_pkey_regs_save c000000000085a90 T thread_pkey_regs_restore c000000000085af0 T thread_pkey_regs_init c000000000085b50 T __execute_only_pkey c000000000085b60 T __arch_override_mprotect_pkey c000000000085c00 T arch_pte_access_permitted c000000000085c40 T arch_vma_access_permitted c000000000085cd0 T arch_dup_pkeys c000000000085d00 t map_cpu_to_node c000000000085dd0 t ppc_numa_cpu_dead c000000000085ee0 T __node_distance c000000000085f90 t initialize_distance_lookup_table.part.0 c000000000086020 t of_node_to_nid_single c000000000086100 T of_node_to_nid c0000000000861c0 t numa_setup_cpu c000000000086340 t ppc_numa_cpu_prepare c000000000086450 t of_drconf_to_nid_single.isra.0 c000000000086640 T cpu_distance c0000000000866c0 T hot_add_scn_to_nid c000000000086a80 T memory_hotplug_max c000000000086b48 t node_set_online c000000000086bd0 T get_slice_psize c000000000086c30 t slice_range_to_mask c000000000086d50 t slice_check_range_fits.isra.0 c000000000086ea0 t slice_scan_available c000000000086f50 t slice_flush_segments c000000000086fb0 t slice_area_is_free.part.0 c000000000087070 t slice_find_area_bottomup.isra.0 c000000000087200 t slice_find_area c0000000000874f0 t slice_convert c0000000000877e0 T slice_get_unmapped_area c0000000000880c0 T arch_get_unmapped_area c0000000000880f0 T arch_get_unmapped_area_topdown c000000000088120 T slice_init_new_context_exec c0000000000882e0 T slice_setup_new_exec c000000000088340 T slice_set_range_psize c0000000000883d0 T slice_is_hugepage_only_range c000000000088500 t mmu_psize_to_shift.part.0 c000000000088510 T huge_pte_offset c000000000088550 T huge_pte_alloc c000000000088b90 T hugetlb_free_pgd_range c000000000089290 T follow_huge_pd c000000000089520 T hugetlb_get_unmapped_area c000000000089600 T vma_mmu_pagesize c000000000089670 T flush_dcache_icache_hugepage c000000000089740 T copro_handle_mm_fault c0000000000898f0 T copro_flush_all_slbs c000000000089920 T copro_calculate_slb c000000000089e00 T zalloc_maybe_bootmem c000000000089ea0 T is_conditional_branch c000000000089ef0 T raw_patch_instruction c000000000089f20 T patch_instruction c000000000089f80 T patch_branch c000000000089fd0 T is_offset_in_branch_range c00000000008a010 T create_branch c00000000008a060 T create_cond_branch c00000000008a0b0 T instr_is_relative_branch c00000000008a0e0 T instr_is_relative_link_branch c00000000008a120 T branch_target c00000000008a180 T instr_is_branch_to_addr c00000000008a1f0 T translate_branch c00000000008a320 t patch_feature_section c00000000008a4a0 T do_feature_fixups c00000000008a560 T do_stf_barrier_fixups c00000000008a9c0 T do_rfi_flush_fixups c00000000008ac20 T do_barrier_nospec_fixups_range c00000000008ad00 T do_barrier_nospec_fixups c00000000008ad70 T do_lwsync_fixups c00000000008ae00 T arch_wb_cache_pmem c00000000008ae70 T arch_invalidate_pmem c00000000008ae80 T memcpy_flushcache c00000000008af20 T memcpy_page_flushcache c00000000008af60 T __copy_from_user_flushcache c00000000008b090 T strncpy c00000000008b0dc T strncmp c00000000008b114 T memchr c00000000008b150 T memcmp c00000000008b7f0 T override_function_with_return c00000000008b854 T __copy_tofrom_user_power7 c00000000008c000 T copypage_power7 c00000000008c1c0 T memcpy_power7 c00000000008c9a0 T __csum_partial c00000000008cb24 T csum_partial_copy_generic c00000000008cd50 T csum_ipv6_magic c00000000008cda0 T csum_and_copy_to_user c00000000008cf50 T csum_and_copy_from_user c00000000008d170 T __arch_clear_user c00000000008d2e0 T emulate_update_regs c00000000008d590 T emulate_vsx_load c00000000008d950 T emulate_vsx_store c00000000008dcf0 T analyse_instr c000000000091fa0 T emulate_dcbz c0000000000920d0 t do_fp_store c000000000092520 t do_fp_load c0000000000929b0 t write_mem c000000000092dc0 t read_mem c000000000093280 T emulate_loadstore c000000000094ce0 T emulate_step c0000000000952e4 T get_fpr c000000000095420 T put_fpr c00000000009555c T get_vr c000000000095698 T put_vr c0000000000957d4 T get_vsr c0000000000959f4 T put_vsr c000000000095c14 T load_vsrn c000000000095c6c T store_vsrn c000000000095cbc T conv_sp_to_dp c000000000095ce8 T conv_dp_to_sp c000000000095d14 T ftr_fixup_test1 c000000000095d20 T end_ftr_fixup_test1 c000000000095d20 T ftr_fixup_test1_orig c000000000095d2c T ftr_fixup_test1_expected c000000000095d38 T ftr_fixup_test2 c000000000095d44 T end_ftr_fixup_test2 c000000000095d44 T ftr_fixup_test2_orig c000000000095d50 T ftr_fixup_test2_alt c000000000095d54 T ftr_fixup_test2_expected c000000000095d60 T ftr_fixup_test3 c000000000095d6c T end_ftr_fixup_test3 c000000000095d6c T ftr_fixup_test3_orig c000000000095d78 T ftr_fixup_test3_alt c000000000095d80 T ftr_fixup_test4 c000000000095d98 T end_ftr_fixup_test4 c000000000095d98 T ftr_fixup_test4_expected c000000000095db0 T ftr_fixup_test4_orig c000000000095dc8 T ftr_fixup_test4_alt c000000000095dd0 T ftr_fixup_test5 c000000000095df4 T end_ftr_fixup_test5 c000000000095df4 T ftr_fixup_test5_expected c000000000095e18 T ftr_fixup_test6 c000000000095e40 T end_ftr_fixup_test6 c000000000095e40 T ftr_fixup_test6_expected c000000000095e68 T ftr_fixup_test7 c000000000095e90 T end_ftr_fixup_test7 c000000000095e94 T ftr_fixup_test7_expected c000000000095eb8 T ftr_fixup_test_FTR_macros c000000000096064 T ftr_fixup_test_FTR_macros_expected c000000000096210 T ftr_fixup_test_FW_FTR_macros c0000000000963bc T ftr_fixup_test_FW_FTR_macros_expected c000000000096568 T lwsync_fixup_test c000000000096570 T end_lwsync_fixup_test c000000000096570 T lwsync_fixup_test_expected_LWSYNC c000000000096578 T lwsync_fixup_test_expected_SYNC c000000000096740 T __xor_altivec_2 c0000000000967c0 T __xor_altivec_3 c000000000096850 T __xor_altivec_4 c000000000096900 T __xor_altivec_5 c0000000000969f0 T xor_altivec_2 c000000000096a70 T xor_altivec_3 c000000000096b00 T xor_altivec_4 c000000000096b90 T xor_altivec_5 c000000000096c2c T copy_page c000000000096d80 T __copy_tofrom_user c000000000096d8c T __copy_tofrom_user_base c000000000097330 T __memset16 c000000000097334 T __memset32 c000000000097338 T __memset64 c000000000097348 T memset c00000000009744c T memmove c000000000097460 T backwards_memcpy c0000000000974f8 T __arch_hweight8 c000000000097504 T __arch_hweight16 c000000000097518 T __arch_hweight32 c000000000097534 T __arch_hweight64 c000000000097600 T memcpy c000000000097690 T memcpy_mcsafe c000000000097910 T enter_vmx_usercopy c000000000097970 T exit_vmx_usercopy c0000000000979f0 T enter_vmx_ops c000000000097a40 T exit_vmx_ops c000000000097aac T do_lq c000000000097ac8 T do_stq c000000000097adc T do_lqarx c000000000097af8 T do_stqcx c000000000097b20 t mpic_mask_ipi c000000000097b30 t mpic_host_xlate c000000000097cc0 T mpic_get_coreint_irq c000000000097cd0 t mpic_host_match c000000000097d30 t mpic_init_sys c000000000097dc0 t _mpic_write.isra.0.part.0 c000000000097de0 t fsl_mpic_get_version.part.0 c000000000097e30 t mpic_suspend c000000000097fd0 t _mpic_write.isra.0 c000000000098020 t mpic_resume c000000000098170 T mpic_end_irq c0000000000981e0 t mpic_end_ipi c0000000000981f0 t _mpic_cpu_write c000000000098260 t mpic_unmask_tm c0000000000983b0 t mpic_mask_tm c000000000098500 t mpic_unmask_ipi c000000000098620 T mpic_unmask_irq c0000000000987d0 T mpic_mask_irq c000000000098980 T mpic_set_irq_type c000000000098c80 T mpic_set_affinity c000000000098e50 t _mpic_get_one_irq c0000000000990a0 t mpic_cascade c000000000099160 T mpic_get_irq c000000000099190 T mpic_set_vector c000000000099340 T fsl_mpic_primary_get_version c000000000099380 T mpic_irq_set_priority c000000000099720 t mpic_host_map c000000000099a40 T mpic_setup_this_cpu c000000000099cb0 T mpic_cpu_get_priority c000000000099d30 T mpic_cpu_set_priority c000000000099db0 T mpic_teardown_this_cpu c00000000009a070 T mpic_get_one_irq c00000000009a080 T mpic_get_mcirq c00000000009a0b0 T mpic_request_ipis c00000000009a190 T smp_mpic_message_pass c00000000009a290 T smp_mpic_setup_cpu c00000000009a2a0 T mpic_reset_core c00000000009a4c8 t _mpic_map_mmio.isra.0 c00000000009a518 t kmalloc_array.constprop.0 c00000000009a550 T mpic_msi_reserve_hwirq c00000000009a590 T mpic_msi_init_allocator c00000000009a6a0 t u3msi_teardown_msi_irqs c00000000009a750 t mpic_u3msi_unmask_irq c00000000009a7a0 t mpic_u3msi_mask_irq c00000000009a7f0 t find_u4_magic_addr c00000000009a8a0 t find_ht_magic_addr.isra.0 c00000000009a9f0 t u3msi_setup_msi_irqs c00000000009ac30 T mpic_u3msi_init c00000000009ace0 T msi_bitmap_alloc_hwirqs c00000000009ae10 T msi_bitmap_free_hwirqs c00000000009aea0 T msi_bitmap_reserve_hwirq c00000000009af20 T msi_bitmap_reserve_dt_hwirqs c00000000009b110 T msi_bitmap_free c00000000009b1a0 T msi_bitmap_alloc c00000000009b2c0 t i8259_host_xlate c00000000009b300 t i8259_host_match c00000000009b360 t i8259_host_map c00000000009b3f0 t i8259_set_irq_mask.isra.0 c00000000009b4d0 t i8259_mask_irq c00000000009b5b0 t i8259_unmask_irq c00000000009b690 t i8259_mask_and_ack_irq c00000000009b9a0 T i8259_irq c00000000009be50 T i8259_get_host c00000000009be70 T i8259_init c00000000009c430 t xics_host_match c00000000009c4f0 t xics_ipi_unmask c00000000009c500 t xics_host_xlate c00000000009c540 t xics_host_map c00000000009c660 t xics_ipi_mask c00000000009c670 T xics_update_irq_servers c00000000009c7b0 T xics_set_cpu_giq c00000000009c870 T xics_setup_cpu c00000000009c8d0 T xics_teardown_cpu c00000000009c950 T xics_kexec_teardown_cpu c00000000009c9e0 T xics_migrate_irqs_away c00000000009ccb0 T xics_get_irq_server c00000000009cdf0 T xics_set_irq_type c00000000009ce60 T xics_retrigger c00000000009ceac T xics_mask_unknown_vec c00000000009cf40 t icp_native_teardown_cpu c00000000009cf80 t icp_native_flush_ipi c00000000009cfc0 t icp_native_cause_ipi c00000000009d010 T xics_wake_cpu c00000000009d040 t icp_native_set_cpu_priority c00000000009d0a0 T icp_native_eoi c00000000009d130 t icp_native_ipi_action c00000000009d1b0 t icp_native_get_irq c00000000009d330 T icp_native_cause_ipi_rm c00000000009d370 T icp_native_flush_interrupt c00000000009d490 t icp_hv_ipi_action c00000000009d540 t icp_hv_set_cppr c00000000009d5b0 t icp_hv_get_irq c00000000009d770 t icp_hv_set_cpu_priority c00000000009d810 t icp_hv_flush_ipi c00000000009d890 t icp_hv_eoi c00000000009d980 t icp_hv_cause_ipi c00000000009da20 t icp_hv_teardown_cpu c00000000009dac0 T icp_hv_init c00000000009db40 t ics_rtas_host_match c00000000009db80 t ics_rtas_get_server c00000000009dc00 t ics_rtas_map c00000000009dcf0 t ics_rtas_set_affinity c00000000009dea0 t ics_rtas_unmask_irq c00000000009dfd0 t ics_rtas_startup c00000000009e030 t ics_rtas_mask_real_irq.part.0 c00000000009e110 t ics_rtas_mask_unknown c00000000009e130 t ics_rtas_mask_irq c00000000009e150 t ics_opal_host_match c00000000009e160 t ics_opal_get_server c00000000009e1e0 t ics_opal_mask_real_irq c00000000009e260 t ics_opal_mask_unknown c00000000009e2e0 t ics_opal_mask_irq c00000000009e300 t ics_opal_map c00000000009e3e0 t ics_opal_set_affinity c00000000009e580 t ics_opal_unmask_irq c00000000009e660 t ics_opal_startup c00000000009e6c0 t icp_opal_cause_ipi c00000000009e720 t icp_opal_teardown_cpu c00000000009e760 t icp_opal_ipi_action c00000000009e7d0 t icp_opal_flush_ipi c00000000009e810 t icp_opal_set_cpu_priority c00000000009e880 t icp_opal_eoi c00000000009e920 t icp_opal_get_xirr.part.0 c00000000009e9a0 t icp_opal_get_irq c00000000009eb30 T icp_opal_flush_interrupt c00000000009ec40 T icp_opal_init c00000000009ecc0 T is_xive_irq c00000000009ece0 t xive_ipi_do_nothing c00000000009ecf0 t xive_irq_domain_match c00000000009ed40 t xive_setup_cpu c00000000009ede0 t xive_esb_read c00000000009eeb0 t xive_get_irqchip_state c00000000009ef60 t xive_cause_ipi c00000000009efc0 t xive_irq_set_type c00000000009f0c0 t xive_dec_target_count c00000000009f160 t xive_find_target_in_mask c00000000009f390 t xive_pick_irq_target c00000000009f5a0 t xive_irq_set_affinity c00000000009f7d0 t xive_scan_interrupts c00000000009fa30 t xive_get_irq c00000000009fac0 T xive_cleanup_irq_data c00000000009fba0 t xive_muxed_ipi_action c00000000009fbd0 t xive_irq_domain_unmap c00000000009fca0 t xive_irq_domain_xlate c00000000009fce0 t xive_do_source_set_mask.part.0 c00000000009fd40 t xive_irq_mask c00000000009fdd0 t xive_irq_shutdown c00000000009fea0 t xive_do_source_set_mask.constprop.0 c00000000009ff30 t xive_irq_startup c0000000000a00c0 t xive_setup_cpu_ipi c0000000000a0260 t xive_irq_unmask c0000000000a0300 t xive_do_source_eoi c0000000000a04d0 t xive_irq_set_vcpu_affinity c0000000000a0750 t xive_irq_retrigger c0000000000a07c0 t xive_irq_eoi c0000000000a0880 t xive_flush_cpu_queue.isra.0 c0000000000a09c0 t xive_prepare_cpu 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c0000000000a1d80 t xive_native_update_pending c0000000000a1e70 t xive_native_match c0000000000a1eb0 t xive_native_teardown_cpu c0000000000a1f50 T xive_native_enable_vp c0000000000a1ff0 T xive_native_disable_vp c0000000000a2070 t xive_native_setup_cpu c0000000000a2230 T xive_native_get_vp_info c0000000000a22e0 t xive_native_setup_queue c0000000000a23b0 t xive_native_get_irq_config c0000000000a2450 T xive_native_alloc_vp_block c0000000000a25c0 T xive_native_get_queue_state c0000000000a26b0 T xive_native_set_queue_state c0000000000a2730 T xive_native_has_queue_state_support c0000000000a27a0 T xive_native_get_vp_state c0000000000a2850 t __xive_native_disable_queue.isra.0 c0000000000a2900 T xive_native_disable_queue c0000000000a2910 t xive_native_cleanup_queue c0000000000a29b0 t xive_native_put_ipi c0000000000a2a30 T xive_native_free_vp_block c0000000000a2aa0 t xive_spapr_match c0000000000a2ab0 t xive_spapr_put_ipi c0000000000a2c00 t xive_spapr_eoi c0000000000a2c10 t xive_spapr_setup_cpu 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