* M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:30 2014 PAGE 001 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 1 2 ;## C Compiler OUTPUT 3 ;## ccom308 Version 5.05.01.000 4 ;## Copyright(C) 1999(2005). Renesas Technology Corp. 5 ;## and Renesas Solutions Corp., All Rights Reserved. 6 ;## Compile Start Time Fri Jun 27 17:36:30 2014 7 8 ;## COMMAND_LINE: ccom308 C:\Users\Administrator\Downloads\ssp_rsk_r8c23_hew-20140307\ssp\target\rsk_m32c87_hew\ssp_workspace\libkernel\Debug\sys_manag 9 10 11 ;## Normal Optimize OFF 12 ;## ROM size Optimize OFF 13 ;## Speed Optimize OFF 14 ;## Default ROM is far 15 ;## Default RAM is near 16 17 .GLB __SB__ 18 .SB __SB__ 19 .FB 0 20 21 22 23 24 25 ;## # FUNCTION TOPPERS_assert_abort 26 27 28 29 30 ;## # FUNCTION _syslog_0 31 32 ;## # FUNCTION _syslog_1 33 34 ;## # FUNCTION _syslog_2 35 36 ;## # FUNCTION _syslog_3 37 38 ;## # FUNCTION _syslog_4 39 40 ;## # FUNCTION _syslog_5 41 42 ;## # FUNCTION _syslog_6 43 44 45 ;## # FUNCTION get_flgreg 46 47 ;## # FUNCTION set_flgreg 48 49 ;## # FUNCTION clr_ipl 50 51 ;## # FUNCTION disint 52 53 ;## # FUNCTION enaint 54 55 ;## # FUNCTION jmp_dispatcher 56 57 58 ;## # FUNCTION TOPPERS_disint 59 60 ;## # FUNCTION TOPPERS_enaint 61 62 * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:30 2014 PAGE 002 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 63 ;## # FUNCTION sil_reb_mem 64 65 ;## # FUNCTION sil_wrb_mem 66 67 ;## # FUNCTION sil_reh_mem 68 69 ;## # FUNCTION sil_wrh_mem 70 71 ;## # FUNCTION sil_reh_bem 72 73 ;## # FUNCTION sil_wrh_bem 74 75 ;## # FUNCTION sil_rew_mem 76 77 ;## # FUNCTION sil_wrw_mem 78 79 ;## # FUNCTION sil_rew_bem 80 81 ;## # FUNCTION sil_wrw_bem 82 83 84 85 86 87 ;## # FUNCTION reset_isp 88 89 90 ;## # FUNCTION sense_context 91 92 ;## # FUNCTION t_lock_cpu 93 94 ;## # FUNCTION i_lock_cpu 95 96 ;## # FUNCTION t_unlock_cpu 97 98 ;## # FUNCTION i_unlock_cpu 99 100 ;## # FUNCTION x_sense_lock 101 102 ;## # FUNCTION x_set_ipm 103 104 ;## # FUNCTION x_get_ipm 105 106 ;## # FUNCTION x_disable_int 107 108 ;## # FUNCTION x_enable_int 109 110 ;## # FUNCTION x_clear_int 111 112 ;## # FUNCTION x_probe_int 113 114 ;## # FUNCTION x_define_inh 115 116 ;## # FUNCTION i_begin_int 117 118 ;## # FUNCTION i_end_int 119 120 ;## # FUNCTION x_define_exc 121 122 ;## # FUNCTION idle_loop 123 124 * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:30 2014 PAGE 003 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 125 126 ;## # FUNCTION actque_set 127 128 ;## # FUNCTION actque_clear 129 130 ;## # FUNCTION actque_test 131 132 133 ;## # FUNCTION loc_cpu 134 ;## # FRAME AUTO ( ercd) size 2, offset -8 135 ;## # FRAME AUTO ( ipl) size 2, offset -6 136 ;## # FRAME AUTO ( ipl) size 2, offset -4 137 ;## # FRAME AUTO ( flg_reg) size 2, offset -2 138 ;## # ARG Size(0) Auto Size(8) Context Size(8) 139 140 141 .SECTION program,CODE,ALIGN 142 .align 143 ;## # C_SRC : { 144 .glb _loc_cpu 145 000000 _loc_cpu: 146 000000 EC08 enter #08H 147 ;## # C_SRC : return (intnest > 0); 148 000002 E6D00000r Q cmp.b #00H,__kernel_intnest:16 149 000006 8B04 jleu L291 150 000008 F9A1 Q mov.w #0001H,R0 151 00000A 4A S jmp L293 152 00000B L291: 153 00000B 03 Z mov.w #0000H,R0 154 00000C L293: 155 ;## # C_SRC : CHECK_TSKCTX(); 156 00000C E990 Q cmp.w #0000H,R0 157 00000E DA07 jeq L285 158 000010 35F8E7FF S mov.w #0ffe7H,-8[FB] ; ercd 159 000014 BB22 B jmp L283 160 000016 L285: 161 ;## # C_SRC : return lock_flag; 162 000016 190000r S mov.w __kernel_lock_flag:16,R0 163 ;## # C_SRC : if (!t_sense_lock()) { 164 000019 9A1B jne L303 165 ;## # C_SRC : Asm(" stc flg, $$[FB]", ipl); 166 ;#### ASM START 167 00001B 01D3DAFA stc flg, -6[FB] 168 ;#### ASM END 169 ;## # C_SRC : return ipl; 170 00001F 39FA S mov.w -6[FB],R0 ; ipl 171 ;## # C_SRC : { 172 000021 883F8F and.b #8fH,R0H 173 000024 882F50 or.b #50H,R0H 174 000027 31FC S mov.w R0,-4[FB] ; ipl 175 ;## # C_SRC : uint16_t flg_reg = ipl; 176 000029 93FBFCFE mov.w -4[FB],-2[FB] ; ipl flg_reg 177 ;## # C_SRC : Asm(" ldc $$[FB], flg", flg_reg); 178 ;#### ASM START 179 00002D 01D3CAFE ldc -2[FB], flg 180 ;#### ASM END 181 ;## # C_SRC : lock_flag = true; 182 000031 F7E10000r Q mov.w #0001H,__kernel_lock_flag:16 183 000035 L303: 184 ;## # C_SRC : ercd = E_OK; 185 000035 33F8 Z mov.w #0000H,-8[FB] ; ercd 186 ;## # C_SRC : error_exit: * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:30 2014 PAGE 004 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 187 000037 L283: 188 ;## # C_SRC : return(ercd); 189 000037 39F8 S mov.w -8[FB],R0 ; ercd 190 000039 FC exitd 191 00003A E1: 192 00003A M1: 193 194 195 ;## # FUNCTION iloc_cpu 196 ;## # FRAME AUTO ( ercd) size 2, offset -10 197 ;## # FRAME AUTO ( ipl) size 2, offset -8 198 ;## # FRAME AUTO ( ipl) size 2, offset -6 199 ;## # FRAME AUTO ( ipl) size 2, offset -4 200 ;## # FRAME AUTO ( flg_reg) size 2, offset -2 201 ;## # ARG Size(0) Auto Size(10) Context Size(8) 202 203 .align 204 ;## # C_SRC : { 205 .glb _iloc_cpu 206 00003A _iloc_cpu: 207 00003A EC0A enter #0aH 208 ;## # C_SRC : return (intnest > 0); 209 00003C E6D00000r Q cmp.b #00H,__kernel_intnest:16 210 000040 8B04 jleu L323 211 000042 F9A1 Q mov.w #0001H,R0 212 000044 4A S jmp L325 213 000045 L323: 214 000045 03 Z mov.w #0000H,R0 215 000046 L325: 216 ;## # C_SRC : CHECK_INTCTX(); 217 000046 E990 Q cmp.w #0000H,R0 218 000048 9A07 jne L317 219 00004A 35F6E7FF S mov.w #0ffe7H,-10[FB] ; ercd 220 00004E BB31 B jmp L315 221 000050 L317: 222 ;## # C_SRC : return lock_flag; 223 000050 190000r S mov.w __kernel_lock_flag:16,R0 224 ;## # C_SRC : if (!i_sense_lock()) { 225 000053 9A2A jne L349 226 ;## # C_SRC : Asm(" stc flg, $$[FB]", ipl); 227 ;#### ASM START 228 000055 01D3DAF8 stc flg, -8[FB] 229 ;#### ASM END 230 ;## # C_SRC : return ipl; 231 000059 39F8 S mov.w -8[FB],R0 ; ipl 232 ;## # C_SRC : ipl = get_flgreg(); 233 00005B 31FA S mov.w R0,-6[FB] ; ipl 234 ;## # C_SRC : if (IPL_LOCK > ipl) { 235 00005D 77FA0050 S cmp.w #5000H,-6[FB] ; ipl 236 000061 CA13 jgeu L341 237 ;## # C_SRC : { 238 000063 39FA S mov.w -6[FB],R0 ; ipl 239 000065 883F8F and.b #8fH,R0H 240 000068 882F50 or.b #50H,R0H 241 00006B 31FC S mov.w R0,-4[FB] ; ipl 242 ;## # C_SRC : uint16_t flg_reg = ipl; 243 00006D 93FBFCFE mov.w -4[FB],-2[FB] ; ipl flg_reg 244 ;## # C_SRC : Asm(" ldc $$[FB], flg", flg_reg); 245 ;#### ASM START 246 000071 01D3CAFE ldc -2[FB], flg 247 ;#### ASM END 248 000075 L341: * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:30 2014 PAGE 005 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 249 ;## # C_SRC : saved_ipl = ipl; 250 000075 97FBFA0000r mov.w -6[FB],__kernel_saved_ipl:16 ; ipl 251 ;## # C_SRC : lock_flag = true; 252 00007A F7E10000r Q mov.w #0001H,__kernel_lock_flag:16 253 00007E L349: 254 ;## # C_SRC : ercd = E_OK; 255 00007E 33F6 Z mov.w #0000H,-10[FB] ; ercd 256 ;## # C_SRC : error_exit: 257 000080 L315: 258 ;## # C_SRC : return(ercd); 259 000080 39F6 S mov.w -10[FB],R0 ; ercd 260 000082 FC exitd 261 000083 E2: 262 000083 M2: 263 264 265 ;## # FUNCTION unl_cpu 266 ;## # FRAME AUTO ( ercd) size 2, offset -2 267 ;## # ARG Size(0) Auto Size(2) Context Size(8) 268 269 000083 DE .align 270 ;## # C_SRC : { 271 .glb _unl_cpu 272 000084 _unl_cpu: 273 000084 EC02 enter #02H 274 ;## # C_SRC : return (intnest > 0); 275 000086 E6D00000r Q cmp.b #00H,__kernel_intnest:16 276 00008A 8B04 jleu L373 277 00008C F9A1 Q mov.w #0001H,R0 278 00008E 4A S jmp L375 279 00008F L373: 280 00008F 03 Z mov.w #0000H,R0 281 000090 L375: 282 ;## # C_SRC : CHECK_TSKCTX(); 283 000090 E990 Q cmp.w #0000H,R0 284 000092 DA07 jeq L367 285 000094 35FEE7FF S mov.w #0ffe7H,-2[FB] ; ercd 286 000098 BB0D B jmp L365 287 00009A L367: 288 ;## # C_SRC : return lock_flag; 289 00009A 190000r S mov.w __kernel_lock_flag:16,R0 290 ;## # C_SRC : if (t_sense_lock()) { 291 00009D DA06 jeq L383 292 ;## # C_SRC : lock_flag = false; 293 00009F 130000r Z mov.w #0000H,__kernel_lock_flag:16 294 ;## # C_SRC : Asm(" ldipl #0"); 295 ;#### ASM START 296 0000A2 D5E8 ldipl #0 297 ;#### ASM END 298 0000A4 L383: 299 ;## # C_SRC : ercd = E_OK; 300 0000A4 33FE Z mov.w #0000H,-2[FB] ; ercd 301 ;## # C_SRC : error_exit: 302 0000A6 L365: 303 ;## # C_SRC : return(ercd); 304 0000A6 39FE S mov.w -2[FB],R0 ; ercd 305 0000A8 FC exitd 306 0000A9 E3: 307 0000A9 M3: 308 309 310 ;## # FUNCTION iunl_cpu * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:30 2014 PAGE 006 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 311 ;## # FRAME AUTO ( ercd) size 2, offset -8 312 ;## # FRAME AUTO ( ipl) size 2, offset -6 313 ;## # FRAME AUTO ( ipl) size 2, offset -4 314 ;## # FRAME AUTO ( flg_reg) size 2, offset -2 315 ;## # ARG Size(0) Auto Size(8) Context Size(8) 316 317 0000A9 DE .align 318 ;## # C_SRC : { 319 .glb _iunl_cpu 320 0000AA _iunl_cpu: 321 0000AA EC08 enter #08H 322 0000AC 8F40 pushm R1 323 ;## # C_SRC : return (intnest > 0); 324 0000AE E6D00000r Q cmp.b #00H,__kernel_intnest:16 325 0000B2 8B04 jleu L397 326 0000B4 F9A1 Q mov.w #0001H,R0 327 0000B6 4A S jmp L399 328 0000B7 L397: 329 0000B7 03 Z mov.w #0000H,R0 330 0000B8 L399: 331 ;## # C_SRC : CHECK_INTCTX(); 332 0000B8 E990 Q cmp.w #0000H,R0 333 0000BA 9A07 jne L391 334 0000BC 35F8E7FF S mov.w #0ffe7H,-8[FB] ; ercd 335 0000C0 BB27 B jmp L389 336 0000C2 L391: 337 ;## # C_SRC : return lock_flag; 338 0000C2 190000r S mov.w __kernel_lock_flag:16,R0 339 ;## # C_SRC : if (i_sense_lock()) { 340 0000C5 DA20 jeq L413 341 ;## # C_SRC : lock_flag = false; 342 0000C7 130000r Z mov.w #0000H,__kernel_lock_flag:16 343 ;## # C_SRC : Asm(" stc flg, $$[FB]", ipl); 344 ;#### ASM START 345 0000CA 01D3DAFA stc flg, -6[FB] 346 ;#### ASM END 347 ;## # C_SRC : return ipl; 348 0000CE 39FA S mov.w -6[FB],R0 ; ipl 349 ;## # C_SRC : { 350 0000D0 5F0000r S mov.w __kernel_saved_ipl:16,R1 351 0000D3 89FF0070 and.w #7000H,R1 352 0000D7 883F8F and.b #8fH,R0H 353 0000DA C9B5 or.w R1,R0 354 0000DC 31FC S mov.w R0,-4[FB] ; ipl 355 ;## # C_SRC : uint16_t flg_reg = ipl; 356 0000DE 93FBFCFE mov.w -4[FB],-2[FB] ; ipl flg_reg 357 ;## # C_SRC : Asm(" ldc $$[FB], flg", flg_reg); 358 ;#### ASM START 359 0000E2 01D3CAFE ldc -2[FB], flg 360 ;#### ASM END 361 0000E6 L413: 362 ;## # C_SRC : ercd = E_OK; 363 0000E6 33F8 Z mov.w #0000H,-8[FB] ; ercd 364 ;## # C_SRC : error_exit: 365 0000E8 L389: 366 ;## # C_SRC : return(ercd); 367 0000E8 39F8 S mov.w -8[FB],R0 ; ercd 368 0000EA 8E02 popm R1 369 0000EC FC exitd 370 0000ED E4: 371 0000ED M4: 372 * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:30 2014 PAGE 007 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 373 374 ;## # FUNCTION dis_dsp 375 ;## # FRAME AUTO ( ercd) size 2, offset -8 376 ;## # FRAME AUTO ( ipl) size 2, offset -6 377 ;## # FRAME AUTO ( ipl) size 2, offset -4 378 ;## # FRAME AUTO ( flg_reg) size 2, offset -2 379 ;## # ARG Size(0) Auto Size(8) Context Size(8) 380 381 0000ED DE .align 382 ;## # C_SRC : { 383 .glb _dis_dsp 384 0000EE _dis_dsp: 385 0000EE EC08 enter #08H 386 ;## # C_SRC : return (intnest > 0); 387 0000F0 E6D00000r Q cmp.b #00H,__kernel_intnest:16 388 0000F4 8B04 jleu L433 389 0000F6 F9A1 Q mov.w #0001H,R0 390 0000F8 4A S jmp L435 391 0000F9 L433: 392 0000F9 03 Z mov.w #0000H,R0 393 0000FA L435: 394 ;## # C_SRC : CHECK_TSKCTX_UNL(); 395 0000FA E990 Q cmp.w #0000H,R0 396 0000FC 9A06 jne L463 397 ;## # C_SRC : return lock_flag; 398 0000FE 190000r S mov.w __kernel_lock_flag:16,R0 399 ;## # C_SRC : CHECK_TSKCTX_UNL(); 400 000101 DA07 jeq L423 401 000103 L463: 402 000103 35F8E7FF S mov.w #0ffe7H,-8[FB] ; ercd 403 000107 BB26 B jmp L457 404 000109 L423: 405 ;## # C_SRC : Asm(" stc flg, $$[FB]", ipl); 406 ;#### ASM START 407 000109 01D3DAFA stc flg, -6[FB] 408 ;#### ASM END 409 ;## # C_SRC : return ipl; 410 00010D 39FA S mov.w -6[FB],R0 ; ipl 411 ;## # C_SRC : { 412 00010F 883F8F and.b #8fH,R0H 413 000112 882F50 or.b #50H,R0H 414 000115 31FC S mov.w R0,-4[FB] ; ipl 415 ;## # C_SRC : uint16_t flg_reg = ipl; 416 000117 93FBFCFE mov.w -4[FB],-2[FB] ; ipl flg_reg 417 ;## # C_SRC : Asm(" ldc $$[FB], flg", flg_reg); 418 ;#### ASM START 419 00011B 01D3CAFE ldc -2[FB], flg 420 ;#### ASM END 421 ;## # C_SRC : lock_flag = true; 422 00011F F7E10000r Q mov.w #0001H,__kernel_lock_flag:16 423 ;## # C_SRC : disdsp = true; 424 000123 F7E10000r Q mov.w #0001H,__kernel_disdsp:16 425 ;## # C_SRC : ercd = E_OK; 426 000127 33F8 Z mov.w #0000H,-8[FB] ; ercd 427 ;## # C_SRC : lock_flag = false; 428 000129 130000r Z mov.w #0000H,__kernel_lock_flag:16 429 ;## # C_SRC : Asm(" ldipl #0"); 430 ;#### ASM START 431 00012C D5E8 ldipl #0 432 ;#### ASM END 433 ;## # C_SRC : } 434 00012E L457: * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:30 2014 PAGE 008 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 435 ;## # C_SRC : return(ercd); 436 00012E 39F8 S mov.w -8[FB],R0 ; ercd 437 000130 FC exitd 438 000131 E5: 439 000131 M5: 440 441 442 ;## # FUNCTION ena_dsp 443 ;## # FRAME AUTO ( ercd) size 2, offset -8 444 ;## # FRAME AUTO ( ipl) size 2, offset -6 445 ;## # FRAME AUTO ( ipl) size 2, offset -4 446 ;## # FRAME AUTO ( flg_reg) size 2, offset -2 447 ;## # FRAME AUTO ( tskipri) size 2, offset -4 448 ;## # ARG Size(0) Auto Size(8) Context Size(8) 449 450 000131 DE .align 451 ;## # C_SRC : { 452 .glb _ena_dsp 453 000132 _ena_dsp: 454 000132 EC08 enter #08H 455 ;## # C_SRC : return (intnest > 0); 456 000134 E6D00000r Q cmp.b #00H,__kernel_intnest:16 457 000138 8B04 jleu L477 458 00013A F9A1 Q mov.w #0001H,R0 459 00013C 4A S jmp L479 460 00013D L477: 461 00013D 03 Z mov.w #0000H,R0 462 00013E L479: 463 ;## # C_SRC : CHECK_TSKCTX_UNL(); 464 00013E E990 Q cmp.w #0000H,R0 465 000140 9A06 jne L517 466 ;## # C_SRC : return lock_flag; 467 000142 190000r S mov.w __kernel_lock_flag:16,R0 468 ;## # C_SRC : CHECK_TSKCTX_UNL(); 469 000145 DA07 jeq L467 470 000147 L517: 471 000147 35F8E7FF S mov.w #0ffe7H,-8[FB] ; ercd 472 00014B BB38 B jmp L511 473 00014D L467: 474 ;## # C_SRC : Asm(" stc flg, $$[FB]", ipl); 475 ;#### ASM START 476 00014D 01D3DAFA stc flg, -6[FB] 477 ;#### ASM END 478 ;## # C_SRC : return ipl; 479 000151 39FA S mov.w -6[FB],R0 ; ipl 480 ;## # C_SRC : { 481 000153 883F8F and.b #8fH,R0H 482 000156 882F50 or.b #50H,R0H 483 000159 31FC S mov.w R0,-4[FB] ; ipl 484 ;## # C_SRC : uint16_t flg_reg = ipl; 485 00015B 93FBFCFE mov.w -4[FB],-2[FB] ; ipl flg_reg 486 ;## # C_SRC : Asm(" ldc $$[FB], flg", flg_reg); 487 ;#### ASM START 488 00015F 01D3CAFE ldc -2[FB], flg 489 ;#### ASM END 490 ;## # C_SRC : lock_flag = true; 491 000163 F7E10000r Q mov.w #0001H,__kernel_lock_flag:16 492 ;## # C_SRC : disdsp = false; 493 000167 130000r Z mov.w #0000H,__kernel_disdsp:16 494 ;## # C_SRC : tskipri = search_schedtsk(); 495 00016A CD000000r A jsr __kernel_search_schedtsk 496 00016E 31FC S mov.w R0,-4[FB] ; tskipri * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:30 2014 PAGE 009 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 497 ;## # C_SRC : if (tskipri < runtsk_curpri) { 498 000170 B3F60000rFC cmp.w __kernel_runtsk_curpri:16,-4[FB] ; tskipri 499 000175 CA07 jgeu L499 500 ;## # C_SRC : run_task(tskipri); 501 000177 39FC S mov.w -4[FB],R0 ; tskipri 502 000179 CD000000r A jsr $_kernel_run_task 503 00017D L499: 504 ;## # C_SRC : ercd = E_OK; 505 00017D 33F8 Z mov.w #0000H,-8[FB] ; ercd 506 ;## # C_SRC : lock_flag = false; 507 00017F 130000r Z mov.w #0000H,__kernel_lock_flag:16 508 ;## # C_SRC : Asm(" ldipl #0"); 509 ;#### ASM START 510 000182 D5E8 ldipl #0 511 ;#### ASM END 512 ;## # C_SRC : } 513 000184 L511: 514 ;## # C_SRC : return(ercd); 515 000184 39F8 S mov.w -8[FB],R0 ; ercd 516 000186 FC exitd 517 000187 E6: 518 000187 M6: 519 520 521 ;## # FUNCTION sns_ctx 522 ;## # FRAME AUTO ( state) size 2, offset -2 523 ;## # ARG Size(0) Auto Size(2) Context Size(8) 524 525 000187 DE .align 526 ;## # C_SRC : { 527 .glb _sns_ctx 528 000188 _sns_ctx: 529 000188 EC02 enter #02H 530 ;## # C_SRC : return (intnest > 0); 531 00018A E6D00000r Q cmp.b #00H,__kernel_intnest:16 532 00018E 8B04 jleu L523 533 000190 F9A1 Q mov.w #0001H,R0 534 000192 4A S jmp L525 535 000193 L523: 536 000193 03 Z mov.w #0000H,R0 537 000194 L525: 538 ;## # C_SRC : state = sense_context() ? true : false; 539 000194 E990 Q cmp.w #0000H,R0 540 000196 D9B2 scnz R0 541 000198 31FE S mov.w R0,-2[FB] ; state 542 ;## # C_SRC : return(state); 543 00019A 39FE S mov.w -2[FB],R0 ; state 544 00019C FC exitd 545 00019D E7: 546 00019D M8: 547 548 549 ;## # FUNCTION sns_loc 550 ;## # FRAME AUTO ( state) size 2, offset -2 551 ;## # ARG Size(0) Auto Size(2) Context Size(8) 552 553 00019D DE .align 554 ;## # C_SRC : { 555 .glb _sns_loc 556 00019E _sns_loc: 557 00019E EC02 enter #02H 558 ;## # C_SRC : return lock_flag; * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:30 2014 PAGE 010 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 559 0001A0 190000r S mov.w __kernel_lock_flag:16,R0 560 ;## # C_SRC : state = x_sense_lock() ? true : false; 561 0001A3 D9B2 scnz R0 562 0001A5 31FE S mov.w R0,-2[FB] ; state 563 ;## # C_SRC : return(state); 564 0001A7 39FE S mov.w -2[FB],R0 ; state 565 0001A9 FC exitd 566 0001AA E8: 567 0001AA M10: 568 569 570 ;## # FUNCTION sns_dsp 571 ;## # FRAME AUTO ( state) size 2, offset -2 572 ;## # ARG Size(0) Auto Size(2) Context Size(8) 573 574 .align 575 ;## # C_SRC : { 576 .glb _sns_dsp 577 0001AA _sns_dsp: 578 0001AA EC02 enter #02H 579 ;## # C_SRC : state = disdsp; 580 0001AC B3FB0000rFE mov.w __kernel_disdsp:16,-2[FB] ; state 581 ;## # C_SRC : return(state); 582 0001B1 39FE S mov.w -2[FB],R0 ; state 583 0001B3 FC exitd 584 0001B4 E9: 585 0001B4 M11: 586 587 588 ;## # FUNCTION sns_dpn 589 ;## # FRAME AUTO ( state) size 2, offset -2 590 ;## # ARG Size(0) Auto Size(2) Context Size(8) 591 592 .align 593 ;## # C_SRC : { 594 .glb _sns_dpn 595 0001B4 _sns_dpn: 596 0001B4 EC02 enter #02H 597 ;## # C_SRC : return (intnest > 0); 598 0001B6 E6D00000r Q cmp.b #00H,__kernel_intnest:16 599 0001BA 8B04 jleu L561 600 0001BC F9A1 Q mov.w #0001H,R0 601 0001BE 4A S jmp L563 602 0001BF L561: 603 0001BF 03 Z mov.w #0000H,R0 604 0001C0 L563: 605 ;## # C_SRC : true : false; 606 0001C0 E990 Q cmp.w #0000H,R0 607 0001C2 9A0B jne L605 608 ;## # C_SRC : return lock_flag; 609 0001C4 190000r S mov.w __kernel_lock_flag:16,R0 610 ;## # C_SRC : true : false; 611 0001C7 9A06 jne L607 612 0001C9 190000r S mov.w __kernel_disdsp:16,R0 613 0001CC DA04 jeq L589 614 0001CE L607: 615 0001CE L605: 616 0001CE F9A1 Q mov.w #0001H,R0 617 0001D0 4A S jmp L591 618 0001D1 L589: 619 0001D1 03 Z mov.w #0000H,R0 620 0001D2 L591: * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:30 2014 PAGE 011 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 621 0001D2 31FE S mov.w R0,-2[FB] ; state 622 ;## # C_SRC : return(state); 623 0001D4 39FE S mov.w -2[FB],R0 ; state 624 0001D6 FC exitd 625 0001D7 E10: 626 0001D7 M12: 627 628 629 ;## # FUNCTION sns_ker 630 ;## # FRAME AUTO ( state) size 2, offset -2 631 ;## # ARG Size(0) Auto Size(2) Context Size(8) 632 633 0001D7 DE .align 634 ;## # C_SRC : { 635 .glb _sns_ker 636 0001D8 _sns_ker: 637 0001D8 EC02 enter #02H 638 ;## # C_SRC : state = kerflg ? false : true; 639 0001DA 190000r S mov.w __kernel_kerflg:16,R0 640 0001DD D9BA scz R0 641 0001DF 31FE S mov.w R0,-2[FB] ; state 642 ;## # C_SRC : return(state); 643 0001E1 39FE S mov.w -2[FB],R0 ; state 644 0001E3 FC exitd 645 0001E4 E11: 646 0001E4 M14: 647 648 .glb $act_tsk 649 .glb $iact_tsk 650 .glb $psnd_dtq 651 .glb $ipsnd_dtq 652 .glb $prcv_dtq 653 .glb $set_flg 654 .glb $iset_flg 655 .glb $clr_flg 656 .glb $pol_flg 657 .glb _ext_ker 658 .glb $dis_int 659 .glb $ena_int 660 .glb $sta_cyc 661 .glb $stp_cyc 662 .glb $sta_alm 663 .glb $stp_alm 664 .glb _get_tim 665 .glb $syslog_wri_log 666 .glb _syslog_printf 667 .glb _syslog_print 668 .glb $syslog_lostmsg 669 .glb _syslog 670 .glb _sil_dly_nse 671 .glb $target_fput_log 672 .glb _sio_initialize 673 .glb $sio_opn_por 674 .glb _sio_cls_por 675 .glb _sio_isr_rcv 676 .glb _sio_isr_snd 677 .glb _sio_snd_chr 678 .glb _sio_rcv_chr 679 .glb _sio_ena_cbr 680 .glb _sio_dis_cbr 681 .glb _sio_irdy_snd 682 .glb _sio_irdy_rcv * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:30 2014 PAGE 012 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 683 .glb $sio_pol_snd_chr 684 .glb __kernel_target_initialize 685 .glb __kernel_target_exit 686 .glb __kernel_intnest 687 .glb __kernel_lock_flag 688 .glb __kernel_saved_ipl 689 .glb __kernel_intc_reg 690 .glb __kernel_intpri_table 691 .glb $_kernel_x_config_int 692 .glb __kernel_prc_initialize 693 .glb __kernel_start_dispatch 694 .glb __kernel_call_exit_kernel 695 .glb __kernel_prc_terminate 696 .glb __kernel_initialize_object 697 .glb __kernel_call_inirtn 698 .glb __kernel_call_terrtn 699 .glb _istksz 700 .glb _istk 701 .glb __kernel_kerflg 702 .glb _sta_ker 703 .glb __kernel_exit_kernel 704 .glb __kernel_tmax_tskid 705 .glb __kernel_ready_primap 706 .glb _actque_bitmap 707 .glb __kernel_reqflg 708 .glb __kernel_disdsp 709 .glb __kernel_runtsk_curpri 710 .glb __kernel_runtsk_ipri 711 .glb __kernel_initialize_task 712 .glb $_kernel_make_active 713 .glb $_kernel_test_dormant 714 .glb __kernel_search_schedtsk 715 .glb $_kernel_run_task 716 .glb __kernel_dispatcher 717 .glb $_kernel_get_ipri_self 718 .glb $_kernel_get_ipri 719 ;################################# 720 ;### STATIC DATA INFORMATION ### 721 ;################################# 722 ;################################# 723 ;################################# 724 ;################################# 725 726 .END Information List TOTAL ERROR(S) 00000 TOTAL WARNING(S) 00000 TOTAL LINE(S) 00726 LINES Section List Attr Size Name CODE 00000484(0001E4H) program