* M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 001 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 1 2 ;## C Compiler OUTPUT 3 ;## ccom308 Version 5.05.01.000 4 ;## Copyright(C) 1999(2005). Renesas Technology Corp. 5 ;## and Renesas Solutions Corp., All Rights Reserved. 6 ;## Compile Start Time Fri Jun 27 17:36:29 2014 7 8 ;## COMMAND_LINE: ccom308 C:\Users\Administrator\Downloads\ssp_rsk_r8c23_hew-20140307\ssp\target\rsk_m32c87_hew\ssp_workspace\libkernel\Debug\cyclic.i 9 10 11 ;## Normal Optimize OFF 12 ;## ROM size Optimize OFF 13 ;## Speed Optimize OFF 14 ;## Default ROM is far 15 ;## Default RAM is near 16 17 .GLB __SB__ 18 .SB __SB__ 19 .FB 0 20 21 22 23 24 25 ;## # FUNCTION TOPPERS_assert_abort 26 27 28 29 30 ;## # FUNCTION _syslog_0 31 32 ;## # FUNCTION _syslog_1 33 34 ;## # FUNCTION _syslog_2 35 36 ;## # FUNCTION _syslog_3 37 38 ;## # FUNCTION _syslog_4 39 40 ;## # FUNCTION _syslog_5 41 42 ;## # FUNCTION _syslog_6 43 44 45 ;## # FUNCTION get_flgreg 46 47 ;## # FUNCTION set_flgreg 48 49 ;## # FUNCTION clr_ipl 50 51 ;## # FUNCTION disint 52 53 ;## # FUNCTION enaint 54 55 ;## # FUNCTION jmp_dispatcher 56 57 58 ;## # FUNCTION TOPPERS_disint 59 60 ;## # FUNCTION TOPPERS_enaint 61 62 * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 002 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 63 ;## # FUNCTION sil_reb_mem 64 65 ;## # FUNCTION sil_wrb_mem 66 67 ;## # FUNCTION sil_reh_mem 68 69 ;## # FUNCTION sil_wrh_mem 70 71 ;## # FUNCTION sil_reh_bem 72 73 ;## # FUNCTION sil_wrh_bem 74 75 ;## # FUNCTION sil_rew_mem 76 77 ;## # FUNCTION sil_wrw_mem 78 79 ;## # FUNCTION sil_rew_bem 80 81 ;## # FUNCTION sil_wrw_bem 82 83 84 85 86 87 ;## # FUNCTION reset_isp 88 89 90 ;## # FUNCTION sense_context 91 92 ;## # FUNCTION t_lock_cpu 93 94 ;## # FUNCTION i_lock_cpu 95 96 ;## # FUNCTION t_unlock_cpu 97 98 ;## # FUNCTION i_unlock_cpu 99 100 ;## # FUNCTION x_sense_lock 101 102 ;## # FUNCTION x_set_ipm 103 104 ;## # FUNCTION x_get_ipm 105 106 ;## # FUNCTION x_disable_int 107 108 ;## # FUNCTION x_enable_int 109 110 ;## # FUNCTION x_clear_int 111 112 ;## # FUNCTION x_probe_int 113 114 ;## # FUNCTION x_define_inh 115 116 ;## # FUNCTION i_begin_int 117 118 ;## # FUNCTION i_end_int 119 120 ;## # FUNCTION x_define_exc 121 122 ;## # FUNCTION idle_loop 123 124 * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 003 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 125 126 ;## # FUNCTION queue_initialize 127 128 ;## # FUNCTION queue_insert_prev 129 130 ;## # FUNCTION queue_delete_next 131 132 ;## # FUNCTION queue_empty 133 134 135 136 137 ;## # FUNCTION _kernel_initialize_cyclic 138 ;## # FRAME AUTO ( i) size 2, offset -2 139 ;## # ARG Size(0) Auto Size(2) Context Size(8) 140 141 142 .SECTION program,CODE,ALIGN 143 .align 144 ;## # C_SRC : { 145 .glb __kernel_initialize_cyclic 146 000000 __kernel_initialize_cyclic: 147 000000 EC02 enter #02H 148 000002 8F7C pushm R1,R2,R3,A0,A1 149 ;## # C_SRC : cyccb_cycact = cycinib_cycact; 150 000004 B7EB000000r0000r mov.w __kernel_cycinib_cycact,__kernel_cyccb_cycact:16 151 ;## # C_SRC : for(i = 0U ; i < tnum_cyc ; i++) { 152 00000B 33FE Z mov.w #0000H,-2[FB] ; i 153 00000D L293: 154 ;## # C_SRC : for(i = 0U ; i < tnum_cyc ; i++) { 155 00000D B3E6000000rFE cmp.w __kernel_tmax_cycid,-2[FB] ; i 156 000013 CA69 jgeu L297 157 ;## # C_SRC : cyccb_evttim[i] = 0U; 158 000015 39FE S mov.w -2[FB],R0 ; i 159 000017 F920 Q mov.w #0H,R2 160 000019 C1A3 mov.l R2R0,A0 161 00001B 80A102 shlnc.l #2,A0 162 00001E B4110000r00 * mov.l #00000000H,__kernel_cyccb_evttim:16[A0] 163 ;## # C_SRC : if((cycinib_cycact & CYCACT_BIT(i)) != 0U) { 164 000023 987BFE mov.b -2[FB],R1H ; i 165 000026 F9A1 Q mov.w #0001H,R0 166 000028 A9BE shl.w R1H,R0 167 00002A B9AD000000r and.w __kernel_cycinib_cycact,R0 168 00002F DA48 jeq L305 169 ;## # C_SRC : (EVTTIM)cycinib_cycphs[i] , call_cychdr , i); 170 000031 39FE S mov.w -2[FB],R0 ; i 171 000033 F920 Q mov.w #0H,R2 172 000035 A881 push.l R2R0 173 000037 B65300000000r push.l #__kernel_call_cychdr 174 00003D 39FE S mov.w -2[FB],R0 ; i 175 00003F F920 Q mov.w #0H,R2 176 000041 C9A2 add.l R2R0,R2R0 177 000043 C1A3 mov.l R2R0,A0 178 000045 B98B000000r mov.w __kernel_cycinib_cycphs[A0],R0 179 00004A F920 Q mov.w #0H,R2 180 00004C A881 push.l R2R0 181 00004E 39FE S mov.w -2[FB],R0 ; i 182 000050 B9A8000000r add.w __kernel_cycevtid_offset,R0 183 000055 CD000000r A jsr $_kernel_time_event_enqueue 184 000059 B6030C S add.l #0cH,SP 185 ;## # C_SRC : cyccb_evttim[i] = cycinib_cycphs[i]; 186 00005C 39FE S mov.w -2[FB],R0 ; i * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 004 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 187 00005E F920 Q mov.w #0H,R2 188 000060 C9A2 add.l R2R0,R2R0 189 000062 7FFE S mov.w -2[FB],R1 ; i 190 000064 F960 Q mov.w #0H,R3 191 000066 C1B3 mov.l R3R1,A0 192 000068 80A102 shlnc.l #2,A0 193 00006B C1E3 mov.l R2R0,A1 194 00006D B51B000000r0000r mov.w __kernel_cycinib_cycphs[A1],__kernel_cyccb_evttim:16[A0] 195 000074 F5200000r Q mov.w #0000H,__kernel_cyccb_evttim+2:16[A0] 196 000078 L305: 197 000078 E3F1FE Q add.w #0001H,-2[FB] ; i 198 00007B BB91 B jmp L293 199 00007D L297: 200 ;## # C_SRC : } 201 00007D 8E3E popm R1,R2,R3,A0,A1 202 00007F FC exitd 203 000080 E1: 204 000080 M1: 205 206 207 ;## # FUNCTION sta_cyc 208 ;## # FRAME AUTO ( evttim) size 4, offset -12 209 ;## # FRAME AUTO ( cycid) size 2, offset -12 210 ;## # FRAME AUTO ( index) size 2, offset -8 211 ;## # FRAME AUTO ( ercd) size 2, offset -6 212 ;## # FRAME AUTO ( ipl) size 2, offset -4 213 ;## # FRAME AUTO ( ipl) size 2, offset -12 214 ;## # FRAME AUTO ( flg_reg) size 2, offset -2 215 ;## # REGISTER ARG ( cycid) size 2, REGISTER R0 216 ;## # ARG Size(0) Auto Size(12) Context Size(8) 217 218 .align 219 ;## # C_SRC : { 220 .glb $sta_cyc 221 000080 $sta_cyc: 222 000080 EC0C enter #0cH 223 000082 8F68 pushm R1,R2,A0 224 000084 31F4 S mov.w R0,-12[FB] ; cycid cycid 225 ;## # C_SRC : uint_t index = INDEX_CYC(cycid); 226 000086 39F4 S mov.w -12[FB],R0 ; cycid 227 000088 E9BF Q add.w #-1,R0 228 00008A 31F8 S mov.w R0,-8[FB] ; index 229 ;## # C_SRC : return (intnest > 0); 230 00008C E6D00000r Q cmp.b #00H,__kernel_intnest:16 231 000090 8B04 jleu L331 232 000092 F9A1 Q mov.w #0001H,R0 233 000094 4A S jmp L333 234 000095 L331: 235 000095 03 Z mov.w #0000H,R0 236 000096 L333: 237 ;## # C_SRC : CHECK_TSKCTX_UNL(); 238 000096 E990 Q cmp.w #0000H,R0 239 000098 9A06 jne L403 240 ;## # C_SRC : return lock_flag; 241 00009A 190000r S mov.w __kernel_lock_flag:16,R0 242 ;## # C_SRC : CHECK_TSKCTX_UNL(); 243 00009D DA08 jeq L321 244 00009F L403: 245 00009F 35FAE7FF S mov.w #0ffe7H,-6[FB] ; ercd 246 0000A3 CE9D00 W jmp L397 247 0000A6 L321: 248 ;## # C_SRC : CHECK_CYCID(cycid); * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 005 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 249 0000A6 E3D1F4 Q cmp.w #0001H,-12[FB] ; cycid 250 0000A9 FA09 jlt L415 251 0000AB B3E6000000rF4 cmp.w __kernel_tmax_cycid,-12[FB] ; cycid 252 0000B1 EB08 jle L347 253 0000B3 L415: 254 0000B3 35FAEEFF S mov.w #0ffeeH,-6[FB] ; ercd 255 0000B7 CE8900 W jmp L397 256 0000BA L347: 257 ;## # C_SRC : Asm(" stc flg, $$[FB]", ipl); 258 ;#### ASM START 259 0000BA 01D3DAFC stc flg, -4[FB] 260 ;#### ASM END 261 ;## # C_SRC : return ipl; 262 0000BE 39FC S mov.w -4[FB],R0 ; ipl 263 ;## # C_SRC : { 264 0000C0 883F8F and.b #8fH,R0H 265 0000C3 882F50 or.b #50H,R0H 266 0000C6 31F4 S mov.w R0,-12[FB] ; ipl 267 ;## # C_SRC : uint16_t flg_reg = ipl; 268 0000C8 93FBF4FE mov.w -12[FB],-2[FB] ; ipl flg_reg 269 ;## # C_SRC : Asm(" ldc $$[FB], flg", flg_reg); 270 ;#### ASM START 271 0000CC 01D3CAFE ldc -2[FB], flg 272 ;#### ASM END 273 ;## # C_SRC : lock_flag = true; 274 0000D0 F7E10000r Q mov.w #0001H,__kernel_lock_flag:16 275 ;## # C_SRC : if((cyccb_cycact & CYCACT_BIT(index)) != 0U) { 276 0000D4 987BF8 mov.b -8[FB],R1H ; index 277 0000D7 F9A1 Q mov.w #0001H,R0 278 0000D9 A9BE shl.w R1H,R0 279 0000DB B9BD0000r and.w __kernel_cyccb_cycact:16,R0 280 0000DF DA0E jeq L385 281 ;## # C_SRC : time_event_dequeue(CYC_EVTID(index)); 282 0000E1 39F8 S mov.w -8[FB],R0 ; index 283 0000E3 B9A8000000r add.w __kernel_cycevtid_offset,R0 284 0000E8 CD000000r A jsr $_kernel_time_event_dequeue 285 ;## # C_SRC : } 286 0000EC BB0C B jmp L387 287 ;## # C_SRC : else { 288 0000EE L385: 289 ;## # C_SRC : cyccb_cycact |= CYCACT_BIT(index); 290 0000EE 987BF8 mov.b -8[FB],R1H ; index 291 0000F1 F9A1 Q mov.w #0001H,R0 292 0000F3 A9BE shl.w R1H,R0 293 0000F5 C7E50000r or.w R0,__kernel_cyccb_cycact:16 294 ;## # C_SRC : } 295 0000F9 L387: 296 ;## # C_SRC : evttim = current_time + cycinib_cycphs[index]; 297 0000F9 39F8 S mov.w -8[FB],R0 ; index 298 0000FB F920 Q mov.w #0H,R2 299 0000FD C1A3 mov.l R2R0,A0 300 0000FF 81A2 add.l A0,A0 301 000101 B98B000000r mov.w __kernel_cycinib_cycphs[A0],R0 302 000106 F920 Q mov.w #0H,R2 303 000108 B9B20000r add.l __kernel_current_time:16,R2R0 304 00010C C3E3F4 mov.l R2R0,-12[FB] ; evttim 305 ;## # C_SRC : evttim , call_cychdr , index); 306 00010F 39F8 S mov.w -8[FB],R0 ; index 307 000111 F920 Q mov.w #0H,R2 308 000113 A881 push.l R2R0 309 000115 B65300000000r push.l #__kernel_call_cychdr 310 00011B A2C1F4 push.l -12[FB] ; evttim * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 006 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 311 00011E 39F8 S mov.w -8[FB],R0 ; index 312 000120 B9A8000000r add.w __kernel_cycevtid_offset,R0 313 000125 CD000000r A jsr $_kernel_time_event_enqueue 314 000129 B6030C S add.l #0cH,SP 315 ;## # C_SRC : cyccb_evttim[index] = evttim; 316 00012C 39F8 S mov.w -8[FB],R0 ; index 317 00012E F920 Q mov.w #0H,R2 318 000130 C1A3 mov.l R2R0,A0 319 000132 80A102 shlnc.l #2,A0 320 000135 9533F40000r mov.l -12[FB],__kernel_cyccb_evttim:16[A0] ; evttim 321 ;## # C_SRC : ercd = E_OK; 322 00013A 33FA Z mov.w #0000H,-6[FB] ; ercd 323 ;## # C_SRC : lock_flag = false; 324 00013C 130000r Z mov.w #0000H,__kernel_lock_flag:16 325 ;## # C_SRC : Asm(" ldipl #0"); 326 ;#### ASM START 327 00013F D5E8 ldipl #0 328 ;#### ASM END 329 ;## # C_SRC : } 330 000141 L397: 331 ;## # C_SRC : return ercd; 332 000141 39FA S mov.w -6[FB],R0 ; ercd 333 000143 8E16 popm R1,R2,A0 334 000145 FC exitd 335 000146 E2: 336 000146 M2: 337 338 339 ;## # FUNCTION stp_cyc 340 ;## # FRAME AUTO ( cycid) size 2, offset -10 341 ;## # FRAME AUTO ( index) size 2, offset -8 342 ;## # FRAME AUTO ( ercd) size 2, offset -6 343 ;## # FRAME AUTO ( ipl) size 2, offset -4 344 ;## # FRAME AUTO ( ipl) size 2, offset -10 345 ;## # FRAME AUTO ( flg_reg) size 2, offset -2 346 ;## # REGISTER ARG ( cycid) size 2, REGISTER R0 347 ;## # ARG Size(0) Auto Size(10) Context Size(8) 348 349 .align 350 ;## # C_SRC : { 351 .glb $stp_cyc 352 000146 $stp_cyc: 353 000146 EC0A enter #0aH 354 000148 8F40 pushm R1 355 00014A 31F6 S mov.w R0,-10[FB] ; cycid cycid 356 ;## # C_SRC : uint_t index = INDEX_CYC(cycid); 357 00014C 39F6 S mov.w -10[FB],R0 ; cycid 358 00014E E9BF Q add.w #-1,R0 359 000150 31F8 S mov.w R0,-8[FB] ; index 360 ;## # C_SRC : return (intnest > 0); 361 000152 E6D00000r Q cmp.b #00H,__kernel_intnest:16 362 000156 8B04 jleu L431 363 000158 F9A1 Q mov.w #0001H,R0 364 00015A 4A S jmp L433 365 00015B L431: 366 00015B 03 Z mov.w #0000H,R0 367 00015C L433: 368 ;## # C_SRC : CHECK_TSKCTX_UNL(); 369 00015C E990 Q cmp.w #0000H,R0 370 00015E 9A06 jne L503 371 ;## # C_SRC : return lock_flag; 372 000160 190000r S mov.w __kernel_lock_flag:16,R0 * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 007 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 373 ;## # C_SRC : CHECK_TSKCTX_UNL(); 374 000163 DA07 jeq L421 375 000165 L503: 376 000165 35FAE7FF S mov.w #0ffe7H,-6[FB] ; ercd 377 000169 BB5A B jmp L497 378 00016B L421: 379 ;## # C_SRC : CHECK_CYCID(cycid); 380 00016B E3D1F6 Q cmp.w #0001H,-10[FB] ; cycid 381 00016E FA09 jlt L515 382 000170 B3E6000000rF6 cmp.w __kernel_tmax_cycid,-10[FB] ; cycid 383 000176 EB07 jle L447 384 000178 L515: 385 000178 35FAEEFF S mov.w #0ffeeH,-6[FB] ; ercd 386 00017C BB47 B jmp L497 387 00017E L447: 388 ;## # C_SRC : Asm(" stc flg, $$[FB]", ipl); 389 ;#### ASM START 390 00017E 01D3DAFC stc flg, -4[FB] 391 ;#### ASM END 392 ;## # C_SRC : return ipl; 393 000182 39FC S mov.w -4[FB],R0 ; ipl 394 ;## # C_SRC : { 395 000184 883F8F and.b #8fH,R0H 396 000187 882F50 or.b #50H,R0H 397 00018A 31F6 S mov.w R0,-10[FB] ; ipl 398 ;## # C_SRC : uint16_t flg_reg = ipl; 399 00018C 93FBF6FE mov.w -10[FB],-2[FB] ; ipl flg_reg 400 ;## # C_SRC : Asm(" ldc $$[FB], flg", flg_reg); 401 ;#### ASM START 402 000190 01D3CAFE ldc -2[FB], flg 403 ;#### ASM END 404 ;## # C_SRC : lock_flag = true; 405 000194 F7E10000r Q mov.w #0001H,__kernel_lock_flag:16 406 ;## # C_SRC : if((cyccb_cycact & CYCACT_BIT(index)) != 0U) { 407 000198 987BF8 mov.b -8[FB],R1H ; index 408 00019B F9A1 Q mov.w #0001H,R0 409 00019D A9BE shl.w R1H,R0 410 00019F B9BD0000r and.w __kernel_cyccb_cycact:16,R0 411 0001A3 DA19 jeq L485 412 ;## # C_SRC : cyccb_cycact &= ~CYCACT_BIT(index); 413 0001A5 987BF8 mov.b -8[FB],R1H ; index 414 0001A8 F9A1 Q mov.w #0001H,R0 415 0001AA A9BE shl.w R1H,R0 416 0001AC A99E not.w R0 417 0001AE C7ED0000r and.w R0,__kernel_cyccb_cycact:16 418 ;## # C_SRC : time_event_dequeue(CYC_EVTID(index)); 419 0001B2 39F8 S mov.w -8[FB],R0 ; index 420 0001B4 B9A8000000r add.w __kernel_cycevtid_offset,R0 421 0001B9 CD000000r A jsr $_kernel_time_event_dequeue 422 0001BD L485: 423 ;## # C_SRC : ercd = E_OK; 424 0001BD 33FA Z mov.w #0000H,-6[FB] ; ercd 425 ;## # C_SRC : lock_flag = false; 426 0001BF 130000r Z mov.w #0000H,__kernel_lock_flag:16 427 ;## # C_SRC : Asm(" ldipl #0"); 428 ;#### ASM START 429 0001C2 D5E8 ldipl #0 430 ;#### ASM END 431 ;## # C_SRC : } 432 0001C4 L497: 433 ;## # C_SRC : return ercd; 434 0001C4 39FA S mov.w -6[FB],R0 ; ercd * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 008 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 435 0001C6 8E02 popm R1 436 0001C8 FC exitd 437 0001C9 E3: 438 0001C9 M3: 439 440 441 ;## # FUNCTION _kernel_call_cychdr 442 ;## # FRAME AUTO ( ipl) size 2, offset -12 443 ;## # FRAME AUTO ( ipl) size 2, offset -10 444 ;## # FRAME AUTO ( flg_reg) size 2, offset -8 445 ;## # FRAME AUTO ( ipl) size 2, offset -6 446 ;## # FRAME AUTO ( ipl) size 2, offset -10 447 ;## # FRAME AUTO ( ipl) size 2, offset -4 448 ;## # FRAME AUTO ( flg_reg) size 2, offset -2 449 ;## # FRAME ARG ( cycidx) size 4, offset 8 450 ;## # ARG Size(4) Auto Size(12) Context Size(8) 451 452 0001C9 DE .align 453 ;## # C_SRC : { 454 .glb __kernel_call_cychdr 455 0001CA __kernel_call_cychdr: 456 0001CA EC0C enter #0cH 457 0001CC 8F6C pushm R1,R2,A0,A1 458 ;## # C_SRC : cyccb_evttim[cycidx] += cycinib_cyctim[cycidx]; 459 0001CE 7808 S mov.l 8[FB],A0 ; cycidx 460 0001D0 80A102 shlnc.l #2,A0 461 0001D3 7908 S mov.l 8[FB],A1 ; cycidx 462 0001D5 81F2 add.l A1,A1 463 0001D7 B99B000000r mov.w __kernel_cycinib_cyctim[A1],R0 464 0001DC F920 Q mov.w #0H,R2 465 0001DE C5220000r add.l R2R0,__kernel_cyccb_evttim:16[A0] 466 ;## # C_SRC : cyccb_evttim[cycidx] , call_cychdr , cycidx); 467 0001E2 A2C108 push.l 8[FB] ; cycidx 468 0001E5 B65300000000r push.l #__kernel_call_cychdr 469 0001EB 99B308 mov.l 8[FB],R2R0 ; cycidx 470 0001EE 88A102 shlnc.l #2,R2R0 471 0001F1 88B100000000r add.l #(0FFFFFFH & __kernel_cyccb_evttim),R2R0 472 0001F7 C1A3 mov.l R2R0,A0 473 0001F9 A001 push.l [A0] 474 0001FB 3908 S mov.w 8[FB],R0 ; cycidx 475 0001FD CD000000r A jsr $_kernel_time_event_enqueue 476 000201 B6030C S add.l #0cH,SP 477 ;## # C_SRC : lock_flag = false; 478 000204 130000r Z mov.w #0000H,__kernel_lock_flag:16 479 ;## # C_SRC : Asm(" stc flg, $$[FB]", ipl); 480 ;#### ASM START 481 000207 01D3DAF4 stc flg, -12[FB] 482 ;#### ASM END 483 ;## # C_SRC : return ipl; 484 00020B 39F4 S mov.w -12[FB],R0 ; ipl 485 ;## # C_SRC : { 486 00020D 5F0000r S mov.w __kernel_saved_ipl:16,R1 487 000210 89FF0070 and.w #7000H,R1 488 000214 883F8F and.b #8fH,R0H 489 000217 C9B5 or.w R1,R0 490 000219 31F6 S mov.w R0,-10[FB] ; ipl 491 ;## # C_SRC : uint16_t flg_reg = ipl; 492 00021B 93FBF6F8 mov.w -10[FB],-8[FB] ; ipl flg_reg 493 ;## # C_SRC : Asm(" ldc $$[FB], flg", flg_reg); 494 ;#### ASM START 495 00021F 01D3CAF8 ldc -8[FB], flg 496 ;#### ASM END * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 009 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 497 ;## # C_SRC : (*cycinib_cychdr[cycidx])(cycinib_exinf[cycidx]); 498 000223 99B308 mov.l 8[FB],R2R0 ; cycidx 499 000226 88A102 shlnc.l #2,R2R0 500 000229 88B100000000r add.l #(0FFFFFFH & __kernel_cycinib_exinf),R2R0 501 00022F C1A3 mov.l R2R0,A0 502 000231 A001 push.l [A0] 503 000233 7808 S mov.l 8[FB],A0 ; cycidx 504 000235 80A102 shlnc.l #2,A0 505 000238 9601000000r jsri.a __kernel_cycinib_cychdr[A0] 506 00023D 53 Q add.l #04H,SP 507 ;## # C_SRC : return lock_flag; 508 00023E 190000r S mov.w __kernel_lock_flag:16,R0 509 ;## # C_SRC : if (!i_sense_lock()) { 510 000241 9A2A jne L541 511 ;## # C_SRC : Asm(" stc flg, $$[FB]", ipl); 512 ;#### ASM START 513 000243 01D3DAFA stc flg, -6[FB] 514 ;#### ASM END 515 ;## # C_SRC : return ipl; 516 000247 39FA S mov.w -6[FB],R0 ; ipl 517 ;## # C_SRC : ipl = get_flgreg(); 518 000249 31F6 S mov.w R0,-10[FB] ; ipl 519 ;## # C_SRC : if (IPL_LOCK > ipl) { 520 00024B 77F60050 S cmp.w #5000H,-10[FB] ; ipl 521 00024F CA13 jgeu L533 522 ;## # C_SRC : { 523 000251 39F6 S mov.w -10[FB],R0 ; ipl 524 000253 883F8F and.b #8fH,R0H 525 000256 882F50 or.b #50H,R0H 526 000259 31FC S mov.w R0,-4[FB] ; ipl 527 ;## # C_SRC : uint16_t flg_reg = ipl; 528 00025B 93FBFCFE mov.w -4[FB],-2[FB] ; ipl flg_reg 529 ;## # C_SRC : Asm(" ldc $$[FB], flg", flg_reg); 530 ;#### ASM START 531 00025F 01D3CAFE ldc -2[FB], flg 532 ;#### ASM END 533 000263 L533: 534 ;## # C_SRC : saved_ipl = ipl; 535 000263 97FBF60000r mov.w -10[FB],__kernel_saved_ipl:16 ; ipl 536 ;## # C_SRC : lock_flag = true; 537 000268 F7E10000r Q mov.w #0001H,__kernel_lock_flag:16 538 00026C L541: 539 ;## # C_SRC : } 540 00026C 8E36 popm R1,R2,A0,A1 541 00026E FC exitd 542 00026F E4: 543 00026F M4: 544 545 .glb $act_tsk 546 .glb $iact_tsk 547 .glb $psnd_dtq 548 .glb $ipsnd_dtq 549 .glb $prcv_dtq 550 .glb $set_flg 551 .glb $iset_flg 552 .glb $clr_flg 553 .glb $pol_flg 554 .glb _loc_cpu 555 .glb _iloc_cpu 556 .glb _unl_cpu 557 .glb _iunl_cpu 558 .glb _dis_dsp * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 010 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 559 .glb _ena_dsp 560 .glb _sns_ctx 561 .glb _sns_loc 562 .glb _sns_dsp 563 .glb _sns_dpn 564 .glb _sns_ker 565 .glb _ext_ker 566 .glb $dis_int 567 .glb $ena_int 568 .glb $sta_alm 569 .glb $stp_alm 570 .glb _get_tim 571 .glb $syslog_wri_log 572 .glb _syslog_printf 573 .glb _syslog_print 574 .glb $syslog_lostmsg 575 .glb _syslog 576 .glb _sil_dly_nse 577 .glb $target_fput_log 578 .glb _sio_initialize 579 .glb $sio_opn_por 580 .glb _sio_cls_por 581 .glb _sio_isr_rcv 582 .glb _sio_isr_snd 583 .glb _sio_snd_chr 584 .glb _sio_rcv_chr 585 .glb _sio_ena_cbr 586 .glb _sio_dis_cbr 587 .glb _sio_irdy_snd 588 .glb _sio_irdy_rcv 589 .glb $sio_pol_snd_chr 590 .glb __kernel_target_initialize 591 .glb __kernel_target_exit 592 .glb __kernel_intnest 593 .glb __kernel_lock_flag 594 .glb __kernel_saved_ipl 595 .glb __kernel_intc_reg 596 .glb __kernel_intpri_table 597 .glb $_kernel_x_config_int 598 .glb __kernel_prc_initialize 599 .glb __kernel_start_dispatch 600 .glb __kernel_call_exit_kernel 601 .glb __kernel_prc_terminate 602 .glb __kernel_initialize_object 603 .glb __kernel_call_inirtn 604 .glb __kernel_call_terrtn 605 .glb _istksz 606 .glb _istk 607 .glb __kernel_kerflg 608 .glb _sta_ker 609 .glb __kernel_exit_kernel 610 .glb __kernel_tnum_tmevt_queue 611 .glb __kernel_tmevt_queue 612 .glb __kernel_tmevt_time 613 .glb __kernel_tmevt_callback 614 .glb __kernel_tmevt_arg 615 .glb __kernel_current_time 616 .glb __kernel_initialize_time_event 617 .glb $_kernel_time_event_enqueue 618 .glb $_kernel_time_event_dequeue 619 .glb __kernel_signal_time 620 .glb __kernel_tmax_cycid * M32C SERIES ASSEMBLER * SOURCE LIST Fri Jun 27 17:36:29 2014 PAGE 011 SEQ. LOC. OBJ. 0XMSDA .*....*....SOURCE STATEMENT....8....*....9....*....0....*....1....*....2....*....3....*....4....*....5....*....6....*....7....*....8....*....9....*....0 621 .glb __kernel_cycinib_cycact 622 .glb __kernel_cycinib_cychdr 623 .glb __kernel_cycinib_cyctim 624 .glb __kernel_cycinib_cycphs 625 .glb __kernel_cycinib_exinf 626 .glb __kernel_cyccb_cycact 627 .glb __kernel_cyccb_evttim 628 .glb __kernel_cycevtid_offset 629 ;################################# 630 ;### STATIC DATA INFORMATION ### 631 ;################################# 632 ;################################# 633 ;################################# 634 ;################################# 635 636 .END Information List TOTAL ERROR(S) 00000 TOTAL WARNING(S) 00000 TOTAL LINE(S) 00636 LINES Section List Attr Size Name CODE 00000623(00026FH) program