u8i$( dh ',Qualcomm Technologies, Inc. SM8450 QRD2qcom,sm8450-qrdqcom,sm8450=handsetchosenJserial0:115200n8clocksxo-board 2fixed-clockVcssleep-clk 2fixed-clockVc}s+cpus cpu@0{cpu 2qcom,kryo780pscipscisl2-cache2cachesl3-cache2cachescpu@100{cpu 2qcom,kryo780pscipscisl2-cache2cachescpu@200{cpu 2qcom,kryo780psci pscisl2-cache2cachescpu@300{cpu 2qcom,kryo780psci  pscisl2-cache2caches cpu@400{cpu 2qcom,kryo780psci  pscisl2-cache2caches cpu@500{cpu 2qcom,kryo780pscipscisl2-cache2cachescpu@600{cpu 2qcom,kryo780pscipscisl2-cache2cachescpu@700{cpu 2qcom,kryo780pscipscisl2-cache2cachescpu-mapcluster0core0 core1 core2 core3 core4 core5 core6 core7 idle-statespscicpu-sleep-0-02arm,idle-statesilver-rail-power-collapse-@D Uevs!cpu-sleep-1-02arm,idle-stategold-rail-power-collapse-@DXUevs"domain-idle-statescluster-sleep-02domain-idle-state-ADDU es#cluster-sleep-12domain-idle-state-ADD U e6s$firmwarescm2qcom,scm-sm8450qcom,scm0interconnect-02qcom,sm8450-clk-virts3interconnect-12qcom,sm8450-mc-virtsmemory@a0000000{memorypmu2arm,armv8-pmuv3 psci 2arm,psci-1.0smcpower-domain-cpu0 !spower-domain-cpu1 !spower-domain-cpu2 !s power-domain-cpu3 !s power-domain-cpu4 "s power-domain-cpu5 "spower-domain-cpu6 "spower-domain-cpu7 "spower-domain-cpu-cluster0#$s opp-table-qup2operating-points-v2sRopp-50000000%opp-75000000xh&opp-100000000'reserved-memory memory@80000000`$memory@80600000`$memory@80640000d$memory@807c0000|$memory@80800000$memory@80860000 2qcom,cmd-db$memory@80880000$memory@808a0000$memory@808e0000@$memory@808e4000@$memory@80900000 2qcom,smem +($memory@80b00000$memory@80c00000`$memory@85700000pp$memory@85e00000$smemory@88000000$smemory@89900000$smemory@8b900000$memory@8b910000$memory@8b91a000 $memory@8ba00000$memory@8bb80000$memory@8bbe0000$memory@8bc00000 $smemory@9ee00000p$memory@9f500000P$memory@9fd000002qcom,rmtfs-mem($3Bmemory@a6e00000$memory@a6f00000$memory@bb000000$memory@c0000000 $memory@e0000000`$memory@e0600000`@$memory@e0a00000$memory@e0b000000$memory@e55f3000_0$memory@e55fc000_@$memory@e5600000`$memory@e8800000$memory@e8900000 $memory@e9b00000P$memory@ea000000$memory@ed900000$smp2p-adsp 2qcom,smp2pLV) j)qmaster-kernelmaster-kernelsslave-kernel slave-kernelssmp2p-cdsp 2qcom,smp2pL^V) j)qmaster-kernelmaster-kernelsslave-kernel slave-kernelssmp2p-modem 2qcom,smp2pLV) j)qmaster-kernelmaster-kernelsslave-kernel slave-kernelsipa-ap-to-modemipaipa-modem-to-apipasmp2p-slpi 2qcom,smp2pLV) j)qmaster-kernelmaster-kernelsslave-kernel slave-kernelssoc@0  2simple-busclock-controller@1000002qcom,gcc-sm8450BV8*+,-.../bi_tcxosleep_clkpcie_0_pipe_clkpcie_1_pipe_clkpcie_1_phy_aux_clkufs_phy_rx_symbol_0_clkufs_phy_rx_symbol_1_clkufs_phy_tx_symbol_0_clkusb3_phy_wrapper_gcc_usb30_pipe_clks1dma-controller@800000(2qcom,sm8450-gpi-dmaqcom,sm6350-gpi-dmaLMNOPQRSTUVW  ~ 0 $disableds6geniqup@8c00002qcom,geni-se-qup  m-ahbs-ahb11 0 $okayi2c@8800002qcom,geni-i2c@se1x+default92 u H3345 Cqup-corequp-configqup-memory V66[txrx $disabledspi@8800002qcom,geni-spi@se1x u+default97803345 Cqup-corequp-config V66[txrx  $disabledi2c@8840002qcom,geni-i2c@@se1z+default99 G H3345 Cqup-corequp-configqup-memory V66[txrx $disabledspi@8840002qcom,geni-spi@@se1z G+default9:;03345 Cqup-corequp-config V66[txrx  $disabledi2c@8880002qcom,geni-i2c@se1|+default9< H H3345 Cqup-corequp-configqup-memory V66[txrx $disabledspi@8880002qcom,geni-spi@se1| H+default9=>03345 Cqup-corequp-config V66[txrx  $disabledi2c@88c0002qcom,geni-i2c@se1~+default9? I H3345 Cqup-corequp-configqup-memory V66[txrx $disabledspi@88c0002qcom,geni-spi@se1~ I+default9@A03345 Cqup-corequp-config V66[txrx $okayi2c@8900002qcom,geni-i2c@se1+default9B J H3345 Cqup-corequp-configqup-memory V66[txrx $disabledspi@8900002qcom,geni-spi@se1 J+default9CD03345 Cqup-corequp-config V66[txrx $okayi2c@8940002qcom,geni-i2c@@se1+default9E K H3345 Cqup-corequp-configqup-memory V66[txrx $disabledserial@8940002qcom,geni-uart@@se1+default9F K0335GCqup-corequp-config $disabledspi@8940002qcom,geni-spi@@se1 K+default9HI03345 Cqup-corequp-config V66[txrx  $disabledi2c@8980002qcom,geni-i2c@se1+default9J C H3345 Cqup-corequp-configqup-memory V66[txrx $disabledspi@8980002qcom,geni-spi@se1 C+default9KL03345 Cqup-corequp-config V66[txrx  $disableddma-controller@900000(2qcom,sm8450-gpi-dmaqcom,sm6350-gpi-dma  ~ 0$okaysNgeniqup@9c00002qcom,geni-se-qup  m-ahbs-ahb11 033 Cqup-core $okayi2c@9800002qcom,geni-i2c@se1V+default9M Y H3345 Cqup-corequp-configqup-memory VNN[txrx $disabledspi@9800002qcom,geni-spi@se1V Y+default9OPQeRH3345 Cqup-corequp-configqup-memory VNN[txrx  $disabledi2c@9840002qcom,geni-i2c@@se1X+default9S Z H3345 Cqup-corequp-configqup-memory VNN[txrx $disabledspi@9840002qcom,geni-spi@@se1X Z+default9TUH3345 Cqup-corequp-configqup-memory VNN[txrx  $disabledi2c@9880002qcom,geni-i2c@se1Z+default9V [ H3345 Cqup-corequp-configqup-memory VNN[txrx $disabledspi@9880002qcom,geni-spi@se1Z [+default9WXH3345 Cqup-corequp-configqup-memory VNN[txrx  $disabledi2c@98c0002qcom,geni-i2c@se1\+default9Y \ H3345 Cqup-corequp-configqup-memory VNN[txrx $disabledspi@98c0002qcom,geni-spi@se1\ \+default9Z[H3345 Cqup-corequp-configqup-memory VNN[txrx  $disabledi2c@9900002qcom,geni-i2c@se1^+default9\ ] H3345 Cqup-corequp-configqup-memory VNN[txrx $disabledspi@9900002qcom,geni-spi@se1^ ]+default9]^QeRH3345 Cqup-corequp-configqup-memory VNN[txrx $okayi2c@9940002qcom,geni-i2c@@se1`+default9_ ^ H3345 Cqup-corequp-configqup-memory VNN[txrx$okayspi@9940002qcom,geni-spi@@se1` ^+default9`aH3345 Cqup-corequp-configqup-memory VNN[txrx  $disabledi2c@9980002qcom,geni-i2c@se1b+default9b _ H3345 Cqup-corequp-configqup-memory VNN[txrx $disabledspi@9980002qcom,geni-spi@se1b _+default9cdH3345 Cqup-corequp-configqup-memory VNN[txrx  $disabledserial@99c0002qcom,geni-debug-uart@se1d+default9ef `0335GCqup-corequp-config$okaydma-controller@a00000(2qcom,sm8450-gpi-dmaqcom,sm6350-gpi-dma%&'()*  ~ 0V $disabledshgeniqup@ac00002qcom,geni-se-qup` m-ahbs-ahb11 0C33 Cqup-core  $disabledi2c@a800002qcom,geni-i2c@se1h+default9g a H3345 Cqup-corequp-configqup-memory Vhh[txrx $disabledspi@a800002qcom,geni-spi@se1h a+default9ijH3345 Cqup-corequp-configqup-memory Vhh[txrx  $disabledi2c@a840002qcom,geni-i2c@@se1j+default9k b H3345 Cqup-corequp-configqup-memory Vhh[txrx $disabledspi@a840002qcom,geni-spi@@se1j b+default9lmH3345 Cqup-corequp-configqup-memory Vhh[txrx  $disabledi2c@a880002qcom,geni-i2c@se1l+default9n c H3345 Cqup-corequp-configqup-memory Vhh[txrx $disabledspi@a880002qcom,geni-spi@se1l c+default9opH3345 Cqup-corequp-configqup-memory Vhh[txrx  $disabledi2c@a8c0002qcom,geni-i2c@se1n+default9q d H3345 Cqup-corequp-configqup-memory Vhh[txrx $disabledspi@a8c0002qcom,geni-spi@se1n d+default9rsH3345 Cqup-corequp-configqup-memory Vhh[txrx  $disabledi2c@a900002qcom,geni-i2c@se1p+default9t e H3345 Cqup-corequp-configqup-memory Vhh[txrx $disabledspi@a900002qcom,geni-spi@se1p e+default9uvH3345 Cqup-corequp-configqup-memory Vhh[txrx  $disabledi2c@a940002qcom,geni-i2c@@se1r+default9w fH3345 Cqup-corequp-configqup-memory Vhh[txrx  $disabledspi@a940002qcom,geni-spi@@se1r f+default9xyH3345 Cqup-corequp-configqup-memory Vhh[txrx  $disabledi2c@a980002qcom,geni-i2c@se1t+default9z kH3345 Cqup-corequp-configqup-memory Vhh[txrx  $disabledspi@a980002qcom,geni-spi@se1t k+default9{|H3345 Cqup-corequp-configqup-memory Vhh[txrx  $disabledrng@10c3000!2qcom,sm8450-prng-eeqcom,prng-ee 0pci@1c000002qcom,pcie-sm8450-pcie0P0`` ``yparfdbielbiatuconfig{pci 8` `0`0 }Y}Y msi\1617,*1/11131819111 ]pipepipe_muxphy_piperefauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbuaggre0aggre1 001pci1 ,pciephy ~^ &~`+default9$okayphy@1c06000 2qcom,sm8450-qmp-gen3x1-pcie-phy`  1/111214auxcfg_ahbrefrefgen1phy114A$okayVfphy@1c06200@npbf16pipe0Vvpcie_0_pipe_clks,pci@1c080002qcom,pcie-sm8450-pcie1P0@@ @@yparfdbielbiatuconfig{pci 8@ @0@0 }Z}Z 3msiT1C1D-*1:1<1>1E1F11 Vpipepipe_muxphy_piperefauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbuaggre1 001 pci1 -pciephy ~a &~c+default9 $disabledphy@1c0f000 2qcom,sm8450-qmp-gen4x2-pcie-phy  1?1<1=1Aauxcfg_ahbrefrefgen1 phy11AA $disabledphy@1c0e000` 1Cpipe0Vvpcie_1_pipe_clks-interconnect@15000002qcom,sm8450-config-nocPsGinterconnect@16800002qcom,sm8450-system-nochs4interconnect@16c00002qcom,sm8450-pcie-anoclinterconnect@16e00002qcom,sm8450-aggre1-nocn1 1 sinterconnect@17000002qcom,sm8450-aggre2-nocp 11 1 * sinterconnect@17400002qcom,sm8450-mmss-noctshwlock@1f400002qcom,tcsr-mutexs(syscon@1fc00002qcom,sm8450-tcsrsysconsphy@88e300002qcom,sm8450-usb-hs-phyqcom,usb-snps-hs-7nm-phy0$okayv*ref1fsphy@88e80002qcom,sm8450-qmp-usb3-dp-phy0 1*11auxrefcom_auxusb3_pipe11 phycommonVv$okayVfs/ports port@0endpointport@1endpointport@2endpointremoteproc@24000002qcom,sm8450-slpi-pas@@<V #wdogfatalreadyhandoverstop-ack*xoQQlcxlmxstop$okayqcom/sm8450/slpi.mbnglink-edgeV) j) slpifastrpc 2qcom,fastrpcfastrpcglink-apps-dsp sdsp compute-cb@12qcom,fastrpc-compute-cb 0Acompute-cb@22qcom,fastrpc-compute-cb 0Bcompute-cb@32qcom,fastrpc-compute-cb 0Ccodec@31e00002qcom,sm8450-lpass-wsa-macro4DEfgmclknplmacrodcodecfsgen1DEA$$V wsa2-mclk+default9$ssoundwire@31f00002qcom,soundwire-v1.7.0  iface WSA25DT??m    $ $disabledcodec@32000002qcom,sm8450-lpass-rx-macro 4@Ffgmclknplmacrodcodecfsgen1@FA$$Vmclk+default9$ssoundwire@32100002qcom,soundwire-v1.7.0!  iface RX5DTm   $ $disabledcodec@32200002qcom,sm8450-lpass-tx-macro"4@Ffgmclknplmacrodcodecfsgen1@FA$$Vmclk+default9$scodec@32400002qcom,sm8450-lpass-wsa-macro$4BCfgmclknplmacrodcodecfsgen1BCA$$Vmclk+default9$ssoundwire@32500002qcom,soundwire-v1.7.0%  iface WSA5DT??m    $ $disabledsoundwire@33b00002qcom,soundwire-v1.7.0;  corewakeupiface TX5DTm $ $disabledcodec@33f00002qcom,sm8450-lpass-va-macro?09fgFmclkmacrodcodecnpl 19A$Vfsgen$ $disabledsremoteproc@300000002qcom,sm8450-adsp-pas0<V#wdogfatalreadyhandoverstop-ack*xoQQlcxlmxstop$okayqcom/sm8450/adsp.mbnglink-edgeV) j) lpassgpr 2qcom,gpr adsp_apps) service@1 2qcom,q6apm$6avs/audiomsm/adsp/audio_pddais2qcom,q6apm-dais 0bedais2qcom,q6apm-lpass-dais$service@2 2qcom,q6prm6avs/audiomsm/adsp/audio_pdclock-controller2qcom,q6prm-lpass-clocksVsfastrpc 2qcom,fastrpcfastrpcglink-apps-dsp adsp compute-cb@32qcom,fastrpc-compute-cb 0compute-cb@42qcom,fastrpc-compute-cb 0compute-cb@52qcom,fastrpc-compute-cb 0remoteproc@323000002qcom,sm8450-cdsp-pas20@@VB#wdogfatalreadyhandoverstop-ack*xoQQ cxmxcstop$okayqcom/sm8450/cdsp.mbnglink-edgeV) j) cdspfastrpc 2qcom,fastrpcfastrpcglink-apps-dsp cdsp compute-cb@12qcom,fastrpc-compute-cb0!a0! compute-cb@22qcom,fastrpc-compute-cb0!b0" compute-cb@32qcom,fastrpc-compute-cb0!c0# compute-cb@42qcom,fastrpc-compute-cb0!d0$ compute-cb@52qcom,fastrpc-compute-cb0!e0% compute-cb@62qcom,fastrpc-compute-cb0!f0& compute-cb@72qcom,fastrpc-compute-cb0!g0' compute-cb@82qcom,fastrpc-compute-cb0!h0( remoteproc@40800002qcom,sm8450-mpss-pas@@LV0wdogfatalreadyhandoverstop-ackshutdown-ack*xoQQ cxmssstop$okayqcom/sm8450/modem.mbnglink-edgeV) j) modemclock-controller@aaf00002qcom,sm8450-videocc *1Q&Vcci@ac15000!2qcom,sm8450-cciqcom,msm8996-cci P ({ -camnoc_axislow_ahb_srccpas_ahbccicci_src9M+defaultsleep $disabled i2c-bus@0cB@ i2c-bus@1cB@ cci@ac16000!2qcom,sm8450-cciqcom,msm8996-cci ` ({ -camnoc_axislow_ahb_srccpas_ahbccicci_src9M+defaultsleep $disabled i2c-bus@0cB@ i2c-bus@1cB@ clock-controller@ade00002qcom,sm8450-camcc 1**+Q&V $disabledsdisplay-subsystem@ae000002qcom,sm8450-mdss ymdssH5GCmdp0-memmdp1-memcpu-cfg 11< S 0(  $disabledsdisplay-controller@ae010002qcom,sm8450-dpu   ymdpvbif011?<K!busnrt_busifacelutcorevsync1KA$eQports port@0endpointWsport@1endpointWsport@2endpointWsopp-table2operating-points-v2sopp-172000000 @opp-200000000 &opp-325000000_@'opp-375000000Z opp-500000000edisplayport-controller@ae900002qcom,sm8450-dpqcom,sm8350-dpP      ( ;core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixel1g// /dp$eQ $disabledports port@0endpointWsopp-table2operating-points-v2sopp-160000000 h&opp-270000000߀'opp-540000000 /opp-8100000000Gdsi@ae94000(2qcom,sm8450-dsi-ctrlqcom,mdss-dsi-ctrl @ ydsi_ctrl0A71$bytebyte_intfpixelcoreifacebus1BgeQ dsi  $disabledports port@0endpointWsport@1endpointopp-table2operating-points-v2sopp-187500000 -&opp-300000000'opp-358000000Vphy@ae944002qcom,sm8450-dsi-phy-5nm0 D F I`ydsi_phydsi_phy_lanedsi_pllVv* ifaceref $disabledsdsi@ae96000(2qcom,sm8450-dsi-ctrlqcom,mdss-dsi-ctrl ` ydsi_ctrl0 C91$bytebyte_intfpixelcoreifacebus1DgeQ dsi  $disabledports port@0endpointWsport@1endpointphy@ae964002qcom,sm8450-dsi-phy-5nm0 d f i`ydsi_phydsi_phy_lanedsi_pllVv* ifaceref $disabledsclock-controller@af000002qcom,sm8450-dispcc d**1+//Q&V $disabledsinterrupt-controller@b2200002qcom,sm8450-pdcqcom,pdc "@dH~ (6^a}?~ sthermal-sensor@c263000 2qcom,sm8450-tsensqcom,tsens-v2 &0 " uplowcriticalsthermal-sensor@c265000 2qcom,sm8450-tsensqcom,tsens-v2 &P "0uplowcriticalspower-management@c300000#2qcom,sm8450-aoss-qmpqcom,aoss-qmp 0V) j)Vssram@c3f00002qcom,rpmh-stats ?spmi@c4000002qcom,spmi-pmic-arbP @0 P@ D L Bycorechnlsobsrvrintrcnfg periph_irq V pmic@12qcom,pm8350qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm  sgpio@8800 2qcom,pm8350-gpioqcom,spmi-gpio spmic@32qcom,pm8350bqcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm  sgpio@8800!2qcom,pm8350b-gpioqcom,spmi-gpiospmic@22qcom,pm8350cqcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm  sgpio@8800!2qcom,pm8350c-gpioqcom,spmi-gpio spwm2qcom,pm8350c-pwm $disabledpmic@72qcom,pm8450qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm  sgpio@8800 2qcom,pm8450-gpioqcom,spmi-gpiospmic@02qcom,pmk8350qcom,spmi-pmic pon@13002qcom,pmk8350-pon yhlospbspwrkey2qcom,pmk8350-pwrkeyt $disabledresin2qcom,pmk8350-resin $disabledadc@31002qcom,spmi-adc71 1adc-tm@34002qcom,spmi-adc-tm5-gen244  $disabledrtc@61002qcom,pmk8350-rtcab yrtcalarmb $disablednvram@71002qcom,spmi-sdamq  qreboot-reason@48Hsgpio@b000!2qcom,pmk8350-gpioqcom,spmi-gpiospmic@42qcom,pmr735aqcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm  sgpio@8800!2qcom,pmr735a-gpioqcom,spmi-gpiospmic@52qcom,pmr735bqcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm  sgpio@8800!2qcom,pmr735b-gpioqcom,spmi-gpiosmailbox@ed180002qcom,sm8450-ipccqcom,ipccр s)pinctrl@f1000002qcom,sm8450-tlmm0 ~(6$s~sdc2-default-statesclk-pins Ksdc2_clkP_cmd-pins Ksdc2_cmdPldata-pins Ksdc2_dataPlsdc2-sleep-statesclk-pins Ksdc2_clkP_cmd-pins Ksdc2_cmdPldata-pins Ksdc2_dataPlcci0-default-stateKgpio110gpio111ycci_i2cPlscci0-sleep-stateKgpio110gpio111ycci_i2cPscci1-default-stateKgpio112gpio113ycci_i2cPlscci1-sleep-stateKgpio112gpio113ycci_i2cPscci2-default-stateKgpio114gpio115ycci_i2cPlscci2-sleep-stateKgpio114gpio115ycci_i2cPscci3-default-stateKgpio208gpio209ycci_i2cPlscci3-sleep-stateKgpio208gpio209ycci_i2cPspcie0-default-statesperst-pinsKgpio94ygpioPclkreq-pinsKgpio95ypcie0_clkreqnPlwake-pinsKgpio96ygpioPlpcie1-default-statesperst-pinsKgpio97ygpioPclkreq-pinsKgpio98ypcie1_clkreqnPlwake-pinsKgpio99ygpioPlqup-i2c0-data-clk-state Kgpio0gpio1yqup0sMqup-i2c1-data-clk-state Kgpio4gpio5yqup1sSqup-i2c2-data-clk-state Kgpio8gpio9yqup2sVqup-i2c3-data-clk-stateKgpio12gpio13yqup3sYqup-i2c4-data-clk-stateKgpio16gpio17yqup4s\qup-i2c5-data-clk-stateKgpio206gpio207yqup5s_qup-i2c6-data-clk-stateKgpio20gpio21yqup6sbqup-i2c8-data-clk-stateKgpio28gpio29yqup8sgqup-i2c9-data-clk-stateKgpio32gpio33yqup9skqup-i2c10-data-clk-stateKgpio36gpio37yqup10snqup-i2c11-data-clk-stateKgpio40gpio41yqup11sqqup-i2c12-data-clk-stateKgpio44gpio45yqup12stqup-i2c13-data-clk-stateKgpio48gpio49yqup13Plswqup-i2c14-data-clk-stateKgpio52gpio53yqup14Plszqup-i2c15-data-clk-stateKgpio56gpio57yqup15s2qup-i2c16-data-clk-stateKgpio60gpio61yqup16s9qup-i2c17-data-clk-stateKgpio64gpio65yqup17s<qup-i2c18-data-clk-stateKgpio68gpio69yqup18s?qup-i2c19-data-clk-stateKgpio72gpio73yqup19sBqup-i2c20-data-clk-stateKgpio76gpio77yqup20sEqup-i2c21-data-clk-stateKgpio80gpio81yqup21sJqup-spi0-cs-stateKgpio3yqup0sPqup-spi0-data-clk-stateKgpio0gpio1gpio2yqup0sOqup-spi1-cs-stateKgpio7yqup1sUqup-spi1-data-clk-stateKgpio4gpio5gpio6yqup1sTqup-spi2-cs-stateKgpio11yqup2sXqup-spi2-data-clk-stateKgpio8gpio9gpio10yqup2sWqup-spi3-cs-stateKgpio15yqup3s[qup-spi3-data-clk-stateKgpio12gpio13gpio14yqup3sZqup-spi4-cs-stateKgpio19yqup4P_s^qup-spi4-data-clk-stateKgpio16gpio17gpio18yqup4s]qup-spi5-cs-stateKgpio85yqup5saqup-spi5-data-clk-stateKgpio206gpio207gpio84yqup5s`qup-spi6-cs-stateKgpio23yqup6sdqup-spi6-data-clk-stateKgpio20gpio21gpio22yqup6scqup-spi8-cs-stateKgpio31yqup8sjqup-spi8-data-clk-stateKgpio28gpio29gpio30yqup8siqup-spi9-cs-stateKgpio35yqup9smqup-spi9-data-clk-stateKgpio32gpio33gpio34yqup9slqup-spi10-cs-stateKgpio39yqup10spqup-spi10-data-clk-stateKgpio36gpio37gpio38yqup10soqup-spi11-cs-stateKgpio43yqup11ssqup-spi11-data-clk-stateKgpio40gpio41gpio42yqup11srqup-spi12-cs-stateKgpio47yqup12svqup-spi12-data-clk-stateKgpio44gpio45gpio46yqup12suqup-spi13-cs-stateKgpio51yqup13syqup-spi13-data-clk-stateKgpio48gpio49gpio50yqup13sxqup-spi14-cs-stateKgpio55yqup14s|qup-spi14-data-clk-stateKgpio52gpio53gpio54yqup14s{qup-spi15-cs-stateKgpio59yqup15s8qup-spi15-data-clk-stateKgpio56gpio57gpio58yqup15s7qup-spi16-cs-stateKgpio63yqup16s;qup-spi16-data-clk-stateKgpio60gpio61gpio62yqup16s:qup-spi17-cs-stateKgpio67yqup17s>qup-spi17-data-clk-stateKgpio64gpio65gpio66yqup17s=qup-spi18-cs-stateKgpio71yqup18P_sAqup-spi18-data-clk-stateKgpio68gpio69gpio70yqup18P_s@qup-spi19-cs-stateKgpio75yqup19P_sDqup-spi19-data-clk-stateKgpio72gpio73gpio74yqup19P_sCqup-spi20-cs-stateKgpio79yqup20sIqup-spi20-data-clk-stateKgpio76gpio77gpio78yqup20sHqup-spi21-cs-stateKgpio83yqup21sLqup-spi21-data-clk-stateKgpio80gpio81gpio82yqup21sKqup-uart7-rx-stateKgpio26yqup7P_sfqup-uart7-tx-stateKgpio27yqup7P_sequp-uart20-default-stateKgpio76gpio77gpio78gpio79yqup20sFsd-card-det-n-stateKgpio92ygpioPlspinctrl@34400002qcom,sm8450-lpass-lpi-pinctrl DMfg coreaudiostx-swr-active-statesclk-pinsKgpio0 yswr_tx_clkP_data-pinsKgpio1gpio2gpio14 yswr_tx_dataPrx-swr-active-statesclk-pinsKgpio3 yswr_rx_clkP_data-pins Kgpio4gpio5 yswr_rx_dataPdmic01-default-stateclk-pinsKgpio6 ydmic1_clkPdata-pinsKgpio7 ydmic1_dataPdmic02-default-stateclk-pinsKgpio8 ydmic2_clkPdata-pinsKgpio9 ydmic2_dataPwsa-swr-active-statesclk-pinsKgpio10 ywsa_swr_clkP_data-pinsKgpio11 ywsa_swr_dataPwsa2-swr-active-statesclk-pinsKgpio15 ywsa2_swr_clkP_data-pinsKgpio16ywsa2_swr_dataPsram@146aa000#2qcom,sm8450-imemsysconsimple-mfdjj pil-reloc@94c2qcom,pil-reloc-info Liommu@15000000!2qcom,sm8450-smmu-500arm,mmu-500Aabcdefghijklmnopqrstuv;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYs0interrupt-controller@17100000 2arm,gic-v3     smsi-controller@171400002arm,gic-v3-itss}timer@174200002arm,armv7-timer-mem  Bc$frame@17421000BB frame@17423000  B0 $disabledframe@17425000  BP $disabledframe@17427000  Bp $disabledframe@17429000  B $disabledframe@1742b000  B $disabledframe@1742d000 B $disabledrsc@17a00000  apps_rsc2qcom,rpmh-rsc@ydrv-0drv-1drv-2drv-3$( 8 D bcm-voter2qcom,bcm-votersclock-controller2qcom,sm8450-rpmh-clkVxos*power-controller2qcom,sm8450-rpmhpdesQopp-table2operating-points-v2sopp1Topp2T0s%opp3T8sopp4T@s&opp5TPopp6Ts'opp7Topp8Tsopp9Topp10Tsopp11T@opp12TPopp13Topp14Tregulators-02qcom,pm8350-rpmh-regulators^bky   ' 8 I ^smps10 lvreg_s10b_1p8 {w@ w@smps11 lvreg_s11b_0p95 {  ؀ssmps12 lvreg_s12b_1p25 {@ \sldo1 lvreg_l1b_0p91 {    sldo2 lvreg_l2b_3p07 {. . sldo3 lvreg_l3b_0p9 { @ @ ldo5 lvreg_l5b_0p88 { m  sldo6 lvreg_l6b_1p2 {O O sldo7 lvreg_l7b_2p5 {&5@ &5@ sldo9 lvreg_l9b_1p2 {O O sregulators-12qcom,pm8350c-rpmh-regulators^cky     smps1 lvreg_s1c_1p86 {w@ @ssmps10 lvreg_s10c_1p05 {B@ bob lvreg_bob {-  Rs interrupt-parent#address-cells#size-cellsmodelcompatiblechassis-typestdout-path#clock-cellsclock-frequencyphandledevice_typeregenable-methodnext-level-cachepower-domainspower-domain-namesqcom,freq-domain#cooling-cellsclockscache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopqcom,dload-modeinterconnects#reset-cells#interconnect-cellsqcom,bcm-votersinterrupts#power-domain-cellsdomain-idle-statesopp-hzrequired-oppsrangesno-maphwlocksqcom,client-idqcom,vmidqcom,smeminterrupts-extendedmboxesqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsdma-rangesclock-names#dma-cellsdma-channelsdma-channel-maskiommusstatuspinctrl-namespinctrl-0interconnect-namesdmasdma-namesoperating-points-v2reg-nameslinux,pci-domainbus-rangenum-lanesmsi-mapmsi-map-maskinterrupt-namesinterrupt-map-maskinterrupt-mapiommu-mapresetsreset-namesphysphy-namesperst-gpioswake-gpiosassigned-clocksassigned-clock-ratesvdda-phy-supplyvdda-pll-supply#phy-cellsclock-output-names#hwlock-cellsvdda18-supplyvdda33-supplymemory-regionqcom,qmpqcom,smem-statesqcom,smem-state-namesfirmware-namelabelqcom,glink-channels#sound-dai-cellsqcom,din-portsqcom,dout-portsqcom,ports-sinterval-lowqcom,ports-offset1qcom,ports-offset2qcom,ports-hstartqcom,ports-hstopqcom,ports-word-lengthqcom,ports-block-pack-modeqcom,ports-block-group-countqcom,ports-lane-controlqcom,domainqcom,intentsqcom,protection-domainpinctrl-1remote-endpointassigned-clock-parentsqcom,pdc-ranges#qcom,sensors#thermal-sensor-cellsqcom,eeqcom,channelgpio-controllergpio-ranges#gpio-cells#pwm-cellslinux,code#io-channel-cellsbits#mbox-cellswakeup-parentgpio-reserved-rangespinsdrive-strengthbias-disablebias-pull-upfunctionbias-pull-downslew-ratebias-bus-holdoutput-high#iommu-cells#global-interrupts#redistributor-regionsredistributor-stridemsi-controller#msi-cellsframe-numberqcom,tcs-offsetqcom,drv-idqcom,tcs-configopp-levelqcom,pmic-idvdd-s1-supplyvdd-s2-supplyvdd-s3-supplyvdd-s4-supplyvdd-s5-supplyvdd-s6-supplyvdd-s7-supplyvdd-s8-supplyvdd-s9-supplyvdd-s10-supplyvdd-s11-supplyvdd-s12-supplyvdd-l1-l4-supplyvdd-l2-l7-supplyvdd-l3-l5-supplyvdd-l6-l9-l10-supplyvdd-l8-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-initial-modevdd-l1-l12-supplyvdd-l2-l8-supplyvdd-l3-l4-l5-l7-l13-supplyvdd-l6-l9-l11-supplyvdd-bob-supplyvdd-l2-supplyvdd-l3-supplyvdd-l4-supplyvdd-l1-l2-supplyvdd-l5-l6-supplyvdd-l7-bob-supply#freq-domain-cellslanes-per-directiondma-coherentfreq-table-hzqcom,icereset-gpiosvcc-supplyvcc-max-microampvccq-supplyvccq-max-microampqcom,controlled-remotelybus-widthsdhci-caps-maskcd-gpiosvmmc-supplyvqmmc-supplyno-sdiono-mmcsnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirkdr_modepolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisnvmem-cellsnvmem-cell-namesmode-recoverymode-bootloaderserial0regulator-always-onregulator-boot-on