8\( $$,+8Qualcomm Technologies, Inc. MSM8998 v1 MTP>qcom,msm8998-mtpqcom,msm8998IhandsetVchosendserial0:115200n8memory@80000000pmemory|reserved-memory,memory@85800000|`memory@85e00000|smem-mem@86000000| memory@86200000| memory@88f00000>qcom,rmtfs-mem| memory@8ab00000|pmemory@8b200000| memory@8cc00000|3memory@93c00000|Pmemory@94100000| 2memory@94300000|0:memory@95200000| memory@95210000|!Pmemory@95600000|`memory@95700000|pmpss-metadata @4clocksxo-board >fixed-clock$ xo_boardsleep-clk >fixed-clock#cpus,cpu@0pcpu >qcom,kryo280|psci"l2-cache>cache3?cpu@1pcpu >qcom,kryo280|psci" cpu@2pcpu >qcom,kryo280|psci" cpu@3pcpu >qcom,kryo280|psci" cpu@100pcpu >qcom,kryo280|psci" l2-cache>cache3?cpu@101pcpu >qcom,kryo280|psci" cpu@102pcpu >qcom,kryo280|psci"cpu@103pcpu >qcom,kryo280|psci"cpu-mapcluster0core0Mcore1M core2M core3M cluster1core0M core1M core2Mcore3Midle-statesQpscicpu-sleep-0-0>arm,idle-state^little-retentionnQVcpu-sleep-0-1>arm,idle-state^little-power-collapsen@.#cpu-sleep-1-0>arm,idle-state^big-retentionnORcpu-sleep-1-1>arm,idle-state^big-power-collapsen@$firmwarescm>qcom,scm-msm8998qcom,scmopp-table-dsi>operating-points-v2opp-131250000ҷPopp-210000000 Xopp-312500000_ psci >arm,psci-1.0smcremoteproc$>qcom,msm8998-rpm-procqcom,rpm-procglink-edge>qcom,glink-rpm rpm-requests>qcom,rpm-msm8998 rpm_requestsclock-controller>qcom,rpmcc-msm8998qcom,rpmccxo"power-controller>qcom,msm8998-rpmpd';1opp-table>operating-points-v2opp1Oopp2O opp3O0opp4O@opp5Oopp6Oopp7Oopp8O@opp9Oopp10Oregulators-0>qcom,rpm-pm8998-regulatorsYgu%:L]k s3@6@s4w@6w@Ns5 6 s7 6l1 m6 m(l2O6O)l3B@6B@l5 56 5l66l7w@6w@ml8O6Ol96-*l106-*l11B@6B@l12w@6w@dl136-*gl146l15w@6w@l16)B6)Bl176nl18)B6)Bl19-6-l20-*6-*N+l21-*6-*g 5Nfl22+6+l23262l24/6/el25/]62ol26O6ON,l28-6-lvs1w@6w@lvs2w@6w@9regulators-1>qcom,rpm-pmi8998-regulators}bob266smem >qcom,smemsmp2p-lpass >qcom,smp2p  master-kernelmaster-kernelslave-kernel slave-kernelsmp2p-mpss >qcom,smp2p master-kernelmaster-kernel/slave-kernel slave-kernel.smp2p-slpi >qcom,smp2p master-kernelmaster-kernel;slave-kernel slave-kernel8thermal-zonescpu0-thermal.<tripstrip-point0L$XQpassivecpu-critLX Qcriticalcpu1-thermal.<tripstrip-point0L$XQpassivecpu-critLX Qcriticalcpu2-thermal.<tripstrip-point0L$XQpassivecpu-critLX Qcriticalcpu3-thermal.<tripstrip-point0L$XQpassivecpu-critLX Qcriticalcpu4-thermal.<tripstrip-point0L$XQpassivecpu-critLX Qcriticalcpu5-thermal.<tripstrip-point0L$XQpassivecpu-critLX Qcriticalcpu6-thermal.< tripstrip-point0L$XQpassivecpu-critLX Qcriticalcpu7-thermal.< tripstrip-point0L$XQpassivecpu-critLX Qcriticalgpu-bottom-thermal.< tripstrip-point0L_XQhotgpu-top-thermal.< tripstrip-point0L_XQhotclust0-mhm-thermal.<tripstrip-point0L_XQhotclust1-mhm-thermal.<tripstrip-point0L_XQhotcluster1-l2-thermal.< tripstrip-point0L_XQhotmodem-thermal.< tripstrip-point0L_XQhotmem-thermal.< tripstrip-point0L_XQhotwlan-thermal.< tripstrip-point0L_XQhotq6-dsp-thermal.< tripstrip-point0L_XQhotcamera-thermal.< tripstrip-point0L_XQhotmultimedia-thermal.< tripstrip-point0L_XQhotpm8998-thermal.<!tripspm8998-alert0L(XQpassivepm8998-critLHX Qcriticaltimer>arm,armv8-timer0soc@0, >simple-busclock-controller@100000>qcom,gcc-msm8998c'|  xosleep_clk "# p%sram@778000>qcom,rpm-msg-ram|wpqfprom@784000 >qcom,msm8998-qfpromqcom,qfprom|x@b,hstx-trim@23a|:cthermal@10ab000!>qcom,msm8998-tsensqcom,tsens-v2|  uplowcriticalthermal@10ae000!>qcom,msm8998-tsensqcom,tsens-v2|  uplowcritical iommu@1680000">qcom,msm8998-smmu-v2qcom,smmu-v2|hHlmnopq&iommu@16c0000">qcom,msm8998-smmu-v2qcom,smmu-v2|lxuvwxyzpci@1c00000$>qcom,pcie-msm8998qcom,pcie-msm8996 |  parfdbielbiconfigppci, $pciephyokay0 00 msi2(%^%[%\%]%_"pipeauxcfgbus_masterbus_slave@%N& X'#phy@1c06000>qcom,msm8998-qmp-pcie-phy|`,okay%`%\%auxcfg_ahbrefd%L%N kphycommonw()phy@1c06800|b(dh %^pipe0pcie_0_pipe_clk_src$ufshc@1da4000,>qcom,msm8998-ufshcqcom,ufshcjedec,ufs-2.0|@%   *ufsphy@%okaycncore_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clk@%m%%l%s"P%r%p%q@ <4`рd%krst+, q q-phy@1da7000>qcom,msm8998-qmp-ufs-phy|p,okay refref_aux%%okufsphyd-w(),phy@1da7400(|t(v|x(z*hwlock@1f40000>qcom,tcsr-mutex|2syscon@1f60000>qcom,msm8998-tcsrsyscon|0pinctrl@3400000>qcom,msm8998-pinctrl|@ @'L\hQ'sdc2-on-statehclk-pins }sdc2_clkcmd-pins }sdc2_cmd data-pins }sdc2_data sdc2-off-statejclk-pins }sdc2_clkcmd-pins }sdc2_cmddata-pins }sdc2_datasdc2-cd-state}gpio95gpioiblsp1-uart3-on-stateltx-pins}gpio45 blsp_uart3_arx-pins}gpio46 blsp_uart3_acts-pins}gpio47 blsp_uart3_arfr-pins}gpio48 blsp_uart3_ablsp1-i2c1-default-state }gpio2gpio3 blsp_i2c1pblsp1-i2c1-sleep-state-state }gpio2gpio3 blsp_i2c1qblsp1-i2c2-default-state}gpio32gpio33 blsp_i2c2rblsp1-i2c2-sleep-state-state}gpio32gpio33 blsp_i2c2sblsp1-i2c3-default-state}gpio47gpio48 blsp_i2c3tblsp1-i2c3-sleep-state}gpio47gpio48 blsp_i2c3ublsp1-i2c4-default-state}gpio10gpio11 blsp_i2c4vblsp1-i2c4-sleep-state}gpio10gpio11 blsp_i2c4wblsp1-i2c5-default-state}gpio87gpio88 blsp_i2c5xblsp1-i2c5-sleep-state}gpio87gpio88 blsp_i2c5yblsp1-i2c6-default-state}gpio43gpio44 blsp_i2c6zblsp1-i2c6-sleep-state}gpio43gpio44 blsp_i2c6{blsp1-spi-b-default-state}gpio23gpio28 blsp1_spi_bblsp1-spi1-default-state}gpio0gpio1gpio2gpio3 blsp_spi1|blsp1-spi2-default-state}gpio31gpio34gpio32gpio33 blsp_spi2}blsp1-spi3-default-state}gpio45gpio46gpio47gpio48 blsp_spi2~blsp1-spi4-default-state}gpio8gpio9gpio10gpio11 blsp_spi4blsp1-spi5-default-state}gpio85gpio86gpio87gpio88 blsp_spi5blsp1-spi6-default-state}gpio41gpio42gpio43gpio44 blsp_spi6blsp2-i2c1-default-state}gpio55gpio56 blsp_i2c7blsp2-i2c1-sleep-state}gpio55gpio56 blsp_i2c7blsp2-i2c2-default-state }gpio6gpio7 blsp_i2c8blsp2-i2c2-sleep-state }gpio6gpio7 blsp_i2c8blsp2-i2c3-default-state}gpio51gpio52 blsp_i2c9blsp2-i2c3-sleep-state}gpio51gpio52 blsp_i2c9blsp2-i2c4-default-state}gpio67gpio68 blsp_i2c10blsp2-i2c4-sleep-state}gpio67gpio68 blsp_i2c10blsp2-i2c5-default-state}gpio60gpio61 blsp_i2c11blsp2-i2c5-sleep-state}gpio60gpio61 blsp_i2c11blsp2-i2c6-default-state}gpio83gpio84 blsp_i2c12blsp2-i2c6-sleep-state}gpio83gpio84 blsp_i2c12blsp2-spi1-default-state}gpio53gpio54gpio55gpio56 blsp_spi7blsp2-spi2-default-state}gpio4gpio5gpio6gpio7 blsp_spi8blsp2-spi3-default-state}gpio49gpio50gpio51gpio52 blsp_spi9blsp2-spi4-default-state}gpio65gpio66gpio67gpio68 blsp_spi10blsp2-spi5-default-state}gpio58gpio59gpio60gpio61 blsp_spi11blsp2-spi6-default-state}gpio81gpio82gpio83gpio84 blsp_spi12remoteproc@4080000>qcom,msm8998-mss-pil|  qdsp6rmbL.....0wdogfatalreadyhandoverstop-ackshutdown-ack@%%$%%%%""2ifacebusmemgpll0_msssnoc_aximnoc_axiqdssxo/stopd%l kmss_restart00P@@11 cxmxokaymba2mpss3metadata4glink-edge  modemgpu@5000000>qcom,adreno-540.1qcom,adreno|kgsl_3d0_reg_memory0%M5%%K55)ifacerbbmtimermemmem_ifacerbcprcore ,&6;7@1 disabledopp-table>operating-points-v27opp-710000097*QO-opp-670000048'cO@-opp-596000097#=aO-opp-515000097G!O-opp-414000000#O-opp-342000000bO@-opp-257000000Q@O0-iommu@5040000">qcom,msm8998-smmu-v2qcom,smmu-v2|%M%%Kifacememmem_iface$IJK@5 disabled6clock-controller@5065000>qcom,msm8998-gpuccc'|P"% xogpll05remoteproc@5800000>qcom,msm8998-slpi-pas|@@@8888#wdogfatalreadyhandoverstop-ack>9""@ xoaggre2:;stop@1 ssc_cxokayglink-edge  dspsstm@6002000 >arm,coresight-stmarm,primecell| (stm-basestm-stimulus-baseokay"" apb_pclkatclkout-portsportendpointH<>funnel@6041000+>arm,coresight-dynamic-funnelarm,primecell|okay"" apb_pclkatclkout-portsportendpointH=Bin-ports,port@7|endpointH><funnel@6042000+>arm,coresight-dynamic-funnelarm,primecell| okay"" apb_pclkatclkout-portsportendpointH?Cin-ports,port@6|endpointH@Vfunnel@6045000+>arm,coresight-dynamic-funnelarm,primecell|Pokay"" apb_pclkatclkout-portsportendpointHAGin-ports,port@0|endpointHB=port@1|endpointHC?replicator@6046000/>arm,coresight-dynamic-replicatorarm,primecell|`okay"" apb_pclkatclkout-portsportendpointHDHin-portsportendpointHEFetf@6047000 >arm,coresight-tmcarm,primecell|pokay"" apb_pclkatclkout-portsportendpointHFEin-portsportendpointHGAetr@6048000 >arm,coresight-tmcarm,primecell|okay"" apb_pclkatclkXin-portsportendpointHHDetm@7840000">arm,coresight-etm4xarm,primecell|okay"" apb_pclkatclkMout-portsportendpointHINetm@7940000">arm,coresight-etm4xarm,primecell|okay"" apb_pclkatclkM out-portsportendpointHJOetm@7a40000">arm,coresight-etm4xarm,primecell|okay"" apb_pclkatclkM out-portsportendpointHKPetm@7b40000">arm,coresight-etm4xarm,primecell|okay"" apb_pclkatclkM out-portsportendpointHLQfunnel@7b60000">arm,coresight-etm4xarm,primecell| disabled"" apb_pclkatclkout-portsportendpointHMWin-ports,port@0|endpointHNIport@1|endpointHOJport@2|endpointHPKport@3|endpointHQLport@4|endpointHRXport@5|endpointHSYport@6|endpointHTZport@7|endpointHU[funnel@7b70000+>arm,coresight-dynamic-funnelarm,primecell| disabled"" apb_pclkatclkout-portsportendpointHV@in-portsportendpointHWMetm@7c40000">arm,coresight-etm4xarm,primecell|okay"" apb_pclkatclkM out-portsportendpointHXRetm@7d40000">arm,coresight-etm4xarm,primecell|okay"" apb_pclkatclkM out-portsportendpointHYSetm@7e40000">arm,coresight-etm4xarm,primecell|okay"" apb_pclkatclkMout-portsportendpointHZTetm@7f40000">arm,coresight-etm4xarm,primecell|okay"" apb_pclkatclkMout-portsportendpointH[Usram@290000>qcom,rpm-stats|)spmi@800f000>qcom,spmi-pmic-arb(|@ @ @"0corechnlsobsrvrintrcnfg periph_irq Fks,pmic@4>qcom,pm8005qcom,spmi-pmic|,gpio@c000 >qcom,pm8005-gpioqcom,spmi-gpio|L@\\\pmic@5>qcom,pm8005qcom,spmi-pmic|,regulators>qcom,pm8005-regulatorsYs16pmic@0>qcom,pm8998qcom,spmi-pmic|,pon@800>qcom,pm8998-pon|pwrkey>qcom,pm8941-pwrkey= tresin>qcom,pm8941-resin=  disabledtemp-alarm@2400>qcom,spmi-temp-alarm|$$]thermal!charger@2800*>qcom,pm8998-coincellqcom,pm8941-coincell|( disabledadc@3100>qcom,spmi-adc-rev2|11,]channel@6|  die_tempadc-tm@3400>qcom,spmi-adc-tm-hc|44, disabledrtc@6000>qcom,pm8941-rtc|`a rtcalarmagpio@c000 >qcom,pm8998-gpioqcom,spmi-gpio|L@^\^pmic@1>qcom,pm8998qcom,spmi-pmic|,pmic@2>qcom,pmi8998qcom,spmi-pmic|,charger@1000>qcom,pmi8998-charger|@-usb-pluginbat-ovwdog-barkusbin-icl-change__usbin_iusbin_v disabledgpio@c000!>qcom,pmi8998-gpioqcom,spmi-gpio|L@`\`adc@4500>qcom,pmi8998-rradc|E_pmic@3>qcom,pmi8998qcom,spmi-pmic|,labibb>qcom,pmi8998-lab-ibbibb  sc-errocplab  sc-errocppwm>qcom,pmi8998-lpg,  disabledled-controller@d300+>qcom,pmi8998-flash-ledqcom,spmi-flash-led| disabledleds@d800>qcom,pmi8998-wled|  ovpshort  backlight disabledusb@a8f8800>qcom,msm8998-dwc3qcom,dwc3| okay,(%G%t% %v%u#cfg_noccoreifacesleepmock_utmi %u%t ,$'[hs_phy_irqss_phy_irq@%d%usb@a800000 >snps,dwc3|   A Z abusb2-phyusb3-phy r  hostphy@c010000>qcom,msm8998-qmp-usb3-phy| okay,%w%y%auxcfg_ahbrefd%E%F kphycommonw()phy@c010200(| (    ( %xpipe0usb3_phy_pipe_clk_srcbphy@c012000>qcom,msm8998-qusb2-phy|  okay%y% cfg_ahbrefd%j cd eammc@c0a4900%>qcom,msm8998-sdhciqcom,sdhci-msm-v4| I @hccore}hc_irqpwr_irqifacecorexo%e%f" okay '_ f g defaultsleep hi jidma-controller@c144000>qcom,bam-v1.7.0| @P %%bam_clk k  6 Ckserial@c171000%>qcom,msm-uartdm-v1.4qcom,msm-uartdm|  m%5%% coreiface Pkk Utxrx default lokaybluetooth>qcom,wcn3990-bt _ lm yn o 0i2c@c175000>qcom,i2c-qup-v2.2.1| P _%&%% coreiface Pkk Utxrx defaultsleep p q disabled,i2c@c176000>qcom,i2c-qup-v2.2.1| ` `%(%% coreiface Pkk  Utxrx defaultsleep r s disabled,i2c@c177000>qcom,i2c-qup-v2.2.1| p a%*%% coreiface Pk k  Utxrx defaultsleep t u disabled,i2c@c178000>qcom,i2c-qup-v2.2.1|  b%,%% coreiface Pk k  Utxrx defaultsleep v w disabled,i2c@c179000>qcom,i2c-qup-v2.2.1|  c%.%% coreiface Pkk Utxrx defaultsleep x y disabled,i2c@c17a000>qcom,i2c-qup-v2.2.1|  d%0%% coreiface Pkk Utxrx defaultsleep z { disabled,spi@c175000>qcom,spi-qup-v2.2.1| P _%'%% coreiface Pkk Utxrx default | disabled,spi@c176000>qcom,spi-qup-v2.2.1| ` `%)%% coreiface Pkk  Utxrx default } disabled,spi@c177000>qcom,spi-qup-v2.2.1| p a%+%% coreiface Pk k  Utxrx default ~ disabled,spi@c178000>qcom,spi-qup-v2.2.1|  b%-%% coreiface Pk k  Utxrx default  disabled,spi@c179000>qcom,spi-qup-v2.2.1|  c%/%% coreiface Pkk Utxrx default  disabled,spi@c17a000>qcom,spi-qup-v2.2.1|  d%1%% coreiface Pkk Utxrx default  disabled,dma-controller@c184000>qcom,bam-v1.7.0| @P %6bam_clk k  6 Cserial@c1b0000%>qcom,msm-uartdm-v1.4qcom,msm-uartdm|  r%E%6 coreifaceokayi2c@c1b5000>qcom,i2c-qup-v2.2.1| P e%7%6 coreiface P Utxrx defaultsleep   disabled,i2c@c1b6000>qcom,i2c-qup-v2.2.1| ` f%9%6 coreiface P  Utxrx defaultsleep   disabled,i2c@c1b7000>qcom,i2c-qup-v2.2.1| p g%;%6 coreiface P  Utxrx defaultsleep   disabled,i2c@c1b8000>qcom,i2c-qup-v2.2.1|  h%=%6 coreiface P  Utxrx defaultsleep   disabled,i2c@c1b9000>qcom,i2c-qup-v2.2.1|  i%?%6 coreiface P Utxrx defaultsleep   disabled,i2c@c1ba000>qcom,i2c-qup-v2.2.1|  j%A%6 coreiface P Utxrx defaultsleep   disabled,spi@c1b5000>qcom,spi-qup-v2.2.1| P e%8%6 coreiface P Utxrx default  disabled,spi@c1b6000>qcom,spi-qup-v2.2.1| ` f%:%6 coreiface P  Utxrx default  disabled,spi@c1b7000>qcom,spi-qup-v2.2.1| p g%<%6 coreiface P  Utxrx default  disabled,spi@c1b8000>qcom,spi-qup-v2.2.1|  h%>%6 coreiface P  Utxrx default  disabled,spi@c1b9000>qcom,spi-qup-v2.2.1|  i%@%6 coreiface P Utxrx default  disabled,spi@c1ba000>qcom,spi-qup-v2.2.1|  j%B%6 coreiface P Utxrx default  disabled,clock-controller@c8c0000>qcom,mmcc-msm8998c'| Jxogpll0dsi0dsidsi0bytedsi1dsidsi1bytehdmiplldplinkdpvcogpll0_divD"%%display-subsystem@c900000>qcom,msm8998-mdss| mdss S>@Cifacebuscore@&, disableddisplay-controller@c901000>qcom,msm8998-dpu |   @mdpregdmavbifvbif_nrt(>@CFifacebusmnoccorevsync F ,$;@1opp-table>operating-points-v2opp-171430000 7popp-275000000d*opp-330000000fopp-412500000@ ports,port@0|endpointHport@1|endpointHdsi@c994000)>qcom,msm8998-dsi-ctrlqcom,mdss-dsi-ctrl| @ dsi_ctrl0HRAJ>@$bytebyte_intfpixelcoreifacebus / ;@1 dsi, disabledports,port@0|endpointHport@1|endpointphy@c994400>qcom,dsi-phy-10nm-8998| D F Jdsi_phydsi_phy_lanedsi_pll>" ifaceref disableddsi@c996000)>qcom,msm8998-dsi-ctrlqcom,mdss-dsi-ctrl| ` dsi_ctrl0ISBK>@$bytebyte_intfpixelcoreifacebus 0 ;@1 dsi, disabledports,port@0|endpointHport@1|endpointphy@c996400>qcom,dsi-phy-10nm-8998| d f jdsi_phydsi_phy_lanedsi_pll>" ifaceref disablediommu@cd00000">qcom,msm8998-smmu-v2qcom,smmu-v2| iface-mmiface-smmubus-smmu   @ remoteproc@17300000>qcom,msm8998-adsp-pas|0@@@#wdogfatalreadyhandoverstop-ack"xostop@1 cxokayglink-edge  lpass mailbox@17911000<>qcom,msm8998-apcs-hmss-globalqcom,msm8994-apcs-kpss-global| timer@17920000,>arm,armv7-timer-mem|frame@17921000 | frame@17923000   |0 disabledframe@17924000   |@ disabledframe@17925000   |P disabledframe@17926000   |` disabledframe@17927000   |p disabledframe@17928000  | disabledinterrupt-controller@17a00000 >arm,gic-v3|,    wifi@18800000>qcom,wcn3990-wifiokay|membase"cxo_ref_clk_pin&   -m ?n Roaliases e/soc@0/serial@c1b0000 m/soc@0/serial@c171000vph-pwr-regulator>regulator-fixed uvph_pwr  interrupt-parentqcom,msm-id#address-cells#size-cellsmodelcompatiblechassis-typeqcom,board-idstdout-pathdevice_typeregrangesno-mapphandleqcom,client-idqcom,vmidalloc-rangessize#clock-cellsclock-frequencyclock-output-namesenable-methodcapacity-dmips-mhzcpu-idle-statesnext-level-cachecache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopopp-hzrequired-oppsinterruptsqcom,rpm-msg-rammboxesqcom,glink-channelsclocksclock-names#power-domain-cellsoperating-points-v2opp-levelvdd_s1-supplyvdd_s2-supplyvdd_s3-supplyvdd_s4-supplyvdd_s5-supplyvdd_s6-supplyvdd_s7-supplyvdd_s8-supplyvdd_s9-supplyvdd_s10-supplyvdd_s11-supplyvdd_s12-supplyvdd_s13-supplyvdd_l1_l27-supplyvdd_l2_l8_l17-supplyvdd_l3_l11-supplyvdd_l4_l5-supplyvdd_l6-supplyvdd_l7_l12_l14_l15-supplyvdd_l9-supplyvdd_l10_l23_l25-supplyvdd_l13_l19_l21-supplyvdd_l16_l28-supplyvdd_l18_l22-supplyvdd_l20_l24-supplyvdd_l26-supplyvdd_lvs1_lvs2-supplyregulator-min-microvoltregulator-max-microvoltregulator-allow-set-loadregulator-system-loadvdd_bob-supplymemory-regionhwlocksqcom,smemqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresis#reset-cellsprotected-clocksbits#qcom,sensorsinterrupt-names#thermal-sensor-cells#iommu-cells#global-interruptsreg-nameslinux,pci-domainbus-rangenum-lanesphysphy-namesstatusinterrupt-map-maskinterrupt-mappower-domainsiommu-mapperst-gpiosresetsreset-namesvdda-phy-supplyvdda-pll-supply#phy-cellslanes-per-directionfreq-table-hzvcc-supplyvccq-supplyvccq2-supplyvcc-max-microampvccq-max-microampvccq2-max-microampvddp-ref-clk-supply#hwlock-cellsgpio-rangesgpio-controller#gpio-cellsgpio-reserved-rangespinsdrive-strengthbias-disablebias-pull-upfunctionbias-pull-downinterrupts-extendedqcom,smem-statesqcom,smem-state-namesqcom,halt-regspower-domain-nameslabeliommusopp-supported-hwpx-supplyremote-endpointarm,scatter-gatherqcom,eeqcom,channelregulator-enable-ramp-delayregulator-always-onmode-bootloadermode-recoverydebouncelinux,codeio-channelsio-channel-names#io-channel-cells#pwm-cellsassigned-clocksassigned-clock-ratessnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirksnps,has-lpm-erratumsnps,hird-thresholddr_modenvmem-cellsvdda-phy-dpdm-supplybus-widthcd-gpiosvmmc-supplyvqmmc-supplypinctrl-namespinctrl-0pinctrl-1#dma-cellsqcom,controlled-remotelynum-channelsqcom,num-eesdmasdma-namesvddio-supplyvddxo-supplyvddrf-supplyvddch0-supplymax-speedassigned-clock-parents#mbox-cellsframe-number#redistributor-regionsredistributor-strideqcom,snoc-host-cap-8bit-quirkvdd-0.8-cx-mx-supplyvdd-1.8-xo-supplyvdd-1.3-rfa-supplyvdd-3.3-ch0-supplyserial0serial1regulator-nameregulator-boot-on