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mmio-sramM=+sram@0arm,scmi-shmemMKusb@fc800000"rockchip,rk3588-ehcigeneric-ehciMrDIusbS adisabledusb@fc840000"rockchip,rk3588-ohcigeneric-ohciMrDIusbS adisabledusb@fc880000"rockchip,rk3588-ehcigeneric-ehciMrD IusbS adisabledusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohciMrD IusbS adisabledsyscon@fd58c000rockchip,rk3588-sys-grfsysconMXK_syscon@fd5b0000rockchip,rk3588-php-grfsysconM[K!syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsysconM[Ksyscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsysconM\@Ksyscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfdM]@+usb2-phy@8000rockchip,rk3588-usb2phyMhoophyapbr{phyclk usb480m_phy2 adisabledKhost-port adisabledKsyscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfdM]@+usb2-phy@c000rockchip,rk3588-usb2phyMhp ophyapbr{phyclk usb480m_phy3 adisabledKhost-port adisabledK syscon@fd5f0000rockchip,rk3588-iocsysconM_Ksram@fd600000 mmio-sramM`=`+clock-controller@fd7c0000rockchip,rk3588-cruM|y]q@A.2Fq)׫ׄe/ׄ eZ р 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adisabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwmMrLK {pwmpclkdefault adisabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwmM rLK {pwmpclkdefault adisabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwmM0rLK {pwmpclkdefault adisabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwmMrON {pwmpclkdefault adisabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwmMrON {pwmpclkdefault adisabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwmM rON {pwmpclkdefault adisabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwmM0rON {pwmpclkdefault adisabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwmMrRQ {pwmpclkdefault adisabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwmMrRQ {pwmpclkdefault adisabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwmM rRQ {pwmpclkdefault adisabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwmM0rRQ {pwmpclkdefault adisabledtsadc@fec00000rockchip,rk3588-tsadcMr{tsadcapb_pclkyhVWotsadc-apbtsadc`w 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Kdsdmmc-det Kespdif0spdif1spi0spi0m0-pins0 Kspi0m0-cs0 Kspi0m0-cs1 Kspi1spi1m1-pins0 Kspi1m1-cs0 Kspi1m1-cs1 Kspi2spi2m2-pins0  Kspi2m2-cs0  Kspi3spi3m1-pins0  Kspi3m1-cs0 Kspi3m1-cs1 Kspi4spi4m0-pins0 Kspi4m0-cs0 Kspi4m0-cs1 Ktsadctsadc-shut Kuart0uart0m1-xfer  K%uart1uart1m1-xfer   Kuart2uart2m0-xfer  Kuart3uart3m1-xfer   Kuart4uart4m1-xfer   Kuart5uart5m1-xfer   Kuart6uart6m1-xfer   Kuart7uart7m1-xfer   Kuart8uart8m1-xfer   Kuart9uart9m2-xfer   Kuart9m2-ctsn  Kuart9m2-rtsn  Kvopbt656gpio-functsadc-gpio-func Kbluetooth-pinsbt-reset Kbt-wake-dev Kbt-wake-host Khym8563hym8563-int Ksdio-pwrseqwifi-enable-h Kusb-typecusbc0-int Ktypec5v-pwren Kaliases /mmc@fe2e0000 /mmc@fe2c0000 /mmc@fe2d0000 /serial@feb50000chosen 'serial2:1500000n8sdio-pwrseqmmc-pwrseq-simple {ext_clockrdefault 3 JKjsoundaudio-graph-cardrockchip,es8388-codec) VMicrophoneMic JackHeadphoneHeadphones3 ^LINPUT2Mic JackHeadphonesLOUT1HeadphonesROUT1 fvbus5v0-typec-regulatorregulator-fixed k ~default vbus5v0_typecLK@LK@NKvcc-1v1-nldo-s3-regulatorregulator-fixed vcc_1v1_nldo_s3N#Kvcc-3v3-s0-regulatorregulator-fixed2Z2Z  vcc_3v3_s0NgKqregulator-state-memYvcc5v0-sys-regulatorregulator-fixedLK@LK@  vcc5v0_sysK#vcc5v0-usb-regulatorregulator-fixedLK@LK@  vcc5v0_usbNKvcc5v0-usbdcin-regulatorregulator-fixedLK@LK@ vcc5v0_usbdcinK compatibleinterrupt-parent#address-cells#size-cellsmodelcpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellscpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesphysphy-namespower-domainsstatusresetsreset-namesclock-names#phy-cellsrockchip,grfpinctrl-0pinctrl-namesregulator-always-onregulator-boot-onregulator-max-microvoltregulator-min-microvoltregulator-nameregulator-ramp-delayfcs,suspend-voltage-selectorvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesreg-namesinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpno-sdiono-mmcsd-uhs-sdr104vmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqno-sdnon-removableno-mmc-hs400rockchip,trcm-sync-tx-onlydai-formatmclk-fsremote-endpointmbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsnum-cs#gpio-cellsgpio-controllerspi-max-frequencyvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplypinsfunctionregulator-enable-ramp-delayregulator-on-in-suspendregulator-suspend-microvoltuart-has-rtsctsdevice-wake-gpiosenable-gpioshost-wake-gpiosrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvbus-supplydata-rolelabelpower-roletry-power-rolesource-pdossink-pdosop-sink-microwattwakeup-sourceAVDD-supplyDVDD-supplyHPVDD-supplybitsrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesgpio-line-namesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsmmc0mmc1mmc2serial2stdout-pathpost-power-on-delay-msreset-gpioswidgetsroutingdaisenable-active-highgpio