8א( ^X %,radxa,e25radxa,cm3irockchip,rk35687Radxa E25 Carrier Boardaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/mmc@fe310000/mmc@fe2b0000cpus cpu@0cpu,arm,cortex-a55 psci/: cpu@100cpu,arm,cortex-a55 psci/: cpu@200cpu,arm,cortex-a55 psci/: cpu@300cpu,arm,cortex-a55 psci/: opp-table-0,operating-points-v2B:opp-408000000MQ T 0b@opp-600000000M#F T 0opp-816000000M0, T 0sopp-1104000000MAʹ T 0opp-1416000000MTfr T 0opp-1608000000M_" T0opp-1800000000MkI T0opp-1992000000Mv T000display-subsystem,rockchip,display-subsystem disabledfirmwarescmi ,arm,scmi-smc protocol@14:opp-table-1,operating-points-v2:Eopp-200000000M T opp-300000000MT opp-400000000MׄT opp-600000000M#FT opp-700000000M)'T opp-800000000M/TB@hdmi-sound,simple-audio-cardHDMIi2s disabledsimple-audio-card,codecsimple-audio-card,cpupmu,arm,cortex-a55-pmu0 psci ,arm,psci-1.0smctimer,arm,armv8-timer0   xin24m ,fixed-clock3n6Cxin24m:xin32k ,fixed-clock3Cxin32kV `defaultsram@10f000 ,mmio-sram nsram@0,arm,scmi-shmem:sata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@usatapmaliverxoob _ sata-phyokaysata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciusatapmaliverxoob ` sata-phy disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ uref_clksuspend_clkbus_clkotg utmi_wideokay usb2-phyusb3-phyusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ uref_clksuspend_clkbus_clkhost usb2-phyusb3-phy utmi_wide disabledinterrupt-controller@fd400000 ,arm,gic-v3 @F  A(#:usb@fd800000 ,generic-ehci usbokayusb@fd840000 ,generic-ohci usbokayusb@fd880000 ,generic-ehci usbokayusb@fd8c0000 ,generic-ohci usbokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfd:io-domains&,rockchip,rk3568-pmu-io-voltage-domainokay2@N\jxsyscon@fdc50000 ,rockchip,rk3568-pipe-grfsyscon:syscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfd:syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsyscon:syscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsyscon:syscon@fdca0000#,rockchip,rk3568-usb2phy-grfsyscon:syscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀ:clock-controller@fdd00000,rockchip,rk3568-pmucru:clock-controller@fdd20000,rockchip,rk3568-cruuxin24m G :i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c .- ui2cpclkV `default okayregulator@1c ,tcs,tcs4525#vdd_cpu2FX 5p0!:regulator-state-mempmic@20,rockchip,rk809 "`defaultV#$$$$ $,$8$D$P$regulatorsDCDC_REG1 #vdd_logic2F\X ppqregulator-state-memDCDC_REG2#vdd_gpu2\X ppq:Fregulator-state-memDCDC_REG3#vcc_ddr2F\regulator-state-memsDCDC_REG4#vdd_npu\X ppqregulator-state-memDCDC_REG5#vcc_1v82FXw@pw@:regulator-state-memLDO_REG1#vdda0v9_imageX p regulator-state-memLDO_REG2 #vdda_0v92FX p regulator-state-memLDO_REG3 #vdda0v9_pmu2FX p regulator-state-mems LDO_REG4 #vccio_acodec2X2Zp2Z:regulator-state-memLDO_REG5 #vccio_sdXw@p2Z:regulator-state-memLDO_REG6 #vcc3v3_pmu2FX2Zp2Z:regulator-state-mems2ZLDO_REG7 #vcca_1v82FXw@pw@:regulator-state-memLDO_REG8 #vcca1v8_pmu2FXw@pw@regulator-state-memsw@LDO_REG9#vcca1v8_imageXw@pw@regulator-state-memSWITCH_REG1#vcc_3v32F:regulator-state-memSWITCH_REG2 #vcc3v3_sd:Yregulator-state-memserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart t ,ubaudclkapb_pclk%%V&`default disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 upwmpclkV'`default disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 upwmpclkV(`defaultokay:pwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 upwmpclkV)`defaultokay:pwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 upwmpclkV*`default disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller :power-domain@7+power-domain@8 ,-.power-domain@9  /01power-domain@10 234567power-domain@11 8power-domain@13 9power-domain@14 :;<power-domain@15 =>?@ABCDgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$()' jobmmugpuugpubusEokayF:video-codec@fdea0400,rockchip,rk3568-vpu vdpu uaclkhclkG iommu@fdea0800,rockchip,rk3568-iommu@  uaclkiface  :Grga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga Zuaclkhclksclk&$% coreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu @ uaclkhclkH iommu@fdee0800,rockchip,rk3568-iommu@ ? uaclkiface  :Hmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ d ubiuciuciu-driveciu-sample%0рreset disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a macirqeth_wake_irq@Wustmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref stmmaceth>IN_JrK disabledmdio,snps,dwmac-mdio stmmac-axi-config:Irx-queues-config:Jqueue0tx-queues-config:Kqueue0vop@fe040000 0@vopgamma-lut (%uaclkhclkdclk_vp0dclk_vp1dclk_vp2L  disabled,rockchip,rk3568-vopports :port@0 port@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >?  uaclkiface  disabled:Ldsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi DupclkdphyM apb disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi EupclkdphyN apb disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  -((uiahbisfrcecref`default VOPQ  disabled:ports port@0port@1qos@fe128000,rockchip,rk3568-qossyscon :+qos@fe138080,rockchip,rk3568-qossyscon ::qos@fe138100,rockchip,rk3568-qossyscon :;qos@fe138180,rockchip,rk3568-qossyscon :<qos@fe148000,rockchip,rk3568-qossyscon :,qos@fe148080,rockchip,rk3568-qossyscon :-qos@fe148100,rockchip,rk3568-qossyscon :.qos@fe150000,rockchip,rk3568-qossyscon :8qos@fe158000,rockchip,rk3568-qossyscon :2qos@fe158100,rockchip,rk3568-qossyscon :3qos@fe158180,rockchip,rk3568-qossyscon :4qos@fe158200,rockchip,rk3568-qossyscon :5qos@fe158280,rockchip,rk3568-qossyscon :6qos@fe158300,rockchip,rk3568-qossyscon :7qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon :=qos@fe190280,rockchip,rk3568-qossyscon :Aqos@fe190300,rockchip,rk3568-qossyscon :Bqos@fe190380,rockchip,rk3568-qossyscon :Cqos@fe190400,rockchip,rk3568-qossyscon :Dqos@fe198000,rockchip,rk3568-qossyscon :9qos@fe1a8000,rockchip,rk3568-qossyscon :/qos@fe1a8080,rockchip,rk3568-qossyscon :0qos@fe1a8100,rockchip,rk3568-qossyscon :1pcie@fe260000,rockchip,rk3568-pcie0@&dbiapbconfig<KJIHGsyspmcmsglegacyerr($uaclk_mstaclk_slvaclk_dbipclkauxpci `RRRR*;JYhp pcie-phyTn @@pipe okay`defaultVS zT Ulegacy-interrupt-controller H:Rmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ b ubiuciuciu-driveciu-sample%0рresetokay "`default VVWXYmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ c ubiuciuciu-driveciu-sample%0рreset disabledspi@fe300000 ,rockchip,sfc0@ exvuclk_sfchclk_sfcVZ`default disabledmmc@fe310000,rockchip,rk3568-dwcmshc1 {} n6(|zy{}ucorebusaxiblocktimerokay0 `defaultV[\]^i2s@fe400000,rockchip,rk3568-i2s-tdm@ 4=AFqFq?C9umclk_txmclk_rxhclk_txPQ tx-mrx-m disabled:i2s@fe410000,rockchip,rk3568-i2s-tdmA 5EIFqFqGK:umclk_txmclk_rxhclk__rxtxRS tx-mrx-m`default0V`abcdefghijk disabledi2s@fe420000,rockchip,rk3568-i2s-tdmB 6MFqOO;umclk_txmclk_rxhclk__txrxTtx-m`defaultVlmno disabledi2s@fe430000,rockchip,rk3568-i2s-tdmC 7SW<umclk_txmclk_rxhclk__txrxUV tx-mrx-m disabledpdm@fe440000,rockchip,rk3568-pdmD LZYupdm_clkpdm_hclk_ rxVpqrstu`defaultXpdm-m disabledspdif@fe460000,rockchip,rk3568-spdifF f umclkhclk_\_tx`defaultVv disableddma-controller@fe530000,arm,pl330arm,primecellS@   uapb_pclk:%dma-controller@fe550000,arm,pl330arm,primecellU@  uapb_pclk:_i2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ /HG ui2cpclkVw`default  disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ 0JI ui2cpclkVx`default  disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ 1LK ui2cpclkVy`default  disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] 2NM ui2cpclkVz`default  disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ 3PO ui2cpclkV{`default  disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt`  utclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia gRQuspiclkapb_pclk%%txrx`default V|}~  disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib hTSuspiclkapb_pclk%%txrx`default V  disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic iVUuspiclkapb_pclk%%txrx`default V  disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid jXWuspiclkapb_pclk%%txrx`default V  disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte uubaudclkapb_pclk%%V`default disabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf v# ubaudclkapb_pclk%%V`defaultokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg w'$ubaudclkapb_pclk%%V`default disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth x+(ubaudclkapb_pclk%% V`default disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti y/,ubaudclkapb_pclk% % V`default disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj z30ubaudclkapb_pclk% % V`default disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk {74ubaudclkapb_pclk%%V`default disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl |;8ubaudclkapb_pclk%%V`default disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm }?<ubaudclkapb_pclk%%V`default disabledthermal-zonescpu-thermal&d<Jtripscpu_alert0Zpfpassive:cpu_alert1Z$fpassivecpu_critZsf criticalcooling-mapsmap0q0v gpu-thermal&<Jtripsgpu-thresholdZpfpassivegpu-targetZ$fpassive:gpu-critZsf criticalcooling-mapsmap0q vtsadc@fe710000,rockchip,rk3568-tsadcq sf@ `utsadcapb_pclks`initdefaultsleepVokay:saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr ]usaradcapb_pclk saradc-apbokay pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY upwmpclkV`default disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY upwmpclkV`default disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY upwmpclkV`default disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY upwmpclkV`default disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ upwmpclkV`default disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ upwmpclkV`default disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ upwmpclkV`default disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ upwmpclkV`default disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ upwmpclkV`defaultokay:pwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ upwmpclkV`default disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ upwmpclkV`default disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ upwmpclkV`default disabledphy@fe830000,rockchip,rk3568-naneng-combphy"} urefapbpipe"  ( >okay I:phy@fe840000,rockchip,rk3568-naneng-combphy%~ urefapbpipe%  ( >okay:phy@fe870000,rockchip,rk3568-csi-dphyyupclk >apb disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy urefpclkz > apb disabled:Mmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy urefpclk{ > apb disabled:Nusb2phy@fe8a0000,rockchip,rk3568-usb2phyuphyclkCclk_usbphy0_480m  Tokay:host-port > disabled:otg-port >okay I:usb2phy@fe8b0000,rockchip,rk3568-usb2phyuphyclkCclk_usbphy1_480m  Tokayhost-port >okay I:otg-port >okay I:pinctrl,rockchip,rk3568-pinctrl d n:gpio@fdd60000,rockchip,gpio-bank !.  q  :"gpio@fe740000,rockchip,gpio-bankt "cd q  :Tgpio@fe750000,rockchip,gpio-banku #ef q @  :gpio@fe760000,rockchip,gpio-bankv $gh q `  :gpio@fe770000,rockchip,gpio-bankw %ij q  pcfg-pull-up :pcfg-pull-none :pcfg-pull-none-drv-level-1  :pcfg-pull-none-drv-level-2  :pcfg-pull-none-drv-level-3  :pcfg-pull-up-drv-level-1  :pcfg-pull-up-drv-level-2  :pcfg-pull-none-smt  :acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 : cpuebcedpdpemmcemmc-bus8   :[emmc-clk :\emmc-cmd :]emmc-datastrobe :^eth0eth1flashfspifspi-pins` :Zgmac0gmac1gpuhdmitxhdmitxm0-cec :Qhdmitx-scl :Ohdmitx-sda :Pi2c0i2c0-xfer  : i2c1i2c1-xfer  :wi2c2i2c2m0-xfer :xi2c3i2c3m0-xfer :yi2c4i2c4m0-xfer   :zi2c5i2c5m0-xfer   :{i2s1i2s1m0-lrckrx :ci2s1m0-lrcktx :bi2s1m0-sclkrx :ai2s1m0-sclktx :`i2s1m0-sdi0  :di2s1m0-sdi1  :ei2s1m0-sdi2  :fi2s1m0-sdi3 :gi2s1m0-sdo0 :hi2s1m0-sdo1 :ii2s1m0-sdo2  :ji2s1m0-sdo3  :ki2s2i2s2m0-lrcktx :mi2s2m0-sclktx :li2s2m0-sdi :ni2s2m0-sdo :oi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x1m0-pins0 :pcie30x2pdmpdmm0-clk :ppdmm0-clk1 :qpdmm0-sdi0  :rpdmm0-sdi1  :spdmm0-sdi2  :tpdmm0-sdi3 :upmicpmic_int :#pmupwm0pwm0m0-pins :'pwm1pwm1m0-pins :(pwm2pwm2m0-pins :)pwm3pwm3-pins :*pwm4pwm4-pins :pwm5pwm5-pins :pwm6pwm6-pins :pwm7pwm7-pins :pwm8pwm8m0-pins  :pwm9pwm9m0-pins  :pwm10pwm10m0-pins  :pwm11pwm11m0-pins :pwm12pwm12m1-pins :pwm13pwm13m0-pins :pwm14pwm14m0-pins :pwm15pwm15m0-pins :refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ :Vsdmmc0-clk :Wsdmmc0-cmd :Xsdmmc1sdmmc2spdifspdifm0-tx :vspi0spi0m0-pins0 :~spi0m0-cs0 :|spi0m0-cs1 :}spi1spi1m0-pins0  :spi1m0-cs0 :spi1m0-cs1 :spi2spi2m0-pins0 :spi2m0-cs0 :spi2m0-cs1 :spi3spi3m0-pins0   :spi3m0-cs0 :spi3m0-cs1 :tsadctsadc-shutorg :tsadc-pin :uart0uart0-xfer :&uart1uart1m0-xfer   :uart2uart2m0-xfer :uart3uart3m0-xfer :uart4uart4m0-xfer :uart5uart5m0-xfer :uart6uart6m0-xfer :uart7uart7m0-xfer :uart8uart8m0-xfer :uart9uart9m0-xfer :vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2ledsled_user_en :pciepcie20-reset-h  :Spcie30x1-enable-h :pcie30x2-reset-h :pcie-enable-h :usbminipcie-enable-h :ngffpcie-enable-h :vbus_typec_en :sata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciusatapmaliverxoob ^ sata-phy disabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsyscon:qos@fe190080,rockchip,rk3568-qossyscon :>qos@fe190100,rockchip,rk3568-qossyscon :?qos@fe190200,rockchip,rk3568-qossyscon :@syscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconˀ:phy@fe8c0000,rockchip,rk3568-pcie3-phy >&'wurefclk_mrefclk_npclkphy okay :pcie@fe270000,rockchip,rk3568-pcie ($uaclk_mstaclk_slvaclk_dbipclkauxpci<syspmcmsglegacyerr `*;JYhp pcie-phy0@@'Tn @@@dbiapbconfigpipeokay`defaultV z"legacy-interrupt-controller :pcie@fe280000,rockchip,rk3568-pcie ($uaclk_mstaclk_slvaclk_dbipclkauxpci<syspmcmsglegacyerr `*;JYh p pcie-phy0@(Tn @@dbiapbconfigpipeokay`defaultV zUlegacy-interrupt-controller :ethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a*macirqeth_wake_irq@Wustmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref stmmaceth>N_r disabledmdio,snps,dwmac-mdio stmmac-axi-config:rx-queues-config:queue0tx-queues-config:queue0phy@fe820000,rockchip,rk3568-naneng-combphy| urefapbpipe  ( >okay:chosen serial2:115200n8gpio-leds ,gpio-ledsled-0 " heartbeat  heartbeat`defaultVpcie30-avdd0v9-regulator,regulator-fixed#pcie30_avdd0v92FX p $pcie30-avdd1v8-regulator,regulator-fixed#pcie30_avdd1v82FXw@pw@$vcc3v3-sys-regulator,regulator-fixed #vcc3v3_sys2FX2Zp2Z!:$vcc5v0-sys-regulator,regulator-fixed #vcc5v0_sys2FXLK@pLK@!:vcc5v-input-regulator,regulator-fixed #vcc5v_input2FXLK@pLK@:!pwm-leds,pwm-leds-multicolormulti-led   2led-red  AB@led-green  AB@led-blue  AB@vbus-typec-regulator,regulator-fixed F Y"`defaultV #vbus_typecXLK@pLK@:vcc3v3-minipcie-regulator,regulator-fixed F Y`defaultV#vcc3v3_minipcieX2Zp2ZU:vcc3v3-ngff-regulator,regulator-fixed F Y"`defaultV #vcc3v3_ngffX2Zp2Z:vcc3v3-pcie30x1-regulator,regulator-fixed F Y"`defaultV#vcc3v3_pcie30x1X2Zp2Z:vcc3v3-pi6c-05-regulator,regulator-fixed F "`defaultV #vcc3v3_pcieX2Zp2Z:U interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0mmc1device_typeregclocks#cooling-cellsenable-methodoperating-points-v2cpu-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsstatusarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fssound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-names#sound-dai-cellsbus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplybus-widthcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr104vmmc-supplyvqmmc-supplynon-removabledma-namesarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsphy-supplyrockchip,usbgrfrockchip,pmugpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsrockchip,phy-grfdata-lanesstdout-pathfunctioncolorlinux,default-triggermax-brightnesspwmsenable-active-highgpio