8θ( /΀ ",pine64,quartz64-arockchip,rk35667Pine64 RK3566 Quartz64-A Boardaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/ethernet@fe010000/mmc@fe2b0000/mmc@fe310000cpus cpu@0cpu,arm,cortex-a55psci%9D cpu@100cpu,arm,cortex-a55psci%9D cpu@200cpu,arm,cortex-a55psci%9D cpu@300cpu,arm,cortex-a55psci%9D opp-table-0,operating-points-v2LDopp-408000000WQ ^ 0l@opp-600000000W#F ^ 0opp-816000000W0, ^ 0}opp-1104000000WAʹ ^ 0opp-1416000000WTfr ^ 0opp-1608000000W_" ^0opp-1800000000WkI ^0display-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc protocol@14Dopp-table-1,operating-points-v2DCopp-200000000W ^ opp-300000000W^ opp-400000000Wׄ^ opp-600000000W#F^ opp-700000000W)'^ opp-800000000W/^B@hdmi-sound,simple-audio-cardHDMIi2sokaysimple-audio-card,codecsimple-audio-card,cpupmu,arm,cortex-a55-pmu0 psci ,arm,psci-1.0smctimer,arm,armv8-timer0   &xin24m ,fixed-clock=n6Mxin24mDxin32k ,fixed-clock=Mxin32k` jdefaultsram@10f000 ,mmio-sram xsram@0,arm,scmi-shmemDsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob _ sata-phy disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob ` sata-phy disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ ref_clksuspend_clkbus_clkhost utmi_wideokay usb2-phy high-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ ref_clksuspend_clkbus_clkhost usb2-phyusb3-phy utmi_wideokayinterrupt-controller@fd400000 ,arm,gic-v3 @F  &A0(;Dusb@fd800000 ,generic-ehci usbokayusb@fd840000 ,generic-ohci usbokayusb@fd880000 ,generic-ehci usbokayusb@fd8c0000 ,generic-ohci usbokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdDio-domains&,rockchip,rk3568-pmu-io-voltage-domainokayJXftsyscon@fdc50000 ,rockchip,rk3566-pipe-grfsysconDsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdDsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconDsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconDsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconDsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀDclock-controller@fdd00000,rockchip,rk3568-pmucruDclock-controller@fdd20000,rockchip,rk3568-cruxin24m G Di2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c .- i2cpclk` jdefault okayregulator@1c ,tcs,tcs4525;vdd_cpuJ 5b0z!Dregulator-state-mempmic@20,rockchip,rk817 "HmclkHMrk808-clkout1rk808-clkout2jdefault`#$ !%!1!=!I!U!a!m!y%DregulatorsDCDC_REG1J bpzq ;vdd_logicregulator-state-mem DCDC_REG2J bpzq;vdd_gpuDDregulator-state-memDCDC_REG3;vcc_ddrregulator-state-memDCDC_REG4J2Zb2Z;vcc_3v3Dregulator-state-memLDO_REG1Jw@bw@ ;vcca1v8_pmuDregulator-state-memw@LDO_REG2J b  ;vdda_0v9DYregulator-state-memLDO_REG3J b  ;vdda0v9_pmuregulator-state-mem LDO_REG4J2Zb2Z ;vccio_acodecDregulator-state-memLDO_REG5Jw@b2Z ;vccio_sdDregulator-state-memLDO_REG6J2Zb2Z ;vcc3v3_pmuDregulator-state-mem2ZLDO_REG7Jw@bw@;vcc_1v8Dregulator-state-memLDO_REG8Jw@bw@ ;vcc1v8_dvpDregulator-state-memLDO_REG9J*b* ;vcc2v8_dvpregulator-state-memBOOSTJLK@bLK@;boostD%regulator-state-memOTG_SWITCH ;otg_switchregulator-state-memserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart t ,baudclkapb_pclk&&`'jdefaultokaypwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk`(jdefault disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk`)jdefault disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk`*jdefault disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk`+jdefault disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller Dpower-domain@7 ,power-domain@8  -./power-domain@9   012power-domain@10  345678power-domain@11  9power-domain@13  :power-domain@14  ;<=power-domain@15 >?@ABgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$()' jobmmugpugpubus%Cokay"DDvideo-codec@fdea0400,rockchip,rk3568-vpu vdpu aclkhclk.E iommu@fdea0800,rockchip,rk3568-iommu@  aclkiface 5DErga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga Zaclkhclksclk&$% Bcoreaxiahb video-codec@fdee0000,rockchip,rk3568-vepu @ aclkhclk.F iommu@fdee0800,rockchip,rk3568-iommu@ ? aclkiface 5DFmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ d biuciuciu-driveciu-sampleNYрBreset disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref BstmmacethgGwHIokayJinputrgmiijdefault`KLMNOP " N 0%Qmdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22DQstmmac-axi-config0:JDGrx-queues-configZDHqueue0tx-queues-configpDIqueue0vop@fe040000 0@vopgamma-lut (%aclkhclkdclk_vp0dclk_vp1dclk_vp2.R okay,rockchip,rk3566-vopports Dport@0 endpoint@2SDZport@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >?  aclkiface5okayDRdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi DpclkdphyT Bapb disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi EpclkdphyU Bapb disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  -((iahbisfrcecrefjdefault `VWX okayYDports port@0endpointZDSport@1endpoint[Dqos@fe128000,rockchip,rk3568-qossyscon D,qos@fe138080,rockchip,rk3568-qossyscon D;qos@fe138100,rockchip,rk3568-qossyscon D<qos@fe138180,rockchip,rk3568-qossyscon D=qos@fe148000,rockchip,rk3568-qossyscon D-qos@fe148080,rockchip,rk3568-qossyscon D.qos@fe148100,rockchip,rk3568-qossyscon D/qos@fe150000,rockchip,rk3568-qossyscon D9qos@fe158000,rockchip,rk3568-qossyscon D3qos@fe158100,rockchip,rk3568-qossyscon D4qos@fe158180,rockchip,rk3568-qossyscon D5qos@fe158200,rockchip,rk3568-qossyscon D6qos@fe158280,rockchip,rk3568-qossyscon D7qos@fe158300,rockchip,rk3568-qossyscon D8qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon D>qos@fe190280,rockchip,rk3568-qossyscon D?qos@fe190300,rockchip,rk3568-qossyscon D@qos@fe190380,rockchip,rk3568-qossyscon DAqos@fe190400,rockchip,rk3568-qossyscon DBqos@fe198000,rockchip,rk3568-qossyscon D:qos@fe1a8000,rockchip,rk3568-qossyscon D0qos@fe1a8080,rockchip,rk3568-qossyscon D1qos@fe1a8100,rockchip,rk3568-qossyscon D2pcie@fe260000,rockchip,rk3568-pcie0@&dbiapbconfig<KJIHGsyspmcmsglegacyerr($aclk_mstaclk_slvaclk_dbipclkauxpci`\\\\ )1 pcie-phyTx @@Bpipe okayjdefault`] ;^ G_legacy-interrupt-controller HD\mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ b biuciuciu-driveciu-sampleNYрBresetokayWa r"{jdefault``abcdmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ c biuciuciu-driveciu-sampleNYрBresetokayWaejdefault `fghispi@fe300000 ,rockchip,sfc0@ exvclk_sfchclk_sfc`jjdefault disabled flash@0,jedec,spi-norn6 mmc@fe310000,rockchip,rk3568-dwcmshc1 {} n6(|zy{}corebusaxiblocktimerokayW i2s@fe400000,rockchip,rk3568-i2s-tdm@ 4=AFqFq?C9mclk_txmclk_rxhclkk ,txPQ Btx-mrx-mokayDi2s@fe410000,rockchip,rk3568-i2s-tdmA 5EIFqFqGK:mclk_txmclk_rxhclkkk ,rxtxRS Btx-mrx-mjdefault`lmnookay 6Di2s@fe420000,rockchip,rk3568-i2s-tdmB 6MFqOO;mclk_txmclk_rxhclkkk ,txrxTBtx-mjdefault`pqrs disabledi2s@fe430000,rockchip,rk3568-i2s-tdmC 7SW<mclk_txmclk_rxhclkkk ,txrxUV Btx-mrx-m disabledpdm@fe440000,rockchip,rk3568-pdmD LZYpdm_clkpdm_hclkk  ,rx`tuvwxyjdefaultXBpdm-m disabledspdif@fe460000,rockchip,rk3568-spdifF f mclkhclk_\k ,txjdefault`zokayDdma-controller@fe530000,arm,pl330arm,primecellS@  Q  apb_pclk hD&dma-controller@fe550000,arm,pl330arm,primecellU@ Q  apb_pclk hDki2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ /HG i2cpclk`{jdefault  disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ 0JI i2cpclk`|jdefault  disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ 1LK i2cpclk`}jdefault okayi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] 2NM i2cpclk`~jdefault  disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ 3PO i2cpclk`jdefault  disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt`  tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia gRQspiclkapb_pclk&& ,txrxjdefault `  disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib hTSspiclkapb_pclk&& ,txrxjdefault`  disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic iVUspiclkapb_pclk&& ,txrxjdefault `  disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid jXWspiclkapb_pclk&& ,txrxjdefault `  disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte ubaudclkapb_pclk&& `jdefaultokay sbluetooth,brcm,bcm43438-btlpo   jdefault ` !  -serial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf v# baudclkapb_pclk&&`jdefaultokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg w'$baudclkapb_pclk&&`jdefault disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth x+(baudclkapb_pclk&& `jdefault disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti y/,baudclkapb_pclk& & `jdefault disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj z30baudclkapb_pclk& & `jdefault disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk {74baudclkapb_pclk&&`jdefault disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl |;8baudclkapb_pclk&&`jdefault disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm }?<baudclkapb_pclk&&`jdefault disabledthermal-zonescpu-thermal d  tripscpu_alert0 p passiveDcpu_alert1 $ passivecpu_crit s  criticalcpu_hot  activeDcooling-mapsmap0 &0 + map1 & +gpu-thermal   tripsgpu-threshold p passivegpu-target $ passiveDgpu-crit s  criticalcooling-mapsmap0 & +tsadc@fe710000,rockchip,rk3568-tsadcq sf@ `tsadcapb_pclk :sjinitdefaultsleep` Q [ eokay { Dsaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr ]saradcapb_pclk Bsaradc-apb  disabledpwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclk`jdefault disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclk`jdefault disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclk`jdefault disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclk`jdefault disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclk`jdefault disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclk`jdefault disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclk`jdefault disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclk`jdefault disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclk`jdefault disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclk`jdefault disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclk`jdefault disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclk`jdefault disabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipe"   okayDphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipe%   okayDphy@fe870000,rockchip,rk3568-csi-dphyypclk Bapb disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz  Bapb disabledDTmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{  Bapb disabledDUusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkMclk_usbphy0_480m  okayDhost-port okayDotg-port okayDusb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkMclk_usbphy1_480m  okayhost-port okayDotg-port okayDpinctrl,rockchip,rk3568-pinctrl  xDgpio@fdd60000,rockchip,gpio-bank !.     +D"gpio@fe740000,rockchip,gpio-bankt "cd    +D^gpio@fe750000,rockchip,gpio-banku #ef  @  +Dgpio@fe760000,rockchip,gpio-bankv $gh  `  +gpio@fe770000,rockchip,gpio-bankw %ij    +Dpcfg-pull-up 7Dpcfg-pull-down DDpcfg-pull-none SDpcfg-pull-none-drv-level-1 S `Dpcfg-pull-none-drv-level-2 S `Dpcfg-pull-none-drv-level-3 S `Dpcfg-pull-up-drv-level-1 7 `Dpcfg-pull-up-drv-level-2 7 `Dpcfg-pull-none-smt S oDacodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 D cpuebcedpdpemmceth0eth1flashfspifspi-pins` Djgmac0gmac1gmac1m0-miim DKgmac1m0-clkinout DOgmac1m0-rx-bus20    DMgmac1m0-tx-bus20  DLgmac1m0-rgmii-clk DNgmac1m0-rgmii-bus@ DPgpuhdmitxhdmitxm0-cec DXhdmitx-scl DVhdmitx-sda DWi2c0i2c0-xfer  D i2c1i2c1-xfer  D{i2c2i2c2m0-xfer D|i2c3i2c3m0-xfer D}i2c4i2c4m0-xfer   D~i2c5i2c5m0-xfer   Di2s1i2s1m0-lrcktx Dmi2s1m0-mclk D$i2s1m0-sclktx Dli2s1m0-sdi0  Dni2s1m0-sdo0 Doi2s2i2s2m0-lrcktx Dqi2s2m0-sclktx Dpi2s2m0-sdi Dri2s2m0-sdo Dsi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk Dtpdmm0-clk1 Dupdmm0-sdi0  Dvpdmm0-sdi1  Dwpdmm0-sdi2  Dxpdmm0-sdi3 Dypmicpmic-int-l D#pmupwm0pwm0m0-pins D(pwm1pwm1m0-pins D)pwm2pwm2m0-pins D*pwm3pwm3-pins D+pwm4pwm4-pins Dpwm5pwm5-pins Dpwm6pwm6-pins Dpwm7pwm7-pins Dpwm8pwm8m0-pins  Dpwm9pwm9m0-pins  Dpwm10pwm10m0-pins  Dpwm11pwm11m0-pins Dpwm12pwm12m0-pins Dpwm13pwm13m0-pins Dpwm14pwm14m0-pins Dpwm15pwm15m0-pins Drefclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ D`sdmmc0-clk Dasdmmc0-cmd Dbsdmmc0-det Dcsdmmc1sdmmc1-bus4@ Dfsdmmc1-clk Dhsdmmc1-cmd Dgsdmmc2spdifspdifm0-tx Dzspi0spi0m0-pins0 Dspi0m0-cs0 Dspi0m0-cs1 Dspi1spi1m1-pins0 Dspi1m1-cs0 Dspi2spi2m0-pins0 Dspi2m0-cs0 Dspi2m0-cs1 Dspi3spi3m0-pins0   Dspi3m0-cs0 Dspi3m0-cs1 Dtsadctsadc-shutorg Dtsadc-pin Duart0uart0-xfer D'uart1uart1m0-xfer   Duart1m0-ctsn Duart1m0-rtsn  Duart2uart2m0-xfer Duart3uart3m0-xfer Duart4uart4m0-xfer Duart5uart5m0-xfer Duart6uart6m0-xfer Duart7uart7m0-xfer Duart8uart8m0-xfer Duart9uart9m0-xfer Dvopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2btbt-enable-h Dbt-host-wake-l Dbt-wake-l Dfanfan-en-h Dledswork-led-enable-h Ddiy-led-enable-h Dpciepcie-enable-h Dpcie-reset-h  D]usb2vcc5v0-usb20-host-en  Dsdio-pwrseqwifi-enable-h Dvcc_sdvcc-sd-h Dchosen serial2:1500000n8external-gmac1-clock ,fixed-clock=sY@ Mgmac1_clkinDJgpio_fan ,gpio-fan A" jdefault`Dhdmi-con,hdmi-connectoraportendpointD[leds ,gpio-ledsled-work work-led off A"jdefault` led-diy diy-led on A" heartbeatjdefault` rk817-sound,simple-audio-cardi2s Analog RK817simple-audio-card,cpusimple-audio-card,codecsdio-pwrseq,mmc-pwrseq-simple ext_clockjdefault` d LK@ ;Despdif-dit,linux,spdif-ditDspdif-sound,simple-audio-cardSPDIFsimple-audio-card,cpusimple-audio-card,codecvcc12v_dcin,regulator-fixed ;vcc12v_dcinJbDvbus,regulator-fixed;vbusJLK@bLK@Dvcc3v3-pcie-p-regulator,regulator-fixed  "jdefault`;vcc3v3_pcie_pJ2Zb2ZD_vcc5v0_usb,regulator-fixed ;vcc5v0_usbJLK@bLK@Dvcc5v0_usb20_host,regulator-fixed   jdefault`;vcc5v0_usb20_hostJLK@bLK@Dvcc5v0_usb20_otg,regulator-fixed   ;vcc5v0_usb20_otgJLK@bLK@%Dvcc3v3_sd,regulator-fixed "jdefault` ;vcc3v3_sdJ2Zb2ZDdvcc_sys,regulator-fixed;vcc_sysJC#bC#D!vcc_wl,regulator-fixed;vcc_wlJ2Zb2Z!Di interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0mmc0mmc1device_typeregclocks#cooling-cellsenable-methodoperating-points-v2cpu-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supplyregulator-off-in-suspendrockchip,system-power-controller#sound-dai-cellswakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphy-handlesnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointavdd-0v9-supplyavdd-1v8-supplybus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplybus-widthcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr104vmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablespi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthmmc-hs200-1_8vdma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsuart-has-rtsctshost-wakeup-gpiosdevice-wakeup-gpiosshutdown-gpiosvbat-supplyvddio-supplymax-speedpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfrockchip,pmugpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsstdout-pathgpio-fan,speed-maplabeldefault-stateretain-state-suspendedlinux,default-triggerpost-power-on-delay-mspower-off-delay-usenable-active-high