*8@( %pine64,pinephone-prorockchip,rk3399 +7Pine64 PinePhonePro=handsetaliasesJ/ethernet@fe300000T/i2c@ff3c0000Y/i2c@ff110000^/i2c@ff120000c/i2c@ff130000h/i2c@ff3d0000m/i2c@ff140000r/i2c@ff150000w/i2c@ff160000|/i2c@ff3e0000/serial@ff180000/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000/mmc@fe310000/mmc@fe320000/mmc@fe330000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53pscid - A Lcpu@1cpuarm,cortex-a53pscid - A Lcpu@2cpuarm,cortex-a53pscid - A Lcpu@3cpuarm,cortex-a53pscid - A Lcpu@100cpuarm,cortex-a72psci  - ALthermal-idleT'`cpu@101cpuarm,cortex-a72psci  - ALthermal-idleT'`idle-statesppscicpu-sleeparm,idle-state}x`L cluster-sleeparm,idle-state}`L display-subsystemrockchip,display-subsystemmemory-controllerrockchip,rk3399-dmcdmc_clk disabledpmu_a53arm,cortex-a53-pmupmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clockn6.xin24mALpcie@f8000000rockchip,rk3399-pcie Naxi-baseapb-basepci+Xiu Gaclkaclk-perfhclkpm0123syslegacyclient` ,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38ւ8(coremgmtmgmt-stickypipepmpclkaclk disabledinterrupt-controllerXLpcie-ep@f8000000rockchip,rk3399-pcie-ep Napb-basemem-base Gaclkaclk-perfhclkpm8(coremgmtmgmt-stickypipepmpclkaclk ,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3 ;defaultI disabledethernet@fe300000rockchip,rk3399-gmac0 macirq8ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macS stmmacethan disabledmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@yр Mbiuciuciu-driveciu-sampleSyresetokay;default Immc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@Ayр  Lbiuciuciu-driveciu-sampleSzresetokay ';defaultI !"#0$<%mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 IN Nclk_xinclk_ahb.emmc_cardclockA& phy_arasanS_okaypLusb@fe380000 generic-ehci8'(usb disabledusb@fe3a0000 generic-ohci:'(usb disabledusb@fe3c0000 generic-ehci<)*usb disabledusb@fe3e0000 generic-ohci> )*usb disableddebug@fe430000&arm,coresight-cpu-debugarm,primecellCM apb_pclkdebug@fe432000&arm,coresight-cpu-debugarm,primecellC M apb_pclkdebug@fe434000&arm,coresight-cpu-debugarm,primecellC@M apb_pclkdebug@fe436000&arm,coresight-cpu-debugarm,primecellC`M apb_pclkdebug@fe610000&arm,coresight-cpu-debugarm,primecellaL apb_pclkdebug@fe710000&arm,coresight-cpu-debugarm,primecellqL apb_pclkusb@fe800000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% usb3-otg disabledusb@fe800000 snps,dwc3irefbus_earlysuspendotg+,usb2-phyusb3-phy utmi_wideS disabledusb@fe900000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk& usb3-otg disabledusb@fe900000 snps,dwc3nrefbus_earlysuspendotg-.usb2-phyusb3-phy utmi_wideS disableddp@fec00000rockchip,rk3399-cdn-dp r  ruocore-clkpclkspdifgrf/0S HJspdifdptxapbcorea% disabledportsport+endpoint@061Lendpoint@162Linterrupt-controller@fee00000 arm,gic-v3X+P  Lmsi-controller@fee20000arm,gic-v3-itsFULppi-partitionsinterrupt-partition-0`Linterrupt-partition-1`Lsaradc@ff100000rockchip,rk3399-saradc>iPesaradcapb_pclk saradc-apbokay{3Lcrypto@ff8b0000rockchip,rk3399-crypto@hclk_masterhclk_slavesclkmasterslavecrypto-rstcrypto@ff8b8000rockchip,rk3399-crypto@hclk_masterhclk_slavesclkmasterslavecrypto-rsti2c@ff110000rockchip,rk3399-i2cA AU i2cpclk;;defaultI4+ disabledi2c@ff120000rockchip,rk3399-i2cB BV i2cpclk#;defaultI5+ disabledi2c@ff130000rockchip,rk3399-i2cC CW i2cpclk";defaultI6+okaytouchscreen@14goodix,gt1158 7  7  7 88i2c@ff140000rockchip,rk3399-i2cD DX i2cpclk&;defaultI9+ disabledi2c@ff150000rockchip,rk3399-i2cE EY i2cpclk%;defaultI:+ disabledi2c@ff160000rockchip,rk3399-i2cF FZ i2cpclk$;defaultI;+ disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclkc ;default I<=>okay$bluetoothbrcm,bcm4345c5?lpo 4@ HZ`;default IABC d s$Dserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclkb ;defaultIE disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclkd ;defaultIFokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclke ;defaultIG disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclkDH H txrx;defaultIIJKL+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\spiclkapb_pclk5H H txrx;defaultIMNOP+ disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]spiclkapb_pclk4HHtxrx;defaultIQRST+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^spiclkapb_pclkCHHtxrx;defaultIUVWX+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclkYY txrx;defaultIZ[\]S+ disabledthermal-zonescpu-thermald^tripscpu_alert0EpassiveL_cpu_alert1 EpassiveL`cpu_crits Ecriticalcooling-mapsmap0_map1`Hgpu-thermald^tripsgpu_alert0$EpassiveLagpu_crits Ecriticalcooling-mapsmap0a btsadc@ff260000rockchip,rk3399-tsadc&aO qOdtsadcapb_pclk tsadc-apbas;initdefaultsleepIcdc%okay;RL^qos@ffa58000rockchip,rk3399-qossyscon Llqos@ffa5c000rockchip,rk3399-qossyscon Lmqos@ffa60080rockchip,rk3399-qossyscon qos@ffa60100rockchip,rk3399-qossyscon qos@ffa60180rockchip,rk3399-qossyscon qos@ffa70000rockchip,rk3399-qossyscon Lpqos@ffa70080rockchip,rk3399-qossyscon Lqqos@ffa74000rockchip,rk3399-qossyscon@ Lnqos@ffa76000rockchip,rk3399-qossyscon` Loqos@ffa90000rockchip,rk3399-qossyscon Lrqos@ffa98000rockchip,rk3399-qossyscon Leqos@ffaa0000rockchip,rk3399-qossyscon Lsqos@ffaa0080rockchip,rk3399-qossyscon Ltqos@ffaa8000rockchip,rk3399-qossyscon Luqos@ffaa8080rockchip,rk3399-qossyscon Lvqos@ffab0000rockchip,rk3399-qossyscon Lfqos@ffab0080rockchip,rk3399-qossyscon Lgqos@ffab8000rockchip,rk3399-qossyscon Lhqos@ffac0000rockchip,rk3399-qossyscon Liqos@ffac0080rockchip,rk3399-qossyscon Ljqos@ffac8000rockchip,rk3399-qossyscon Lwqos@ffac8080rockchip,rk3399-qossyscon Lxqos@ffad0000rockchip,rk3399-qossyscon Lyqos@ffad8080rockchip,rk3399-qossyscon qos@ffae0000rockchip,rk3399-qossyscon Lkpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controllerm+Lpower-domain@34"empower-domain@33!fgmpower-domain@31hmpower-domain@32  ijmpower-domain@35#kmpower-domain@25lmpower-domain@23lmpower-domain@22fmmpower-domain@27Lnmpower-domain@28ompower-domain@8~}mpower-domain@9 mpower-domain@24pqmpower-domain@15m+power-domain@21rrmpower-domain@19stmpower-domain@20uvmpower-domain@16m+power-domain@17wxmpower-domain@18ymsyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2Lio-domains&rockchip,rk3399-pmu-io-voltage-domainokayDspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5zzspiclkapb_pclk<;defaultI{|}~+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7zz"baudclkapb_pclkf ;defaultI disabledi2c@ff3c0000rockchip,rk3399-i2c<z  z z i2cpclk9;defaultI+okaypmic@1crockchip,rk818 A.xin32krk808-clkout2;defaultI$$L?regulatorsDCDC_REG1 &vdd_cpu_l5I[ YsqL regulator-state-memDCDC_REG2 &vdd_center5I[ 5sB@qregulator-state-memDCDC_REG3&vcc_ddr5Iregulator-state-memDCDC_REG4&vcc_1v85I[w@sw@LDregulator-state-memLDO_REG1&vcca3v0_codec[-s-LDO_REG2 &vcc3v0_touch[-s-L8LDO_REG3&vcca1v8_codec[w@sw@LLDO_REG4 &rk818_pwr_on5I[2Zs2Zregulator-state-memLDO_REG5&vcc_3v05I[-s-Lregulator-state-memLDO_REG6&vcc_1v55I[`s`regulator-state-memLDO_REG7 &vcc1v8_dvp[w@sw@LLDO_REG8 &vcc3v3_s35I[2Zs2Zregulator-state-memLDO_REG9 &vccio_sd[w@s2ZL%SWITCH_REG &vcc3v3_s05Iregulator-state-memregulator@40silergy,syr827@;defaultI &vdd_cpu_b[ Ys05ILregulator-state-memregulator@41silergy,syr828A;defaultI&vdd_gpu[ Ys5ILregulator-state-memi2c@ff3d0000rockchip,rk3399-i2c=z  z z i2cpclk8;defaultI+ disabledi2c@ff3e0000rockchip,rk3399-i2c>z  z z i2cpclk:;defaultI+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmB;defaultIzokayLpwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmB;defaultIz disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB ;defaultIz disabledpwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0;defaultIz disableddfi@ff630000c@rockchip,rk3399-dfiy pclk_ddr_mon disabledLvideo-codec@ff650000rockchip,rk3399-vpue rq vepuvdpu aclkhclkSiommu@ff650800rockchip,iommue@s aclkiface SLvideo-codec@ff660000rockchip,rk3399-vdecft axiahbcabaccoreS iommu@ff660480rockchip,iommu f@f@u aclkifaceS  Liommu@ff670800rockchip,iommug@* aclkiface  disabledrga@ff680000rockchip,rk3399-rgah7maclkhclksclkjgi coreaxiahbS!efuse@ff690000rockchip,rk3399-efusei+} pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cdma-controller@ff6d0000arm,pl330arm,primecellm@    apb_pclkLYdma-controller@ff6e0000arm,pl330arm,primecelln@    apb_pclkLHclock-controller@ff750000rockchip,rk3399-pmucruuxin24maA /z(JLzclock-controller@ff760000rockchip,rk3399-cruvxin24maA /@BCxD#g/;рxh<4`#Fׄׄ ׄLsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+Lio-domains"rockchip,rk3399-io-voltage-domainokay < I V% cmipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0wodphy-refdphy-cfggrfS s disabledLusb2phy@e450rockchip,rk3399-usb2phyP{phyclkA.clk_usbphy0_480m disabledL'host-port s linestate disabledL(otg-port s0ghjotg-bvalidotg-idlinestate disabledL+usb2phy@e460rockchip,rk3399-usb2phy`|phyclkA.clk_usbphy1_480m disabledL)host-port s linestate disabledL*otg-port s0lmootg-bvalidotg-idlinestate disabledL-phy@f780rockchip,rk3399-emmc-phy$emmcclk ~2 sokayL&pcie-phyrockchip,rk3399-pcie-phyrefclk sphy disabledLphy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-ref~SLuphyuphy-pipeuphy-tcphya disableddp-port sL/usb3-port sL,phy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-refS Muphyuphy-pipeuphy-tcphya disableddp-port sL0usb3-port sL.watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ pclktimerspdif@ff870000rockchip,rk3399-spdifBYtx mclkhclkU;defaultIS% disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2sa'YYtxrxi2s_clki2s_hclkV;bclk_onbclk_offIS% disabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s(YYtxrxi2s_clki2s_hclkW;defaultIS% disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)YYtxrxi2s_clki2s_hclkXS% disabledLvop@ff8f0000rockchip,rk3399-vop-lit w ׄaclk_vopdclk_vophclk_vopS axiahbdclkokay port+Lendpoint@06Lendpoint@16Lendpoint@26Lendpoint@36Lendpoint@46L2iommu@ff8f3f00rockchip,iommu?w aclkifaceS okayLvop@ff900000rockchip,rk3399-vop-big v ׄaclk_vopdclk_vophclk_vopS axiahbdclkokay port+Lendpoint@06Lendpoint@16Lendpoint@26Lendpoint@36Lendpoint@46L1iommu@ff903f00rockchip,iommu?v aclkifaceS okayLisp0@ff910000rockchip,rk3399-cif-isp@+nispaclkhclkdphyS disabledports+port@0+iommu@ff914000rockchip,iommu @P+ aclkiface S Lisp1@ff920000rockchip,rk3399-cif-isp@,oispaclkhclkdphyS disabledports+port@0+iommu@ff924000rockchip,iommu @P, aclkiface S Lhdmi-soundsimple-audio-card i2s  hdmi-sound disabledsimple-audio-card,cpu simple-audio-card,codec hdmi@ff940000rockchip,rk3399-dw-hdmi(tqpoiahbisfrcecgrfrefSa% disabledLports+port@0+endpoint@06Lendpoint@16Lport@1dsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- porefpclkphy_cfggrfSapba+okay ports+port@0+endpoint@06Lendpoint@16Lport@1+endpoint6Lpanel@0hannstar,hsd060bhw4 %  / :;defaultportendpoint6Ldsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi. qorefpclkphy_cfggrfSapba+ s disabledLports+port@0+endpoint@06Lendpoint@16Lport@1dp@ff970000rockchip,rk3399-edp jlo dppclkgrf;defaultISdpa disabledports+port@0+endpoint@06Lendpoint@16Lport@1gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 jobmmugpuS#okay- GLbpinctrlrockchip,rk3399-pinctrla+gpio@ff720000rockchip,gpio-bankrz S cXLgpio@ff730000rockchip,gpio-banksz S cXLgpio@ff780000rockchip,gpio-bankxP S cXL@gpio@ff788000rockchip,gpio-bankxQ S cXL7gpio@ff790000rockchip,gpio-bankyR S cXLpcfg-pull-up oLpcfg-pull-down |Lpcfg-pull-none Lpcfg-pull-none-12ma  Lpcfg-pull-none-13ma  Lpcfg-pull-none-18ma  pcfg-pull-none-20ma  pcfg-pull-up-2ma o pcfg-pull-up-8ma o pcfg-pull-up-18ma o pcfg-pull-up-20ma o pcfg-pull-down-4ma | pcfg-pull-down-8ma | pcfg-pull-down-12ma | pcfg-pull-down-18ma | pcfg-pull-down-20ma | pcfg-output-high pcfg-output-low pcfg-input-enable pcfg-input-pull-up  opcfg-input-pull-down  |clockclk-32k cifcif-clkin  cif-clkouta  edpedp-hpd Lgmacrgmii-pins     rmii-pins      i2c0i2c0-xfer Li2c1i2c1-xfer L4i2c2i2c2-xfer L5i2c3i2c3-xfer L6i2c4i2c4-xfer   Li2c5i2c5-xfer   L9i2c6i2c6-xfer   L:i2c7i2c7-xfer L;i2c8i2c8-xfer Li2s0i2s0-2ch-bus` i2s0-2ch-bus-bclk-off` i2s0-8ch-bus Li2s0-8ch-bus-bclk-off Li2s1i2s1-2ch-busP Li2s1-2ch-bus-bclk-offP sdio0sdio0-bus1 sdio0-bus4@ Lsdio0-cmd Lsdio0-clk Lsdio0-cd sdio0-pwr sdio0-bkpwr sdio0-wp sdio0-int sdmmcsdmmc-bus1 sdmmc-bus4@    L#sdmmc-clk  L sdmmc-cmd  L!sdmmc-cd L"sdmmc-wp suspendap-pwroff ddrio-pwroff spdifspdif-bus Lspdif-bus-1 spi0spi0-clk LIspi0-cs0 LLspi0-cs1 spi0-tx LJspi0-rx LKspi1spi1-clk  LMspi1-cs0  LPspi1-rx LOspi1-tx LNspi2spi2-clk  LQspi2-cs0  LTspi2-rx  LSspi2-tx  LRspi3spi3-clk L{spi3-cs0 L~spi3-rx L}spi3-tx L|spi4spi4-clk LUspi4-cs0 LXspi4-rx LWspi4-tx LVspi5spi5-clk LZspi5-cs0 L]spi5-rx L\spi5-tx L[testclktest-clkout0 test-clkout1 test-clkout2 tsadcotp-pin Lcotp-out Lduart0uart0-xfer L<uart0-cts L=uart0-rts L>uart1uart1-xfer   LEuart2auart2a-xfer  uart2buart2b-xfer uart2cuart2c-xfer LFuart3uart3-xfer LGuart3-cts uart3-rts uart4uart4-xfer Luarthdcpuarthdcp-xfer pwm0pwm0-pin Lpwm0-pin-pull-down vop0-pwm-pin vop1-pwm-pin pwm1pwm1-pin Lpwm1-pin-pull-down pwm2pwm2-pin Lpwm2-pin-pull-down pwm3apwm3a-pin Lpwm3bpwm3b-pin hdmihdmi-i2c-xfer hdmi-cec pciepci-clkreqn-cpm pci-clkreqnb-cpm Lbuttonspwrbtn-pin Lpmicpmic-int-l Lvsel1-pin Lvsel2-pin Lsdio-pwrseqwifi-enable-h-pin Lsoundvcc1v8-codec-en Lwireless-bluetoothbt-wake-pin LBbt-host-wake-pin LAbt-reset-pin LCopp-table-0operating-points-v2 L opp00 Q  @opp01 #F opp02 0, P Popp03 < HHopp04 G B@B@ disabledopp05 Tfr ** disabledopp-table-1operating-points-v2 L opp00 Q  @opp01 #F opp02 0, opp03 < Y Yopp04 G ~~opp05 Tfr opp06 Yh/ 0opp07 kI OO disabledopp-table-2operating-points-v2Lopp00  0opp01 @ 0opp02 ׄ 0opp03 e Y Y0opp04 #F HH0opp05 / 0chosen serial2:115200n8adc-keys adc-keys  "buttons 3j Mdbutton-up [Volume Up as lbutton-down [Volume Down ar l 'backlightpwm-backlight PLgpio-keys gpio-keys;defaultIkey-power  * [Power atvcc-sys-regulatorregulator-fixed&vcc_sys5ILvcc3v3-sys-regulatorregulator-fixed &vcc3v3_sys5I[2Zs2Z L$vcc1v8-s3-regulatorregulator-fixed &vcca1v8_s3[w@sw@ $5IL3vcc1v8-codec-regulatorregulator-fixed  7;defaultI &vcc1v8_codec[w@sw@ $sdio-wifi-pwrseqmmc-pwrseq-simple? ext_clock;defaultI n '  Lvcc1v8-lcdregulator-fixed  &vcc1v8_lcd[w@sw@ $ 7;defaultLvcc2v8-lcdregulator-fixed  &vcc2v8_lcd[*s* $ 7;defaultL compatibleinterrupt-parent#address-cells#size-cellsmodelchassis-typeethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleduration-usexit-latency-usentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesinterrupt-controllermax-functionsnum-lanesrockchip,max-outbound-regionspinctrl-namespinctrl-0power-domainsrockchip,grfsnps,txpblmax-frequencyfifo-depthbus-widthcap-sd-highspeedcap-sdio-irqdisable-wpkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clocksassigned-clock-ratescd-gpiosvmmc-supplyvqmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs200-1_8vdr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsirq-gpiosreset-gpiosAVDD28-supplyVDDIO-supplytouchscreen-size-xtouchscreen-size-yreg-shiftreg-io-widthuart-has-rtsctsdevice-wakeup-gpioshost-wakeup-gpiosmax-speedshutdown-gpiosvbat-supplyvddio-supplydmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendfcs,suspend-voltage-selector#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmassigned-clock-parentsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiclock-masterbacklightvcc-supplyiovcc-supplymali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltpwmsdebounce-intervalvin-supplyenable-active-highgpiopost-power-on-delay-mspower-off-delay-us