8( @L1hardkernel,rk3326-odroid-go2-v11rockchip,rk3326 + 7ODROID-GO Advance Black Editionaliases=/ethernet@ff360000G/i2c@ff180000L/i2c@ff190000Q/i2c@ff1a0000V/i2c@ff1b0000[/serial@ff030000c/serial@ff158000k/serial@ff160000s/serial@ff168000{/serial@ff170000/serial@ff178000/spi@ff1d0000/spi@ff1d8000/mmc@ff370000/mmc@ff380000cpus+cpu@0cpuarm,cortex-a35psciZcpu@1cpuarm,cortex-a35psciZcpu@2cpuarm,cortex-a35psciZ cpu@3cpuarm,cortex-a35psciZ idle-states$pscicpu-sleeparm,idle-state1BYxjzcluster-sleeparm,idle-state1BYjzopp-table-0operating-points-v2opp-600000000#F ~~p@opp-8160000000, p@opp-1008000000< p@opp-1200000000G   p@opp-1296000000M?d ppp@arm-pmuarm,cortex-a35-pmu0defg display-subsystemrockchip,display-subsystem okayexternal-gmac-clock fixed-clock gmac_clkinpsci arm,psci-1.0smctimerarm,armv8-timer0   thermal-zonessoc-thermal#9GY tripstrip-point-0ipupassivetrip-point-1iLupassive soc-criti8u criticalcooling-mapsmap0  gpu-thermal#d9Y tripsgpu-thresholdipupassivegpu-targetiLupassivegpu-criti8u criticalcooling-mapsmap0 xin24m fixed-clockn6xin24mlpower-management@ff000000$rockchip,px30-pmusysconsimple-mfdpower-controllerrockchip,px30-power-controller+npower-domain@5<power-domain@7;power-domain@9  C@?power-domain@10 @978:power-domain@11 Kpower-domain@12 XD56power-domain@13 (3 !"power-domain@14I#syscon@ff010000'rockchip,px30-pmugrfsysconsimple-mfd+io-domains$rockchip,px30-pmu-io-voltage-domainokay$$reboot-modesyscon-reboot-modeRBRB RB RBRBserial@ff030000$rockchip,px30-uartsnps,dw-apb-uart %%#baudclkapb_pclk/&&4txrx>HUdefault c'() disabledi2s@ff060000rockchip,px30-i2s-tdm  #mclk_txmclk_rxhclk/&&4txrxm*z tx-mrx-mUdefault0c+,-./0123456 disabledi2s@ff070000&rockchip,px30-i2srockchip,rk3066-i2s  #i2s_clki2s_hclk/&&4txrxUdefaultc789:okayi2s@ff080000&rockchip,px30-i2srockchip,rk3066-i2s #i2s_clki2s_hclk/&&4txrxUdefaultc;<=> disabledinterrupt-controller@ff131000 arm,gic-400@ @ `   syscon@ff140000$rockchip,px30-grfsysconsimple-mfd+*io-domains rockchip,px30-io-voltage-domainokay?@??? ?lvdsrockchip,px30-lvdsAdphym*'lvds disabledports+port@0+endpoint@07Bport@1serial@ff158000$rockchip,px30-uartsnps,dw-apb-uart I#baudclkapb_pclk/&&4txrx>HUdefaultcCDokayserial@ff160000$rockchip,px30-uartsnps,dw-apb-uart J#baudclkapb_pclk/&&4txrx>HUdefaultcEokayserial@ff168000$rockchip,px30-uartsnps,dw-apb-uart K#baudclkapb_pclk/&&4txrx>HUdefault cFGH disabledserial@ff170000$rockchip,px30-uartsnps,dw-apb-uart L#baudclkapb_pclk/&& 4txrx>HUdefault cIJK disabledserial@ff178000$rockchip,px30-uartsnps,dw-apb-uart M#baudclkapb_pclk/& & 4txrx>HUdefault cLMN disabledi2c@ff180000&rockchip,px30-i2crockchip,rk3399-i2cN #i2cpclk UdefaultcO+okayG_pmic@20rockchip,rk817  P rk808-clkout1xin32k#mclkUdefaultcQRvSSSSSSSSregulatorsDCDC_REG1 vdd_logic~ 0#q8Lregulator-state-mem^v~DCDC_REG2vdd_arm~ p#q8Lregulator-state-memv~DCDC_REG3vcc_ddr8Lregulator-state-mem^DCDC_REG4vcc_3v32Z 2Z8L?regulator-state-memv2ZLDO_REG2vcc_1v8w@ w@8Lkregulator-state-mem^vw@LDO_REG3vdd_1v0B@ B@8Lregulator-state-mem^vB@LDO_REG4 vcc3v3_pmu2Z 2Z8L$regulator-state-mem^v2ZLDO_REG5 vccio_sdw@ 2Z8L@regulator-state-mem^v2ZLDO_REG6vcc_sd2Z 2ZLwregulator-state-mem^v2ZLDO_REG7vcc_bl2Z 2Zregulator-state-memv2ZLDO_REG8vcc_lcd* *regulator-state-memv*LDO_REG9 vcc_wifi2Z 2Z|regulator-state-mem^v2ZBOOST usb_miduLK@ Re8Lcharger'Tcodec-i2c@ff190000&rockchip,px30-i2crockchip,rk3399-i2cO #i2cpclk UdefaultcU+okayi2c@ff1a0000&rockchip,px30-i2crockchip,rk3399-i2cP #i2cpclk  UdefaultcV+ disabledi2c@ff1b0000&rockchip,px30-i2crockchip,rk3399-i2c Q #i2cpclk  UdefaultcW+ disabledspi@ff1d0000&rockchip,px30-spirockchip,rk3066-spi $U#spiclkapb_pclk/& & 4txrxJUdefaultcXYZ[+ disabledspi@ff1d8000&rockchip,px30-spirockchip,rk3066-spi %V#spiclkapb_pclk/&&4txrxJUdefaultc\]^_`+ disabledwatchdog@ff1e0000rockchip,px30-wdtsnps,dw-wdt[ % disabledpwm@ff200000&rockchip,px30-pwmrockchip,rk3328-pwm "S #pwmpclkUdefaultcaQ disabledpwm@ff200010&rockchip,px30-pwmrockchip,rk3328-pwm "S #pwmpclkUdefaultcbQokaypwm@ff200020&rockchip,px30-pwmrockchip,rk3328-pwm "S #pwmpclkUdefaultccQ disabledpwm@ff200030&rockchip,px30-pwmrockchip,rk3328-pwm 0"S #pwmpclkUdefaultcdQokaypwm@ff208000&rockchip,px30-pwmrockchip,rk3328-pwm #T #pwmpclkUdefaultceQ disabledpwm@ff208010&rockchip,px30-pwmrockchip,rk3328-pwm #T #pwmpclkUdefaultcfQ disabledpwm@ff208020&rockchip,px30-pwmrockchip,rk3328-pwm #T #pwmpclkUdefaultcgQ disabledpwm@ff208030&rockchip,px30-pwmrockchip,rk3328-pwm 0#T #pwmpclkUdefaultchQ disabledtimer@ff210000*rockchip,px30-timerrockchip,rk3288-timer! Y& #pclktimerdma-controller@ff240000arm,pl330arm,primecell$@\ #apb_pclks&tsadc@ff280000rockchip,px30-tsadc( $~,P,X#tsadcapb_pclkz tsadc-apbm*Uinitdefaultsleepcijiokay saradc@ff288000,rockchip,px30-saradcrockchip,rk3399-saradc( T-W#saradcapb_pclkz saradc-apbokayknvmem@ff290000rockchip,px30-otp)@/Za#otpapb_pclkphyzphy+id@7cpu-leakage@17performance@1eclock-controller@ff2b0000rockchip,px30-cru+ l% #xin24mgpllm*8~@IFq рр clock-controller@ff2bc000rockchip,px30-pmucru+l#xin24mm*~%%% G%syscon@ff2c0000,rockchip,px30-usb2phy-grfsysconsimple-mfd,+usb2phy@100rockchip,px30-usb2phy % #phyclk~m usb480m_phyokaymhost-port+ D 6linestateokaypotg-port+$BA@6otg-bvalidotg-idlinestate disabledophy@ff2e0000rockchip,px30-dsi-dphy.% E #refpclkz>apb+Fn okayAphy@ff2f0000rockchip,px30-csi-dphy/@F#pclk+Fn z/apbm* disabledusb@ff3000000rockchip,px30-usbrockchip,rk3066-usbsnps,dwc20 >#otgTotg\n}@ o usb2-phyFnokayusb@ff340000 generic-ehci4 <pusbFn disabledusb@ff350000 generic-ohci5 =pusbFn disabledethernet@ff360000rockchip,px30-gmac6 +6macirq@>??@ACL[#stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macclk_mac_speedm*rmiiUdefaultcqrFn z^ stmmaceth disabledmmc@ff370000.rockchip,px30-dw-mshcrockchip,rk3288-dw-mshc7@ 6 ;CD#biuciuciu-driveciu-sampleрUdefaultcstuvFnokay P w%@mmc@ff380000.rockchip,px30-dw-mshcrockchip,rk3288-dw-mshc8@ 7 8EF#biuciuciu-driveciu-sampleрUdefault cxyzFn okay2?J`{k|+wifi@1 esp,esp8089mmc@ff390000.rockchip,px30-dw-mshcrockchip,rk3288-dw-mshc9@ 5 9GH#biuciuciu-driveciu-sampleрUdefault c}~Fn  disabledspi@ff3a0000 rockchip,sfc:@ 8:#clk_sfchclk_sfc cUdefaultFn okay+flash@0jedec,spi-noryonand-controller@ff3b0000rockchip,px30-nfc;@ 97#ahbnfc~7рUdefault cFn  disabledopp-table-1operating-points-v2opp-200000000 ~opp-300000000opp-400000000ׄopp-4800000008*gpu@ff400000$rockchip,px30-maliarm,mali-bifrost@@$/.- 6jobmmugpuIFnokayvideo-codec@ff442000rockchip,px30-vpuD PO 6vepuvdpu #aclkhclkFn iommu@ff442800rockchip,iommuD( Q #aclkifaceFn dsi@ff450000(rockchip,px30-mipi-dsisnps,dw-mipi-dsiE KD#pclkAdphyFn z=apbm*+okayports+port@0+endpoint@07port@1endpoint7panel@0 elida,kd35t133portendpoint7vop@ff460000rockchip,px30-vop-bigF M#aclk_vopdclk_vophclk_vopz345 axiahbdclkFn okayport+ endpoint@07endpoint@17Biommu@ff460f00rockchip,iommuF M #aclkifaceFn okayisp@ff4a0000rockchip,px30-cif-ispJ$FIJ 6ispmimipi 3_#ispaclkhclkpclkdphyFn  disabledports+port@0+iommu@ff4a8000rockchip,iommuJ F #aclkifaceFn  qos@ff518000rockchip,px30-qossysconQ qos@ff520000rockchip,px30-qossysconR #qos@ff52c000rockchip,px30-qossysconR qos@ff538000rockchip,px30-qossysconS qos@ff538080rockchip,px30-qossysconS qos@ff538100rockchip,px30-qossysconS qos@ff538180rockchip,px30-qossysconS qos@ff540000rockchip,px30-qossysconT qos@ff540080rockchip,px30-qossysconT qos@ff548000rockchip,px30-qossysconT qos@ff548080rockchip,px30-qossysconT qos@ff548100rockchip,px30-qossysconT  qos@ff548180rockchip,px30-qossysconT !qos@ff548200rockchip,px30-qossysconT "qos@ff550000rockchip,px30-qossysconU qos@ff550080rockchip,px30-qossysconU qos@ff550100rockchip,px30-qossysconU qos@ff550180rockchip,px30-qossysconU qos@ff558000rockchip,px30-qossysconU qos@ff558080rockchip,px30-qossysconU pinctrlrockchip,px30-pinctrlm* + ,gpio@ff040000rockchip,gpio-bank % 3 CPgpio@ff250000rockchip,gpio-bank% \ 3 Cgpio@ff260000rockchip,gpio-bank& ] 3 Cgpio@ff270000rockchip,gpio-bank' ^ 3 Cpcfg-pull-up Opcfg-pull-down \pcfg-pull-none kpcfg-pull-none-2ma k xpcfg-pull-up-2ma O xpcfg-pull-up-4ma O xpcfg-pull-none-4ma k xpcfg-pull-down-4ma \ xpcfg-pull-none-8ma k xpcfg-pull-up-8ma O xpcfg-pull-none-12ma k x pcfg-pull-up-12ma O x pcfg-pull-none-smt k pcfg-output-high pcfg-output-low pcfg-input-high O pcfg-input i2c0i2c0-xfer  Oi2c1i2c1-xfer Ui2c2i2c2-xfer Vi2c3i2c3-xfer   Wtsadctsadc-otp-pin itsadc-otp-out juart0uart0-xfer  'uart0-cts (uart0-rts )uart1uart1-xfer Cuart1-cts Duart1-rts uart2-m0uart2m0-xfer uart2-m1uart2m1-xfer  Euart3-m0uart3m0-xfer uart3m0-cts uart3m0-rts uart3-m1uart3m1-xfer Fuart3m1-cts  Guart3m1-rts  Huart4uart4-xfer Iuart4-cts Juart4-rts Kuart5uart5-xfer Luart5-cts Muart5-rts Nspi0spi0-clk Xspi0-csn Yspi0-miso  Zspi0-mosi  [spi0-clk-hs spi0-miso-hs  spi0-mosi-hs  spi1spi1-clk \spi1-csn0  ]spi1-csn1  ^spi1-miso _spi1-mosi  `spi1-clk-hs spi1-miso-hs spi1-mosi-hs  pdmpdm-clk0m0 pdm-clk0m1 pdm-clk1 pdm-sdi0m0 pdm-sdi0m1 pdm-sdi1 pdm-sdi2 pdm-sdi3 pdm-clk0m0-sleep pdm-clk0m1-sleep pdm-clk1-sleep pdm-sdi0m0-sleep pdm-sdi0m1-sleep pdm-sdi1-sleep pdm-sdi2-sleep pdm-sdi3-sleep i2s0i2s0-8ch-mclk i2s0-8ch-sclktx +i2s0-8ch-sclkrx  ,i2s0-8ch-lrcktx -i2s0-8ch-lrckrx  .i2s0-8ch-sdo0 /i2s0-8ch-sdo1 1i2s0-8ch-sdo2 3i2s0-8ch-sdo3 5i2s0-8ch-sdi0 0i2s0-8ch-sdi1  2i2s0-8ch-sdi2  4i2s0-8ch-sdi3 6i2s1i2s1-2ch-mclk Ri2s1-2ch-sclk 7i2s1-2ch-lrck 8i2s1-2ch-sdi 9i2s1-2ch-sdo :i2s2i2s2-2ch-mclk i2s2-2ch-sclk ;i2s2-2ch-lrck <i2s2-2ch-sdi =i2s2-2ch-sdo >sdmmcsdmmc-clk ssdmmc-cmd tsdmmc-det usdmmc-bus1 sdmmc-bus4@ vsdiosdio-clk zsdio-cmd ysdio-bus4@ xemmcemmc-clk  }emmc-cmd  ~emmc-rstnout  emmc-bus1 emmc-bus4@ emmc-bus8 flashflash-cs0 flash-rdy  flash-dqs  flash-ale  flash-cle  flash-wrn  flash-csl flash-rdn flash-bus8 sfcsfc-bus4@ sfc-bus2 sfc-cs0 sfc-clk  lcdclcdc-rgb-dclk-pin lcdc-rgb-m0-hsync-pin lcdc-rgb-m0-vsync-pin lcdc-rgb-m0-den-pin lcdc-rgb888-m0-data-pins      lcdc-rgb666-m0-data-pins      lcdc-rgb565-m0-data-pins      lcdc-rgb888-m1-data-pins    lcdc-rgb666-m1-data-pins    lcdc-rgb565-m1-data-pins    pwm0pwm0-pin apwm1pwm1-pin bpwm2pwm2-pin  cpwm3pwm3-pin dpwm4pwm4-pin epwm5pwm5-pin fpwm6pwm6-pin gpwm7pwm7-pin hgmacrmii-pins  qmac-refclk-12ma  rmac-refclk  cif-m0cif-clkout-m0  dvp-d2d9-m0    dvp-d0d1-m0  d10-d11-m0 cif-m1cif-clkout-m1 dvp-d2d9-m1   dvp-d0d1-m1 d10-d11-m1 ispisp-prelight btnsbtn-pins    headphonehp-det ledsred-led-pin pmicdc-det pmic-int Qsoc_slppin_gpio soc_slppin_rst soc_slppin_slp wifiwifi-pwrseq-pins  chosen serial2:115200n8backlightpwm-backlight  agpio-keys gpio-keysUdefaultcbutton-sw1   DPAD-UP  button-sw2   DPAD-DOWN !button-sw3  DPAD-LEFT "button-sw4  DPAD-RIGHT #button-sw5  BTN-A 1button-sw6  BTN-B 0button-sw7  BTN-Y 4button-sw8  BTN-X 3button-sw9  F1 button-sw10  F2 button-sw11  F3 button-sw12  F4 button-sw13  F5 button-sw14  F6 button-sw15  TOP-LEFT 6button-sw16  TOP-RIGHT 7button-sw20  TOP-LEFT 2 8button-sw21   TOP-RIGHT 2 9gpio-leds gpio-ledsUdefaultcled-3  P  chargingled-controller pwm-ledsled-2  status heartbeat " ark817-soundsimple-audio-card 1rk817_int Hi2s a 9 MicrophoneMic JackHeadphoneHeadphonesSpeakerSpeaker; MICLMic JackHeadphonesHPOLHeadphonesHPORSpeakerSPKOsimple-audio-card,codec simple-audio-card,cpu vccsysregulator-fixed vcc3v8_sys89 9Svcc_hostregulator-fixed vcc_hostLK@ LK@ zP 8L adc-joystick adc-joystick  <+axis@0     ! axis@1     !/ batterysimple-battery +- M j @@   > 5g  +=fd=_<Z;NU;UBP:ZK:vF9ZA9~<9'r7828-8hP(8=#8F777x<70 66Twifi-pwrseqmmc-pwrseq-simpleUdefaultc  { compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3serial0serial1serial2serial3serial4serial5spi0spi1mmc0mmc1device_typeregenable-methodclocks#cooling-cellscpu-idle-statesdynamic-power-coefficientoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendinterruptsinterrupt-affinityportsstatusclock-frequencyclock-output-names#clock-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontribution#power-domain-cellspm_qospmuio1-supplypmuio2-supplyoffsetmode-bootloadermode-fastbootmode-loadermode-normalmode-recoveryclock-namesdmasdma-namesreg-shiftreg-io-widthpinctrl-namespinctrl-0rockchip,grfresetsreset-names#sound-dai-cells#interrupt-cellsinterrupt-controllervccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyphysphy-namesrockchip,outputremote-endpointi2c-scl-falling-time-nsi2c-scl-rising-time-nswakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onregulator-on-in-suspendregulator-suspend-microvoltregulator-off-in-suspendrockchip,resistor-sense-micro-ohmsrockchip,sleep-enter-current-microamprockchip,sleep-filter-current-microampmonitored-batteryrockchip,mic-in-differentialnum-cs#pwm-cellsarm,pl330-periph-burst#dma-cellsassigned-clocksassigned-clock-ratesrockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cells#io-channel-cellsvref-supplybits#reset-cellsassigned-clock-parents#phy-cellsinterrupt-namespower-domainsdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy-modebus-widthfifo-depthmax-frequencycap-sd-highspeedcard-detect-delaycd-gpiossd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplycap-sdio-irqdisable-wpkeep-power-in-suspendmmc-pwrseqnon-removablespi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthmali-supplyiommus#iommu-cellsbacklightreset-gpiosrotationiovcc-supplyvdd-supplyrockchip,disable-mmu-resetrockchip,pmurangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enableoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathpower-supplypwmslabellinux,codecolorfunctionlinux,default-triggermax-brightnesssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,hp-det-gpiosimple-audio-card,mclk-fssimple-audio-card,widgetssimple-audio-card,routingsound-daienable-active-highvin-supplyio-channelspoll-intervalabs-flatabs-fuzzabs-rangecharge-full-design-microamp-hourscharge-term-current-microampconstant-charge-current-max-microampconstant-charge-voltage-max-microvoltfactory-internal-resistance-micro-ohmsvoltage-max-design-microvoltvoltage-min-design-microvoltocv-capacity-celsiusocv-capacity-table-0