8d( , ,handset9Sony Xperia 1 IV?sony,pdx223qcom,sm8450chosenJserial0:115200n8clocksxo-board ?fixed-clockVcssleep-clk ?fixed-clockVc}s+cpus cpu@0{cpu ?qcom,kryo780pscipscisl2-cache?cachesl3-cache?cachescpu@100{cpu ?qcom,kryo780pscipscisl2-cache?cachescpu@200{cpu ?qcom,kryo780psci pscisl2-cache?cachescpu@300{cpu ?qcom,kryo780psci  pscisl2-cache?caches cpu@400{cpu ?qcom,kryo780psci  pscisl2-cache?caches cpu@500{cpu ?qcom,kryo780pscipscisl2-cache?cachescpu@600{cpu ?qcom,kryo780pscipscisl2-cache?cachescpu@700{cpu ?qcom,kryo780pscipscisl2-cache?cachescpu-mapcluster0core0 core1 core2 core3 core4 core5 core6 core7 idle-statespscicpu-sleep-0-0?arm,idle-statesilver-rail-power-collapse-@D Uevs!cpu-sleep-1-0?arm,idle-stategold-rail-power-collapse-@DXUevs"domain-idle-statescluster-sleep-0?domain-idle-state-ADDU es#cluster-sleep-1?domain-idle-state-ADD U e6s$firmwarescm?qcom,scm-sm8450qcom,scm0interconnect-0?qcom,sm8450-clk-virts3interconnect-1?qcom,sm8450-mc-virtsmemory@a0000000{memorypmu?arm,armv8-pmuv3 psci ?arm,psci-1.0smcpower-domain-cpu0 !spower-domain-cpu1 !spower-domain-cpu2 !s power-domain-cpu3 !s power-domain-cpu4 "s power-domain-cpu5 "spower-domain-cpu6 "spower-domain-cpu7 "spower-domain-cpu-cluster0#$s opp-table-qup?operating-points-v2sRopp-50000000%opp-75000000xh&opp-100000000'reserved-memory memory@80000000`$memory@80600000`$memory@80640000d$memory@807c0000|$memory@80800000$memory@80860000 ?qcom,cmd-db$memory@80880000$memory@808a0000$memory@808e0000@$memory@808e4000@$memory@80900000 ?qcom,smem +($memory@80b00000$memory@80c00000`$memory@85700000p$smemory@88000000$smemory@89900000$smemory@8b900000$memory@8b910000$memory@8b91a000 $memory@8ba00000$memory@8bb80000$memory@8bbe0000$memory@8bc00000 $smemory@9ee00000p$memory@9f500000P$memory@9fd00000p$memory@a6e00000$memory@a6f00000$memory@bb000000$memory@c0000000 $memory@e0000000`$memory@e0600000`@$memory@e0a00000$memory@e0b000000$memory@e55f3000_0$memory@e55fc000_@$memory@e5600000`$memory@e8800000$memory@e8900000 $memory@e9b00000P$memory@ea000000$memory@ed900000$memory@f3300000?qcom,rmtfs-mem0($3Bramoops@ffc00000?ramoops LYe$smp2p-adsp ?qcom,smp2pnx) )master-kernelmaster-kernelsslave-kernel slave-kernelssmp2p-cdsp ?qcom,smp2pn^x) )master-kernelmaster-kernelsslave-kernel slave-kernelssmp2p-modem ?qcom,smp2pnx) )master-kernelmaster-kernelsslave-kernel slave-kernelsipa-ap-to-modemipaipa-modem-to-apipasmp2p-slpi ?qcom,smp2pnx) )master-kernelmaster-kernelsslave-kernel slave-kernelssoc@0  ?simple-busclock-controller@100000?qcom,gcc-sm8450BV8*+,-.../ bi_tcxosleep_clkpcie_0_pipe_clkpcie_1_pipe_clkpcie_1_phy_aux_clkufs_phy_rx_symbol_0_clkufs_phy_rx_symbol_1_clkufs_phy_tx_symbol_0_clkusb3_phy_wrapper_gcc_usb30_pipe_clks1dma-controller@800000(?qcom,sm8450-gpi-dmaqcom,sm6350-gpi-dmaLMNOPQRSTUVW! .~ ?0Fokays6geniqup@8c0000?qcom,geni-se-qup   m-ahbs-ahb11 ?0 Fokayi2c@880000?qcom,geni-i2c@ se1xMdefault[2 u H3345 equp-corequp-configqup-memory x66}txrxFokaycspi@880000?qcom,geni-spi@ se1x uMdefault[7803345 equp-corequp-config x66}txrx  Fdisabledi2c@884000?qcom,geni-i2c@@ se1zMdefault[9 G H3345 equp-corequp-configqup-memory x66}txrx Fdisabledspi@884000?qcom,geni-spi@@ se1z GMdefault[:;03345 equp-corequp-config x66}txrx  Fdisabledi2c@888000?qcom,geni-i2c@ se1|Mdefault[< H H3345 equp-corequp-configqup-memory x66}txrx Fdisabledspi@888000?qcom,geni-spi@ se1| HMdefault[=>03345 equp-corequp-config x66}txrx  Fdisabledi2c@88c000?qcom,geni-i2c@ se1~Mdefault[? I H3345 equp-corequp-configqup-memory x66}txrx Fdisabledspi@88c000?qcom,geni-spi@ se1~ IMdefault[@A03345 equp-corequp-config x66}txrx  Fdisabledi2c@890000?qcom,geni-i2c@ se1Mdefault[B J H3345 equp-corequp-configqup-memory x66}txrxFokaycB@spi@890000?qcom,geni-spi@ se1 JMdefault[CD03345 equp-corequp-config x66}txrx  Fdisabledi2c@894000?qcom,geni-i2c@@ se1Mdefault[E K H3345 equp-corequp-configqup-memory x66}txrx Fdisabledserial@894000?qcom,geni-uart@@ se1Mdefault[F K0335Gequp-corequp-config Fdisabledspi@894000?qcom,geni-spi@@ se1 KMdefault[HI03345 equp-corequp-config x66}txrx  Fdisabledi2c@898000?qcom,geni-i2c@ se1Mdefault[J C H3345 equp-corequp-configqup-memory x66}txrx Fdisabledspi@898000?qcom,geni-spi@ se1 CMdefault[KL03345 equp-corequp-config x66}txrx  Fdisableddma-controller@900000(?qcom,sm8450-gpi-dmaqcom,sm6350-gpi-dma! .~ ?0FokaysNgeniqup@9c0000?qcom,geni-se-qup   m-ahbs-ahb11 ?033 equp-core Fokayi2c@980000?qcom,geni-i2c@ se1VMdefault[M Y H3345 equp-corequp-configqup-memory xNN}txrx Fdisabledspi@980000?qcom,geni-spi@ se1V YMdefault[OPQRH3345 equp-corequp-configqup-memory xNN}txrx  Fdisabledi2c@984000?qcom,geni-i2c@@ se1XMdefault[S Z H3345 equp-corequp-configqup-memory xNN}txrx Fdisabledspi@984000?qcom,geni-spi@@ se1X ZMdefault[TUH3345 equp-corequp-configqup-memory xNN}txrx  Fdisabledi2c@988000?qcom,geni-i2c@ se1ZMdefault[V [ H3345 equp-corequp-configqup-memory xNN}txrx Fdisabledspi@988000?qcom,geni-spi@ se1Z [Mdefault[WXH3345 equp-corequp-configqup-memory xNN}txrx  Fdisabledi2c@98c000?qcom,geni-i2c@ se1\Mdefault[Y \ H3345 equp-corequp-configqup-memory xNN}txrx Fdisabledspi@98c000?qcom,geni-spi@ se1\ \Mdefault[Z[H3345 equp-corequp-configqup-memory xNN}txrx  Fdisabledi2c@990000?qcom,geni-i2c@ se1^Mdefault[\ ] H3345 equp-corequp-configqup-memory xNN}txrxFokayctouchscreen@48?samsung,s6sy761H] ^_Mdefault[`aspi@990000?qcom,geni-spi@ se1^ ]Mdefault[bcQRH3345 equp-corequp-configqup-memory xNN}txrx  Fdisabledi2c@994000?qcom,geni-i2c@@ se1`Mdefault[d ^ H3345 equp-corequp-configqup-memory xNN}txrxFokaycpmic@75 ?dlg,slg51000u eMdefault[fregulatorsldo1slg51000_a_ldo1$2Zldo2slg51000_a_ldo2$2Zldo3slg51000_a_ldo3O98pldo4slg51000_a_ldo4O98pldo5slg51000_a_ldo5 Oldo6slg51000_a_ldo6 Oldo7slg51000_a_ldo7O98pspi@994000?qcom,geni-spi@@ se1` ^Mdefault[ghH3345 equp-corequp-configqup-memory xNN}txrx  Fdisabledi2c@998000?qcom,geni-i2c@ se1bMdefault[i _ H3345 equp-corequp-configqup-memory xNN}txrx Fdisabledspi@998000?qcom,geni-spi@ se1b _Mdefault[jkH3345 equp-corequp-configqup-memory xNN}txrx  Fdisabledserial@99c000?qcom,geni-debug-uart@ se1dMdefault[lm `0335Gequp-corequp-configFokaydma-controller@a00000(?qcom,sm8450-gpi-dmaqcom,sm6350-gpi-dma%&'()*! .~ ?0VFokaysogeniqup@ac0000?qcom,geni-se-qup`  m-ahbs-ahb11 ?0C33 equp-core Fokayi2c@a80000?qcom,geni-i2c@ se1hMdefault[n a H3345 equp-corequp-configqup-memory xoo}txrx Fdisabledspi@a80000?qcom,geni-spi@ se1h aMdefault[pqH3345 equp-corequp-configqup-memory xoo}txrx  Fdisabledi2c@a84000?qcom,geni-i2c@@ se1jMdefault[r b H3345 equp-corequp-configqup-memory xoo}txrxFokaycspi@a84000?qcom,geni-spi@@ se1j bMdefault[stH3345 equp-corequp-configqup-memory xoo}txrx  Fdisabledi2c@a88000?qcom,geni-i2c@ se1lMdefault[u c H3345 equp-corequp-configqup-memory xoo}txrx Fdisabledspi@a88000?qcom,geni-spi@ se1l cMdefault[vwH3345 equp-corequp-configqup-memory xoo}txrx Fokayi2c@a8c000?qcom,geni-i2c@ se1nMdefault[x d H3345 equp-corequp-configqup-memory xoo}txrx Fdisabledspi@a8c000?qcom,geni-spi@ se1n dMdefault[yzH3345 equp-corequp-configqup-memory xoo}txrx  Fdisabledi2c@a90000?qcom,geni-i2c@ se1pMdefault[{ e H3345 equp-corequp-configqup-memory xoo}txrx Fdisabledspi@a90000?qcom,geni-spi@ se1p eMdefault[|}H3345 equp-corequp-configqup-memory xoo}txrx  Fdisabledi2c@a94000?qcom,geni-i2c@@ se1rMdefault[~ fH3345 equp-corequp-configqup-memory xoo}txrx  Fdisabledspi@a94000?qcom,geni-spi@@ se1r fMdefault[H3345 equp-corequp-configqup-memory xoo}txrx  Fdisabledi2c@a98000?qcom,geni-i2c@ se1tMdefault[ kH3345 equp-corequp-configqup-memory xoo}txrx FokaycB@speaker-amp@40?cirrus,cs35l41@] ] %@\tspeaker-amp@41?cirrus,cs35l41A] ] %@\tspi@a98000?qcom,geni-spi@ se1t kMdefault[H3345 equp-corequp-configqup-memory xoo}txrx  Fdisabledrng@10c3000!?qcom,sm8450-prng-eeqcom,prng-ee 0pci@1c00000?qcom,pcie-sm8450-pcie0P0`` ``parfdbielbiatuconfig{pci 8` `0`0 YY msi \1617,*1/11131819111 ] pipepipe_muxphy_piperefauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbuaggre0aggre1 *0041;pci1G,Lpciephy V]^ b]`Mdefault[Fokaymphy@1c06000 ?qcom,sm8450-qmp-gen3x1-pcie-phy`  1/111214 auxcfg_ahbrefrefgen41;phy|14Fokayphy@1c06200@npbf16 pipe0Vpcie_0_pipe_clks,pci@1c08000?qcom,pcie-sm8450-pcie1P0@@ @@parfdbielbiatuconfig{pci 8@ @0@0 ZZ 3msi T1C1D-*1:1<1>1E1F11 V pipepipe_muxphy_piperefauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbuaggre1 *0041 ;pci1G-Lpciephy V]a b]cMdefault[ Fdisabledphy@1c0f000 ?qcom,sm8450-qmp-gen4x2-pcie-phy  1?1<1=1A auxcfg_ahbrefrefgen41 ;phy|1A Fdisabledphy@1c0e000` 1C pipe0Vpcie_1_pipe_clks-interconnect@1500000?qcom,sm8450-config-nocPsGinterconnect@1680000?qcom,sm8450-system-nochs4interconnect@16c0000?qcom,sm8450-pcie-anoclinterconnect@16e0000?qcom,sm8450-aggre1-nocn1 1 sinterconnect@1700000?qcom,sm8450-aggre2-nocp 11 1 * sinterconnect@1740000?qcom,sm8450-mmss-noctshwlock@1f40000?qcom,tcsr-mutexs(syscon@1fc0000?qcom,sm8450-tcsrsysconsphy@88e30000?qcom,sm8450-usb-hs-phyqcom,usb-snps-hs-7nm-phy0Fokay* ref41sphy@88e8000?qcom,sm8450-qmp-usb3-dp-phy0 1*11 auxrefcom_auxusb3_pipe411 ;phycommonVFokays/ports port@0endpointport@1endpointport@2endpointremoteproc@2400000?qcom,sm8450-slpi-pas@@<x #wdogfatalreadyhandoverstop-ack* xoQQlcxlmx  1stopFokay!Gqcom/sm8450/Sony/nagara/slpi.mbnglink-edgex) )Uslpifastrpc ?qcom,fastrpc[fastrpcglink-apps-dspUsdsp compute-cb@1?qcom,fastrpc-compute-cb ?0Acompute-cb@2?qcom,fastrpc-compute-cb ?0Bcompute-cb@3?qcom,fastrpc-compute-cb ?0Ccodec@31e0000?qcom,sm8450-lpass-wsa-macro4DEfg mclknplmacrodcodecfsgen|DE$$V wsa2-mclkMdefault[ssoundwire@31f0000?qcom,soundwire-v1.7.0   ifaceUWSA2o~??   "?  Fdisabledcodec@3200000?qcom,sm8450-lpass-rx-macro 4@Ffg mclknplmacrodcodecfsgen|@F$$VmclkMdefault[ssoundwire@3210000?qcom,soundwire-v1.7.0!   ifaceURXo~  "?  Fdisabledcodec@3220000?qcom,sm8450-lpass-tx-macro"4@Ffg mclknplmacrodcodecfsgen|@F$$VmclkMdefault[scodec@3240000?qcom,sm8450-lpass-wsa-macro$4BCfg mclknplmacrodcodecfsgen|BC$$VmclkMdefault[ssoundwire@3250000?qcom,soundwire-v1.7.0%   ifaceUWSAo~??   "?  Fdisabledsoundwire@33b0000?qcom,soundwire-v1.7.0;  corewakeup ifaceUTXo~"?  Fdisabledcodec@33f0000?qcom,sm8450-lpass-va-macro?09fgF mclkmacrodcodecnpl |9$Vfsgen Fdisabledsremoteproc@30000000?qcom,sm8450-adsp-pas0<x#wdogfatalreadyhandoverstop-ack* xoQQlcxlmx  1stopFokay!Gqcom/sm8450/Sony/nagara/adsp.mbnglink-edgex) )Ulpassgpr ?qcom,gpr [adsp_appsWc service@1 ?qcom,q6apmpavs/audiomsm/adsp/audio_pddais?qcom,q6apm-dais ?0bedais?qcom,q6apm-lpass-daisservice@2 ?qcom,q6prmpavs/audiomsm/adsp/audio_pdclock-controller?qcom,q6prm-lpass-clocksVsfastrpc ?qcom,fastrpc[fastrpcglink-apps-dspUadsp compute-cb@3?qcom,fastrpc-compute-cb ?0compute-cb@4?qcom,fastrpc-compute-cb ?0compute-cb@5?qcom,fastrpc-compute-cb ?0remoteproc@32300000?qcom,sm8450-cdsp-pas20@@xB#wdogfatalreadyhandoverstop-ack* xoQQ cxmxc  1stopFokay!Gqcom/sm8450/Sony/nagara/cdsp.mbnglink-edgex) )Ucdspfastrpc ?qcom,fastrpc[fastrpcglink-apps-dspUcdsp compute-cb@1?qcom,fastrpc-compute-cb?0!a0! compute-cb@2?qcom,fastrpc-compute-cb?0!b0" compute-cb@3?qcom,fastrpc-compute-cb?0!c0# compute-cb@4?qcom,fastrpc-compute-cb?0!d0$ compute-cb@5?qcom,fastrpc-compute-cb?0!e0% compute-cb@6?qcom,fastrpc-compute-cb?0!f0& compute-cb@7?qcom,fastrpc-compute-cb?0!g0' compute-cb@8?qcom,fastrpc-compute-cb?0!h0( remoteproc@4080000?qcom,sm8450-mpss-pas@@Lx0wdogfatalreadyhandoverstop-ackshutdown-ack* xoQQ cxmss  1stop Fdisabledglink-edgex) )Umodemclock-controller@aaf0000?qcom,sm8450-videocc *1Q&Vcci@ac15000!?qcom,sm8450-cciqcom,msm8996-cci P ({ - camnoc_axislow_ahb_srccpas_ahbccicci_src[Mdefaultsleep Fdisabled i2c-bus@0cB@ i2c-bus@1cB@ cci@ac16000!?qcom,sm8450-cciqcom,msm8996-cci ` ({ - camnoc_axislow_ahb_srccpas_ahbccicci_src[Mdefaultsleep Fdisabled i2c-bus@0cB@ i2c-bus@1cB@ clock-controller@ade0000?qcom,sm8450-camcc 1**+Q&V Fdisabledsdisplay-subsystem@ae00000?qcom,sm8450-mdss mdssH5Gemdp0-memmdp1-memcpu-cfg4 11< S ?0(  Fdisabledsdisplay-controller@ae01000?qcom,sm8450-dpu   mdpvbif011?<K! busnrt_busifacelutcorevsync|K$Qports port@0endpointsport@1endpointsport@2endpointsopp-table?operating-points-v2sopp-172000000 @opp-200000000 &opp-325000000_@'opp-375000000Z opp-500000000edisplayport-controller@ae90000?qcom,sm8450-dpqcom,sm8350-dpP      ( ; core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixel|//G/LdpQ Fdisabledports port@0endpointsopp-table?operating-points-v2sopp-160000000 h&opp-270000000߀'opp-540000000 /opp-8100000000Gdsi@ae94000(?qcom,sm8450-dsi-ctrlqcom,mdss-dsi-ctrl @ dsi_ctrl0A71$ bytebyte_intfpixelcoreifacebus|BQGLdsi  Fdisabledports port@0endpointsport@1endpointopp-table?operating-points-v2sopp-187500000 -&opp-300000000'opp-358000000Vphy@ae94400?qcom,sm8450-dsi-phy-5nm0 D F I`dsi_phydsi_phy_lanedsi_pllV*  ifaceref Fdisabledsdsi@ae96000(?qcom,sm8450-dsi-ctrlqcom,mdss-dsi-ctrl ` dsi_ctrl0 C91$ bytebyte_intfpixelcoreifacebus|DQGLdsi  Fdisabledports port@0endpointsport@1endpointphy@ae96400?qcom,sm8450-dsi-phy-5nm0 d f i`dsi_phydsi_phy_lanedsi_pllV*  ifaceref Fdisabledsclock-controller@af00000?qcom,sm8450-dispcc d**1+//Q&V Fdisabledsinterrupt-controller@b220000?qcom,sm8450-pdcqcom,pdc "@dH (6^a}?~ sthermal-sensor@c263000 ?qcom,sm8450-tsensqcom,tsens-v2 &0 " uplowcriticalsthermal-sensor@c265000 ?qcom,sm8450-tsensqcom,tsens-v2 &P "0uplowcriticalspower-management@c300000#?qcom,sm8450-aoss-qmpqcom,aoss-qmp 0x) )Vssram@c3f0000?qcom,rpmh-stats ?spmi@c400000?qcom,spmi-pmic-arbP @0 P@ D L Bcorechnlsobsrvrintrcnfg periph_irq x pmic@1?qcom,pm8350qcom,spmi-pmic temp-alarm@a00?qcom,spmi-temp-alarm  sgpio@8800 ?qcom,pm8350-gpioqcom,spmi-gpio N)ASSIGN1_THERMLCD_IDSDR_MMW_THERMRF_IDNCVOL_DOWN_NNCNCNCPM8350_OPTIONsvol-down-n-state9gpio6>normalGTaspmic@3?qcom,pm8350bqcom,spmi-pmic temp-alarm@a00?qcom,spmi-temp-alarm  sgpio@8800!?qcom,pm8350b-gpioqcom,spmi-gpioe:)CAM_PWR_A_CSNCNCNCSNAPSHOT_NCAM_PWR_LD_ENNCFOCUS_Nsecam-pwr-a-cs-state9gpio1>normalnGsfsnapshot-n-state9gpio5>normalGTasfocus-n-state9gpio8>normalGTascam-pwr-ld-en-state9gpio6>normalnGspmic@2?qcom,pm8350cqcom,spmi-pmic temp-alarm@a00?qcom,spmi-temp-alarm  sgpio@8800!?qcom,pm8350c-gpioqcom,spmi-gpio a)FL_STROBE_TRIG_WIDEFL_STROBE_TRIG_TELEWLC_IDWLC_TXPWR_ENNCRGBC_IR_PWR_ENNCNCWIDEC_PWR_ENsrgbc-ir-pwr-en-state9gpio6>normalnGspwm?qcom,pm8350c-pwm Fdisabledpmic@7?qcom,pm8450qcom,spmi-pmic temp-alarm@a00?qcom,spmi-temp-alarm  sgpio@8800 ?qcom,pm8450-gpioqcom,spmi-gpio )FP_LDO_ENspmic@0?qcom,pmk8350qcom,spmi-pmic pon@1300?qcom,pmk8350-pon hlospbspwrkey?qcom,pmk8350-pwrkeytFokayresin?qcom,pmk8350-resinFokaysadc@3100?qcom,spmi-adc71 1adc-tm@3400?qcom,spmi-adc-tm5-gen244  Fdisabledrtc@6100?qcom,pmk8350-rtcab rtcalarmb Fdisablednvram@7100?qcom,spmi-sdamq  qreboot-reason@48Hsgpio@b000!?qcom,pmk8350-gpioqcom,spmi-gpio )NCNCDISP_THERMPMK8350_OPTIONspmic@4?qcom,pmr735aqcom,spmi-pmic temp-alarm@a00?qcom,spmi-temp-alarm  sgpio@8800!?qcom,pmr735a-gpioqcom,spmi-gpiosmailbox@ed18000?qcom,sm8450-ipccqcom,ipccр s)pinctrl@f100000?qcom,sm8450-tlmm0 ] )NCNCNCNCWLC_I2C_SDAWLC_I2C_SCLNCPM8010_1_RESET_NWLC_INT_NNCNCPM8010_2_RESET_NDISP_ERR_FGHALL_INT_NALS_PROX_INT_NIMU1_INTTS_I2C_SDATS_I2C_SCLDISP_RESET_NDISP_VDDR_ENTS_RESET_NTS_INT_NNCTELEC_PWR_ENCAM1_RESET_NLEO_CAM0_RESET_NDEBUG_UART_TXDEBUG_UART_RXFP_SPI_MISOFP_SPI_MOSIFP_SPI_CLKFP_SPI_CS_NNFC_I2C_SDANFC_I2C_SCLNFC_ENNFC_CLK_REQNFC_ESE_SPI_MISONFC_ESE_SPI_MOSINFC_ESE_SPI_CLKNFC_ESE_SPI_CSFP_INT_NNCFP_RESET_NWCD_RST_NNCNFC_DWL_REQNFC_IRQFORCE_USB_BOOTAPPS_I2C_1_SDAAPPS_I2C_1_SCLSBU_SW_OESBU_SW_SELSPK_AMP_I2C_SDASPK_AMP_I2C_SCLNCNCCAMSENSOR_I2C_SDACAMSENSOR_I2C_SCLGNSS_ELNA_EN0NCNCNCNCNCNCNCRGBC_IR_INTNCNCNCNCNCHAP_I2C_SDAHAP_I2C_SCLHAP_RST_NHAP_INT_NHST_BT_UART_CTSHST_BT_UART_RFRHST_BT_UART_TXHST_BT_UART_RXHST_WLAN_ENHST_BT_ENHST_SW_CTRLNCNCNCDISP_VSYNCNCNCHW_ID_0HW_ID_1USB_CC_DIRTRAY_DETSW_SERVICEPCIE0_RESET_NPCIE0_CLK_REQ_NPCIE0_WAKE_NOIS_ENABLE_WIDEDEBUG_GPIO0NCCAM_MCLK0CAM_MCLK1CAM_MCLK2CAM_MCLK3NCNCTOF_RST_NCAM_SOFNCAFEXPTMG_TELECCI_I2C0_SDACCI_I2C0_SCLCCI_I2C1_SDACCI_I2C1_SCLCCI_I2C2_SDACCI_I2C2_SCLNCCAM2_RESET_NNCEXT_VD0_XVSCAM3_RESET_NNCNCNCNCRF_ID_EXTENSION_2HAP_I2S_CLKHAP_I2S_DOUTHAP_TRG1HAP_I2S_SYNCUIM1_DATAUIM1_CLKUIM1_RESETTRAY_DETUIM2_DATAUIM2_CLKUIM2_RESETUIM2_PRESENTSM_RFFE0_CLKSM_RFFE0_DATASM_RFFE1_CLKSM_RFFE1_DATASM_MSS_GRFC4HST_AS_ENLAA_RX_ENNCSM_RFFE4_CLKSM_RFFE4_DATAWLAN_COEX_UART1_RXWLAN_COEX_UART1_TXRF_LCD_ID_ENRF_ID_EXTENSIONSM_MSS_GRFC12NFC_COLD_RSTNCNCSDR1_QLINK0_REQSDR1_QLINK0_ENSDR1_QLINK0_WMSS_RESET_NQLINK1_REQQLINK1_ENQLINK1_WMSS_RESET_NSDR2_QLINK2_REQSDR2_QLINK2_ENSDR2_QLINK2_WMSS_RESET_NWCD_SWR_TX_CLKWCD_SWR_TX_DATA0WCD_SWR_TX_DATA1WCD_SWR_RX_CLKWCD_SWR_RX_DATA0WCD_SWR_RX_DATA1SM_DMIC1_CLKSM_DMIC1_DATASM_DMIC2_CLKSM_DMIC2_DATASPK_AMP_I2S_CLKSPK_AMP_I2S_WSNCNCWCD_SWR_TX_DATA2SPK_AMP_I2S_ASP_DINSPK_AMP_I2S_ASP_DOUTSPK_AMP_INT_NSPK_AMP_RESET_NHST_BT_WLAN_SLIMBUS_CLKHST_BT_WLAN_SLIMBUS_DAT0NCNCNCNCMAG_I2C_SDAMAG_I2C_SCLIMU_SPI_MISOIMU_SPI_MOSIIMU_SPI_CLKIMU_SPI_CS_NSENSOR_I2C_SDASENSOR_I2C_SCLOIS_TELE_I2C_SDAOIS_TELE_I2C_SCLNCOIS_ENABLE_TELEHST_BLE_UART_TXHST_BLE_UART_RXHSTP_CLK_CFG_SELNCAPPS_I2C_0_SDAAPPS_I2C_0_SCLCCI_I2C3_SDACCI_I2C3_SCLs]sdc2-default-statesclk-pins 9sdc2_clks cmd-pins 9sdc2_cmdsTdata-pins 9sdc2_datasTsdc2-sleep-statesclk-pins 9sdc2_clks cmd-pins 9sdc2_cmdsTdata-pins 9sdc2_datasTcci0-default-state9gpio110gpio111>cci_i2csTscci0-sleep-state9gpio110gpio111>cci_i2cs scci1-default-state9gpio112gpio113>cci_i2csTscci1-sleep-state9gpio112gpio113>cci_i2cs scci2-default-state9gpio114gpio115>cci_i2csTscci2-sleep-state9gpio114gpio115>cci_i2cs scci3-default-state9gpio208gpio209>cci_i2csTscci3-sleep-state9gpio208gpio209>cci_i2cs spcie0-default-statesperst-pins9gpio94>gpios clkreq-pins9gpio95>pcie0_clkreqnsTwake-pins9gpio96>gpiosTpcie1-default-statesperst-pins9gpio97>gpios clkreq-pins9gpio98>pcie1_clkreqnsTwake-pins9gpio99>gpiosTqup-i2c0-data-clk-state 9gpio0gpio1>qup0sMqup-i2c1-data-clk-state 9gpio4gpio5>qup1sSqup-i2c2-data-clk-state 9gpio8gpio9>qup2sVqup-i2c3-data-clk-state9gpio12gpio13>qup3sYqup-i2c4-data-clk-state9gpio16gpio17>qup4s\qup-i2c5-data-clk-state9gpio206gpio207>qup5sdqup-i2c6-data-clk-state9gpio20gpio21>qup6siqup-i2c8-data-clk-state9gpio28gpio29>qup8snqup-i2c9-data-clk-state9gpio32gpio33>qup9srqup-i2c10-data-clk-state9gpio36gpio37>qup10suqup-i2c11-data-clk-state9gpio40gpio41>qup11sxqup-i2c12-data-clk-state9gpio44gpio45>qup12s{qup-i2c13-data-clk-state9gpio48gpio49>qup13sTs~qup-i2c14-data-clk-state9gpio52gpio53>qup14sTsqup-i2c15-data-clk-state9gpio56gpio57>qup15s2qup-i2c16-data-clk-state9gpio60gpio61>qup16s9qup-i2c17-data-clk-state9gpio64gpio65>qup17s<qup-i2c18-data-clk-state9gpio68gpio69>qup18s?qup-i2c19-data-clk-state9gpio72gpio73>qup19sBqup-i2c20-data-clk-state9gpio76gpio77>qup20sEqup-i2c21-data-clk-state9gpio80gpio81>qup21sJqup-spi0-cs-state9gpio3>qup0sPqup-spi0-data-clk-state9gpio0gpio1gpio2>qup0sOqup-spi1-cs-state9gpio7>qup1sUqup-spi1-data-clk-state9gpio4gpio5gpio6>qup1sTqup-spi2-cs-state9gpio11>qup2sXqup-spi2-data-clk-state9gpio8gpio9gpio10>qup2sWqup-spi3-cs-state9gpio15>qup3s[qup-spi3-data-clk-state9gpio12gpio13gpio14>qup3sZqup-spi4-cs-state9gpio19>qup4s scqup-spi4-data-clk-state9gpio16gpio17gpio18>qup4sbqup-spi5-cs-state9gpio85>qup5shqup-spi5-data-clk-state9gpio206gpio207gpio84>qup5sgqup-spi6-cs-state9gpio23>qup6skqup-spi6-data-clk-state9gpio20gpio21gpio22>qup6sjqup-spi8-cs-state9gpio31>qup8sqqup-spi8-data-clk-state9gpio28gpio29gpio30>qup8spqup-spi9-cs-state9gpio35>qup9stqup-spi9-data-clk-state9gpio32gpio33gpio34>qup9ssqup-spi10-cs-state9gpio39>qup10swqup-spi10-data-clk-state9gpio36gpio37gpio38>qup10svqup-spi11-cs-state9gpio43>qup11szqup-spi11-data-clk-state9gpio40gpio41gpio42>qup11syqup-spi12-cs-state9gpio47>qup12s}qup-spi12-data-clk-state9gpio44gpio45gpio46>qup12s|qup-spi13-cs-state9gpio51>qup13squp-spi13-data-clk-state9gpio48gpio49gpio50>qup13squp-spi14-cs-state9gpio55>qup14squp-spi14-data-clk-state9gpio52gpio53gpio54>qup14squp-spi15-cs-state9gpio59>qup15s8qup-spi15-data-clk-state9gpio56gpio57gpio58>qup15s7qup-spi16-cs-state9gpio63>qup16s;qup-spi16-data-clk-state9gpio60gpio61gpio62>qup16s:qup-spi17-cs-state9gpio67>qup17s>qup-spi17-data-clk-state9gpio64gpio65gpio66>qup17s=qup-spi18-cs-state9gpio71>qup18s sAqup-spi18-data-clk-state9gpio68gpio69gpio70>qup18s s@qup-spi19-cs-state9gpio75>qup19s sDqup-spi19-data-clk-state9gpio72gpio73gpio74>qup19s sCqup-spi20-cs-state9gpio79>qup20sIqup-spi20-data-clk-state9gpio76gpio77gpio78>qup20sHqup-spi21-cs-state9gpio83>qup21sLqup-spi21-data-clk-state9gpio80gpio81gpio82>qup21sKqup-uart7-rx-state9gpio26>qup7s smqup-uart7-tx-state9gpio27>qup7s slqup-uart20-default-state9gpio76gpio77gpio78gpio79>qup20sFts-reset-default-state9gpio20>gpios s`ts-int-default-state9gpio21>gpios satelec-pwr-en-state9gpio23>gpios ssd-card-det-n-state9gpio92>gpiosTspinctrl@3440000?qcom,sm8450-lpass-lpi-pinctrl DMfg  coreaudiostx-swr-active-statesclk-pins9gpio0 >swr_tx_clks ! data-pins9gpio1gpio2gpio14 >swr_tx_datas ! +rx-swr-active-statesclk-pins9gpio3 >swr_rx_clks ! data-pins 9gpio4gpio5 >swr_rx_datas ! +dmic01-default-stateclk-pins9gpio6 >dmic1_clksdata-pins9gpio7 >dmic1_datasdmic02-default-stateclk-pins9gpio8 >dmic2_clksdata-pins9gpio9 >dmic2_dataswsa-swr-active-statesclk-pins9gpio10 >wsa_swr_clks ! data-pins9gpio11 >wsa_swr_datas ! +wsa2-swr-active-statesclk-pins9gpio15 >wsa2_swr_clks ! data-pins9gpio16>wsa2_swr_datas ! +sram@146aa000#?qcom,sm8450-imemsysconsimple-mfdjj pil-reloc@94c?qcom,pil-reloc-info Liommu@15000000!?qcom,sm8450-smmu-500arm,mmu-500 9 FAabcdefghijklmnopqrstuv;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYs0interrupt-controller@17100000 ?arm,gic-v3 Y p     smsi-controller@17140000?arm,gic-v3-its  stimer@17420000?arm,armv7-timer-mem  Bc$frame@17421000 BB frame@17423000   B0 Fdisabledframe@17425000   BP Fdisabledframe@17427000   Bp Fdisabledframe@17429000   B Fdisabledframe@1742b000   B Fdisabledframe@1742d000  B Fdisabledrsc@17a00000 Uapps_rsc?qcom,rpmh-rsc@drv-0drv-1drv-2drv-3$    bcm-voter?qcom,bcm-votersclock-controller?qcom,sm8450-rpmh-clkV xos*power-controller?qcom,sm8450-rpmhpdsQopp-table?operating-points-v2sopp1 opp2 0s%opp3 8sopp4 @s&opp5 Popp6 s'opp7 opp8 sopp9 opp10 sopp11 @opp12 Popp13 opp14 regulators-0?qcom,pm8350-rpmh-regulators b     ' 5 C Q _ m |     smps10 pm8350_s10w@w@smps11 pm8350_s11 ؀ssmps12 pm8350_s12@\sldo1 pm8350_l1   sldo2 pm8350_l2.. sldo3 pm8350_l3 @ @ ldo5 pm8350_l5 m  sldo6 pm8350_l6OO sldo7 pm8350_l7&5@&5@ ldo9 pm8350_l9OO regulators-1?qcom,pm8350c-rpmh-regulators c     ' 5 C Q _ m    7 L [smps1 pm8350c_s1w@@ssmps10 pm8350c_s10B@bob vreg_bob3@ P bkey-camera-snapshotUCamera Snapshot e > P bkey-volume-down UVolume Downr  > P bimx650-vana-regulator?regulator-fixedimx650_vana_regulator p] uMdefault[vph-pwr-regulator?regulator-fixedvph_pwr8u 8u   simx316-lvdd-regulator?regulator-fixedimx316_lvdd_regulator pe uMdefault[rgbcir-vdd-regulator?regulator-fixedtcs3490_vdd_regulator p uMdefault[ interrupt-parent#address-cells#size-cellschassis-typemodelcompatiblestdout-path#clock-cellsclock-frequencyphandledevice_typeregenable-methodnext-level-cachepower-domainspower-domain-namesqcom,freq-domain#cooling-cellsclockscache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopqcom,dload-modeinterconnects#reset-cells#interconnect-cellsqcom,bcm-votersinterrupts#power-domain-cellsdomain-idle-statesopp-hzrequired-oppsrangesno-maphwlocksqcom,client-idqcom,vmidconsole-sizerecord-sizeecc-sizeqcom,smeminterrupts-extendedmboxesqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsdma-rangesclock-names#dma-cellsdma-channelsdma-channel-maskiommusstatuspinctrl-namespinctrl-0interconnect-namesdmasdma-namesoperating-points-v2vdd-supplyavdd-supplydlg,cs-gpiosregulator-nameregulator-min-microvoltregulator-max-microvoltreset-gpioscirrus,boost-peak-milliampcirrus,boost-ind-nanohenrycirrus,boost-cap-microfaradcirrus,gpio2-src-selectcirrus,gpio2-output-enablecirrus,asp-sdout-hiz#sound-dai-cellsreg-nameslinux,pci-domainbus-rangenum-lanesmsi-mapmsi-map-maskinterrupt-namesinterrupt-map-maskinterrupt-mapiommu-mapresetsreset-namesphysphy-namesperst-gpioswake-gpiosmax-link-speedassigned-clocksassigned-clock-ratesvdda-phy-supplyvdda-pll-supply#phy-cellsclock-output-names#hwlock-cellsvdda18-supplyvdda33-supplymemory-regionqcom,qmpqcom,smem-statesqcom,smem-state-namesfirmware-namelabelqcom,glink-channelsqcom,din-portsqcom,dout-portsqcom,ports-sinterval-lowqcom,ports-offset1qcom,ports-offset2qcom,ports-hstartqcom,ports-hstopqcom,ports-word-lengthqcom,ports-block-pack-modeqcom,ports-block-group-countqcom,ports-lane-controlqcom,domainqcom,intentsqcom,protection-domainpinctrl-1remote-endpointassigned-clock-parentsqcom,pdc-ranges#qcom,sensors#thermal-sensor-cellsqcom,eeqcom,channelgpio-controllergpio-ranges#gpio-cellsgpio-line-namespinsfunctionpower-sourcebias-pull-upinput-enableqcom,drive-strengthdrive-push-pulloutput-highoutput-low#pwm-cellslinux,code#io-channel-cellsbits#mbox-cellswakeup-parentgpio-reserved-rangesbias-disablebias-pull-downslew-ratebias-bus-hold#iommu-cells#global-interrupts#redistributor-regionsredistributor-stridemsi-controller#msi-cellsframe-numberqcom,tcs-offsetqcom,drv-idqcom,tcs-configopp-levelqcom,pmic-idvdd-s1-supplyvdd-s2-supplyvdd-s3-supplyvdd-s4-supplyvdd-s5-supplyvdd-s6-supplyvdd-s7-supplyvdd-s8-supplyvdd-s9-supplyvdd-s10-supplyvdd-s11-supplyvdd-s12-supplyvdd-l1-l4-supplyvdd-l2-l7-supplyvdd-l3-l5-supplyvdd-l6-l9-l10-supplyregulator-initial-modevdd-l1-l12-supplyvdd-l2-l8-supplyvdd-l3-l4-l5-l7-l13-supplyvdd-l6-l9-l11-supplyvdd-l10-supplyvdd-bob-supplyvdd-l2-supplyvdd-l3-supplyvdd-l4-supplyvdd-l1-l2-supplyvdd-l5-l6-supplyvdd-l7-bob-supply#freq-domain-cellslanes-per-directiondma-coherentfreq-table-hzqcom,iceqcom,controlled-remotelybus-widthsdhci-caps-maskcd-gpiosvmmc-supplyvqmmc-supplyno-sdiono-mmcsnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirkdr_modepolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisnvmem-cellsnvmem-cell-namesmode-recoverymode-bootloaderserial0debounce-intervallinux,can-disablewakeup-sourcegpioenable-active-highregulator-always-onregulator-boot-on