8((\$mediatek,mt8195-evbmediatek,mt8195 +!7MediaTek MT8195 evaluation boardaliases=/soc/dp-intf@1c015000F/soc/dp-intf@1c113000O/soc/mailbox@10320000T/soc/mailbox@10330000Y/soc/hdr-engine@1c114000`/soc/mutex@1c016000g/soc/mutex@1c101000n/soc/vpp-merge@1c10c000u/soc/vpp-merge@1c10d000|/soc/vpp-merge@1c10e000/soc/vpp-merge@1c10f000/soc/vpp-merge@1c110000/soc/dma-controller@1c104000/soc/dma-controller@1c105000/soc/dma-controller@1c106000/soc/dma-controller@1c107000/soc/dma-controller@1c108000/soc/dma-controller@1c109000/soc/dma-controller@1c10a000/soc/dma-controller@1c10b000/soc/serial@11001100cpus+cpu@0cpuarm,cortex-a55psci#ec3@34FVc@u@ cpu@100cpuarm,cortex-a55psci#ec3@34FVc@u@ cpu@200cpuarm,cortex-a55psci#ec3@34FVc@u@ cpu@300cpuarm,cortex-a55psci#ec3@34FVc@u@ cpu@400cpuarm,cortex-a78psci#f3FVc@u@ cpu@500cpuarm,cortex-a78psci#f3FVc@u@cpu@600cpuarm,cortex-a78psci#f3FVc@u@cpu@700cpuarm,cortex-a78psci#f3FVc@u@cpu-mapcluster0core0 core1 core2 core3 core4 core5core6core7idle-statespscicpu-retention-larm,idle-state2 _0Dcpu-retention-barm,idle-state- 0cpu-off-larm,idle-state7 0Hcpu-off-barm,idle-state2 0l2-cache0cacheAXe@wMl2-cache1cacheAXe@wMl3-cachecacheAX e@wMdsu-pmu arm,dsu-pmu[ f kfaildmic-codec dmic-codecr2mt8195-sound kdisabledfixed-factor-clock-13mfixed-factor-clockclk13m(oscillator-26m fixed-clock#clk26moscillator-32k fixed-clock#clk32kperformance-controller@11bc10mediatek,cpufreq-hw  0 opp-table-gpuoperating-points-v2Topp-390000000> hopp-410000000p opp-431000000 opp-4730000001h@ <opp-515000000F <opp-556000000!# Ҧopp-598000000# opp-640000000&% opp-670000000'c opp-700000000)' Lopp-730000000+ }opp-760000000-L `opp-790000000/q 4opp-82000000005 opp-8500000002 @opp-8800000004s qpmu-a55arm,cortex-a55-pmu [pmu-a78arm,cortex-a78-pmu [psci arm,psci-1.0smctimerarm,armv8-timer @[   soc+ simple-businterrupt-controller@c000000 arm,gic-v3): Q   [ ppi-partitionsinterrupt-partition-0f interrupt-partition-1f syscon@10000000 mediatek,mt8195-topckgensysconsyscon@10001000.mediatek,mt8195-infracfg_aosysconsimple-mfdosyscon@10003000mediatek,mt8195-pericfgsyscon06pinctrl@10005000mediatek,mt8195-pinctrlPB|iocfg0iocfg_bmiocfg_bliocfg_briocfg_lmiocfg_rbiocfg_tleintQ[)i2c0-pinsCpins ei2c1-pinsDpins  ei2c4-pinsEpinsei2c6-pinsApinsei2c7-pinspinsenor-pins?pins0 pins1 uart0-pins.pinsbcsyscon@10006000)mediatek,mt8195-scpsyssysconsimple-mfd`power-controller!mediatek,mt8195-power-controller+*power-domain@8+power-domain@9 mfgalt+power-domain@10 power-domain@11 power-domain@12 power-domain@13 power-domain@14power-domain@15 @AK   vppsysvppsys1vppsys2vppsys3vppsys4vppsys5vppsys6vppsys7vppsys0-0vppsys0-1vppsys0-2vppsys0-3vppsys0-4vppsys0-5vppsys0-6vppsys0-7vppsys0-8vppsys0-9vppsys0-10vppsys0-11vppsys0-12vppsys0-13vppsys0-14vppsys0-15vppsys0-16vppsys0-17vppsys0-18+power-domain@24vdec1-0power-domain@27 venc1-larbpower-domain@168$%&'()Dvdosys0vdosys0-0vdosys0-1vdosys0-2vdosys0-3vdosys0-4vdosys0-5+power-domain@17vppsys1vppsys1-0vppsys1-1power-domain@22 $wepsys-0wepsys-1wepsys-2wepsys-3power-domain@23 vdec0-0power-domain@25!vdec2-0power-domain@26" venc0-larbpower-domain@18 ###&vdosys1vdosys1-0vdosys1-1vdosys1-2+power-domain@19power-domain@20power-domain@21Qhdmi_txpower-domain@28$$  img-0img-1+power-domain@29power-domain@30$%ipeipe-0ipe-1power-domain@31(&&&&&cam-0cam-1cam-2cam-3cam-4+power-domain@32 power-domain@33!power-domain@34"power-domain@0power-domain@1power-domain@2power-domain@3power-domain@457csi_rx_topcsi_rx_top1power-domain@5' etherpower-domain@6Xn adspadsp1+power-domain@7 g"n2audioaudio1audio2audio3watchdog@10007000mediatek,mt8195-wdt.po-syscon@1000c000"mediatek,mt8195-apmixedsyssyscontimer@10017000,mediatek,mt8195-timermediatek,mt6765-timerp[ (pwrap@10024000mediatek,mt8195-pwrapsyscon@|pwrap[ spiwrapF$Vspmi@10027000mediatek,mt8195-spmi p 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kdisabledserial@11001300*mediatek,mt8195-uartmediatek,mt6577-uart[  baudbus kdisabledserial@11001400*mediatek,mt8195-uartmediatek,mt6577-uart[  baudbus kdisabledserial@11001500*mediatek,mt8195-uartmediatek,mt6577-uart[  baudbus kdisabledserial@11001600*mediatek,mt8195-uartmediatek,mt6577-uart[  baudbus kdisabledauxadc@11002000.mediatek,mt8195-auxadcmediatek,mt8173-auxadc mainkokaysyscon@11003000"mediatek,mt8195-pericfg_aosyscon0'spi@1100a000(mediatek,mt8195-spimediatek,mt6765-spi+[parent-clksel-clkspi-clk kdisabledthermal-sensor@1100b000mediatek,mt8195-lvts-ap[/0$lvts-calib-data-1lvts-calib-data-2pwm@1100e0002mediatek,mt8195-disp-pwmmediatek,mt8183-disp-pwm[*(*0mainmm kdisabledpwm@1100f0002mediatek,mt8195-disp-pwmmediatek,mt8183-disp-pwm[(+Nmainmm kdisabledspi@11010000(mediatek,mt8195-spimediatek,mt6765-spi+[3parent-clksel-clkspi-clk kdisabledspi@11012000(mediatek,mt8195-spimediatek,mt6765-spi+ [4parent-clksel-clkspi-clk kdisabledspi@11013000(mediatek,mt8195-spimediatek,mt6765-spi+0[5parent-clksel-clkspi-clk kdisabledspi@11018000(mediatek,mt8195-spimediatek,mt6765-spi+[<parent-clksel-clkspi-clk kdisabledspi@11019000(mediatek,mt8195-spimediatek,mt6765-spi+[=parent-clksel-clkspi-clk kdisabledspi@1101d000mediatek,mt8195-spi-slave[RspiFV kdisabledspi@1101e000mediatek,mt8195-spi-slave[SspiFV kdisabledethernet@11021000&mediatek,mt8195-gmacsnps,dwmac-5.10a@[3macirq.axiapbmac_mainptp_refrmii_internalmac_cg0''RST' FRSTV*CT1d2w3 kdisabledmdiosnps,dwmac-mdio+stmmac-axi-config1rx-queues-config2queue0queue1queue2queue3tx-queues-config)?3queue0Q]queue1Q]queue2Q]queue3Q]usb@11200000'mediatek,mt8195-xhcimediatek,mtk-xhci   > |macippc[k45F,-V$/B$sys_ckref_ckmcu_ckdma_ckxhci_ck p6gkokaymmc@11230000(mediatek,mt8195-mmcmediatek,mt8183-mmc #[sourcehclksource_cg kdisabledmmc@11240000(mediatek,mt8195-mmcmediatek,mt8183-mmc $[$sourcehclksource_cgFV kdisabledmmc@11250000(mediatek,mt8195-mmcmediatek,mt8183-mmc %[ Isourcehclksource_cgF V kdisabledthermal-sensor@11278000mediatek,mt8195-lvts-mcu'[/0$lvts-calib-data-1lvts-calib-data-2usb@11290000'mediatek,mt8195-xhcimediatek,mtk-xhci ))> |macippc[k7F./V$''$sys_ckref_ckmcu_ckdma_ckxhci_ck p6hkokayusb@112a0000'mediatek,mt8195-xhcimediatek,mtk-xhci **> |macippc[k8F01V ''$sys_ckref_ckmcu_ckdma_ckxhci_ck p6ikokayusb@112b0000'mediatek,mt8195-xhcimediatek,mtk-xhci ++> |macippc[k9F23V '' $sys_ckref_ckmcu_ckdma_ckxhci_ck p6jkokaypcie@112f0000*mediatek,mt8195-pciemediatek,mt8192-pciepci+/@ |pcie-mac[8 :0V#&+K'/pl_250mtl_26mtl_96mtl_32kperi_26mperi_memFGVk; pcie-phy*mac)`<<<< kdisabledinterrupt-controllerQ)<pcie@112f8000*mediatek,mt8195-pciemediatek,mt8192-pciepci+/@ |pcie-mac[8$$ $ $ :(WXQ'/pl_250mtl_26mtl_96mtl_32kperi_26mperi_memFHVk= pcie-phy*mac)`>>>> kdisabledinterrupt-controllerQ)>spi@1132c000(mediatek,mt8195-normediatek,mt8173-nor2[9o'' spisfaxi+kokaydefault?flash@0jedec,spi-norefuse@11c10000%mediatek,mt8195-efusemediatek,efuse+usb3-tx-imp@184,1Kusb3-rx-imp@184,2Jusb3-intr@185Iusb3-tx-imp@186,1Husb3-rx-imp@186,2Gusb3-intr@187Fusb2-intr-p0@188,1usb2-intr-p1@188,2usb2-intr-p2@189,1usb2-intr-p3@189,2pciephy-rx-ln1@190,1Rpciephy-tx-ln1-nmos@190,2Qpciephy-tx-ln1-pmos@191,1Ppciephy-rx-ln0@191,2Opciephy-tx-ln0-nmos@192,1Npciephy-tx-ln0-pmos@192,2Mpciephy-glb-intr@193Ldp-data@1aclvts1-calib@1bc/lvts2-calib@1d080t-phy@11c40000.mediatek,mt8195-tphymediatek,generic-tphy-v3+kokayusb-phy@0ref 8t-phy@11c50000.mediatek,mt8195-tphymediatek,generic-tphy-v3+kokayusb-phy@0ref 9i2c@11d00000(mediatek,mt8195-i2cmediatek,mt8192-i2c "[@; maindma+ kdisabledi2c@11d01000(mediatek,mt8195-i2cmediatek,mt8192-i2c "[@; maindma+kokaydefaultA#i2c@11d02000(mediatek,mt8195-i2cmediatek,mt8192-i2c  "[@; maindma+ kdisabledclock-controller@11d03000mediatek,mt8195-imp_iic_wrap_s0@i2c@11e00000(mediatek,mt8195-i2cmediatek,mt8192-i2c "[B; maindma+kokaydefaultC#i2c@11e01000(mediatek,mt8195-i2cmediatek,mt8192-i2c "[B; maindma+kokaydefaultD#i2c@11e02000(mediatek,mt8195-i2cmediatek,mt8192-i2c  "[B; maindma+ kdisabledi2c@11e03000(mediatek,mt8195-i2cmediatek,mt8192-i2c 0"[B; maindma+ kdisabledi2c@11e04000(mediatek,mt8195-i2cmediatek,mt8192-i2c @"[B; maindma+kokaydefaultE#clock-controller@11e05000mediatek,mt8195-imp_iic_wrap_wPBt-phy@11e30000.mediatek,mt8195-tphymediatek,generic-tphy-v3+*kokayusb-phy@0  refda_ref 7usb-phy@700 refda_ref FGHintrrx_imptx_imp =t-phy@11e40000.mediatek,mt8195-tphymediatek,generic-tphy-v3+kokayusb-phy@0  refda_ref 4usb-phy@700 refda_ref IJKintrrx_imptx_imp 5phy@11e80000mediatek,mt8195-pcie-phy|sifLMNOPQRGglb_intrtx_ln0_pmostx_ln0_nmosrx_ln0tx_ln1_pmostx_ln1_nmosrx_ln1*  kdisabled;ufs-phy@11fa0000.mediatek,mt8195-ufsphymediatek,mt8183-ufsphy unipromp  kdisabledgpu@13000000>mediatek,mt8195-malimediatek,mt8192-maliarm,mali-valhall-jm@S0[ 3jobmmugpuT(* * * * **core0core1core2core3core4 kdisabledclock-controller@13fbf000mediatek,mt8195-mfgcfgSsyscon@14000000mediatek,mt8195-vppsys0syscon=Umutex@1400f000mediatek,mt8195-vpp-mutex[P=U*smi@14010000mediatek,mt8195-smi-sub-commonapbsmigals0UV*Wsmi@14011000mediatek,mt8195-smi-sub-commonapbsmigals0UV*vsmi@14012000mediatek,mt8195-smi-common-vpp  apbsmigals0gals1*Vlarb@14013000mediatek,mt8195-smi-larb0bUWapbsmi*Ziommu@14018000mediatek,mt8195-iommu-vpp8sXYZ[\]^_`abcde[Rbclkm*uclock-controller@14e00000mediatek,mt8195-wpesysclock-controller@14e02000mediatek,mt8195-wpesys_vpp0 clock-controller@14e03000mediatek,mt8195-wpesys_vpp10larb@14e04000mediatek,mt8195-smi-larb@bUfapbsmi*{larb@14e05000mediatek,mt8195-smi-larbPbUV apbsmigals*\syscon@14f00000mediatek,mt8195-vppsys1syscon=U mutex@14f01000mediatek,mt8195-vpp-mutex[{=U '*larb@14f02000mediatek,mt8195-smi-larb bUf apbsmigals*zlarb@14f03000mediatek,mt8195-smi-larb0bUW apbsmigals*[clock-controller@15000000mediatek,mt8195-imgsys$larb@15001000mediatek,mt8195-smi-larbb Ug$$$  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#mergemerge_async*=w#vpp-merge@1c110000mediatek,mt8195-disp-merge[# #mergemerge_async*=w#dp-intf@1c113000mediatek,mt8195-dp-intf0[*##/enginepixelpll kdisabledhdr-engine@1c114000mediatek,mt8195-disp-ethdrp@Pp4|mixervdo_fe0vdo_fe1gfx_fe0gfx_fe1vdo_beadl_dsp=w@wPwpwwwwh#%# ###!#$#"#1#&#'#(#)#*mixervdo_fe0vdo_fe1gfx_fe0gfx_fe1vdo_beadl_dsvdo_fe0_asyncvdo_fe1_asyncgfx_fe0_asyncgfx_fe1_asyncvdo_be_asyncethdr_top*udue[(#3#4#5#6#7Evdo_fe0_asyncvdo_fe1_asyncgfx_fe0_asyncgfx_fe1_asyncvdo_be_asyncedp-tx@1c500000mediatek,mt8195-edp-txPdp_calibration_data*[ kdisableddp-tx@1c600000mediatek,mt8195-dp-tx`dp_calibration_data*[ kdisabledthermal-zonescpu0-thermaltripstrip-alert%L1passivetrip-crit%1 criticalcooling-mapsmap0<0A cpu1-thermaltripstrip-alert%L1passivetrip-crit%1 criticalcooling-mapsmap0<0A cpu2-thermaltripstrip-alert%L1passivetrip-crit%1 criticalcooling-mapsmap0<0A cpu3-thermaltripstrip-alert%L1passivetrip-crit%1 criticalcooling-mapsmap0<0A cpu4-thermaltripstrip-alert%L1passivetrip-crit%1 criticalcooling-mapsmap0<0A cpu5-thermaltripstrip-alert%L1passivetrip-crit%1 criticalcooling-mapsmap0<0A cpu6-thermaltripstrip-alert%L1passivetrip-crit%1 criticalcooling-mapsmap0<0A cpu7-thermaltripstrip-alert%L1passivetrip-crit%1 criticalcooling-mapsmap0<0A vpu0-thermaltripstrip-alert%L1passivetrip-crit%1 criticalvpu1-thermal tripstrip-alert%L1passivetrip-crit%1 criticalgpu0-thermal tripstrip-alert%L1passivetrip-crit%1 criticalgpu1-thermal tripstrip-alert%L1passivetrip-crit%1 criticalvdec-thermal tripstrip-alert%L1passivetrip-crit%1 criticalimg-thermal tripstrip-alert%L1passivetrip-crit%1 criticalinfra-thermaltripstrip-alert%L1passivetrip-crit%1 criticalcam0-thermaltripstrip-alert%L1passivetrip-crit%1 criticalcam1-thermaltripstrip-alert%L1passivetrip-crit%1 criticalchosenPserial0:921600n8memory@40000000memory@ compatibleinterrupt-parent#address-cells#size-cellsmodeldp-intf0dp-intf1gce0gce1ethdr0mutex0mutex1merge1merge2merge3merge4merge5vdo1-rdma0vdo1-rdma1vdo1-rdma2vdo1-rdma3vdo1-rdma4vdo1-rdma5vdo1-rdma6vdo1-rdma7serial0device_typeregenable-methodperformance-domainsclock-frequencycapacity-dmips-mhzcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cache#cooling-cellsphandlecpuentry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedinterruptscpusstatusnum-channelswakeup-delay-msmediatek,platform#clock-cellsclocksclock-divclock-multclock-output-names#performance-domain-cellsopp-sharedopp-hzopp-microvoltrangesdma-ranges#interrupt-cells#redistributor-regionsinterrupt-controlleraffinity#reset-cellsreg-namesgpio-controller#gpio-cellsgpio-rangespinmuxbias-pull-upmediatek,drive-strength-advdrive-strengthbias-pull-down#power-domain-cellsclock-namesmediatek,infracfgmediatek,disable-extrstassigned-clocksassigned-clock-parents#iommu-cells#mbox-cellspower-domainsmbox-namesmboxesmediatek,topckgenresetsreset-namespinctrl-namespinctrl-0#io-channel-cellsnvmem-cellsnvmem-cell-names#thermal-sensor-cells#pwm-cellsinterrupt-namesmediatek,pericfgsnps,axi-configsnps,mtl-rx-configsnps,mtl-tx-configsnps,txpblsnps,rxpblsnps,clk-csrsnps,wr_osr_lmtsnps,rd_osr_lmtsnps,blensnps,rx-queues-to-usesnps,rx-sched-spsnps,dcb-algorithmsnps,map-to-dma-channelsnps,tx-queues-to-usesnps,tx-sched-wrrsnps,weightsnps,priorityphysmediatek,syscon-wakeupwakeup-sourceusb2-lpm-disablebus-rangeiommu-mapiommu-map-maskphy-namesinterrupt-map-maskinterrupt-mapspi-max-frequencybits#phy-cellsoperating-points-v2power-domain-namesmediatek,gce-client-regmediatek,smimediatek,larb-idmediatek,larbsmediatek,scpiommusmediatek,gce-events#dma-cellsmediatek,merge-mutemediatek,merge-fifo-enmax-linkrate-mhzpolling-delaypolling-delay-passivethermal-sensorstemperaturehysteresistripcooling-devicestdout-path