84( %mediatek,mt8195-demomediatek,mt8195 +7MediaTek MT8195 demo boardaliases=/soc/dp-intf@1c015000F/soc/dp-intf@1c113000O/soc/mailbox@10320000T/soc/mailbox@10330000Y/soc/hdr-engine@1c114000`/soc/mutex@1c016000g/soc/mutex@1c101000n/soc/vpp-merge@1c10c000u/soc/vpp-merge@1c10d000|/soc/vpp-merge@1c10e000/soc/vpp-merge@1c10f000/soc/vpp-merge@1c110000/soc/dma-controller@1c104000/soc/dma-controller@1c105000/soc/dma-controller@1c106000/soc/dma-controller@1c107000/soc/dma-controller@1c108000/soc/dma-controller@1c109000/soc/dma-controller@1c10a000/soc/dma-controller@1c10b000/soc/serial@11001100cpus+cpu@0cpuarm,cortex-a55psci#ec3@34FVc@u@ cpu@100cpuarm,cortex-a55psci#ec3@34FVc@u@ cpu@200cpuarm,cortex-a55psci#ec3@34FVc@u@ cpu@300cpuarm,cortex-a55psci#ec3@34FVc@u@ cpu@400cpuarm,cortex-a78psci#f3FVc@u@ cpu@500cpuarm,cortex-a78psci#f3FVc@u@cpu@600cpuarm,cortex-a78psci#f3FVc@u@cpu@700cpuarm,cortex-a78psci#f3FVc@u@cpu-mapcluster0core0 core1 core2 core3 core4 core5core6core7idle-statespscicpu-retention-larm,idle-state2 _0Dcpu-retention-barm,idle-state- 0cpu-off-larm,idle-state7 0Hcpu-off-barm,idle-state2 0l2-cache0cacheAXe@wMl2-cache1cacheAXe@wMl3-cachecacheAX e@wMdsu-pmu arm,dsu-pmu[ f kfaildmic-codec dmic-codecr2mt8195-sound kdisabledfixed-factor-clock-13mfixed-factor-clockclk13m(oscillator-26m fixed-clock#clk26moscillator-32k fixed-clock#clk32kperformance-controller@11bc10mediatek,cpufreq-hw  0 opp-table-gpuoperating-points-v2_opp-390000000> hopp-410000000p opp-431000000 opp-4730000001h@ <opp-515000000F <opp-556000000!# Ҧopp-598000000# opp-640000000&% opp-670000000'c opp-700000000)' Lopp-730000000+ }opp-760000000-L `opp-790000000/q 4opp-82000000005 opp-8500000002 @opp-8800000004s qpmu-a55arm,cortex-a55-pmu [pmu-a78arm,cortex-a78-pmu [psci arm,psci-1.0smctimerarm,armv8-timer @[   soc+ simple-businterrupt-controller@c000000 arm,gic-v3): Q   [ ppi-partitionsinterrupt-partition-0f interrupt-partition-1f syscon@10000000 mediatek,mt8195-topckgensysconsyscon@10001000.mediatek,mt8195-infracfg_aosysconsimple-mfdosyscon@10003000mediatek,mt8195-pericfgsyscon0:pinctrl@10005000mediatek,mt8195-pinctrlPB|iocfg0iocfg_bmiocfg_bliocfg_briocfg_lmiocfg_rbiocfg_tleintQ[)eth-default-pins6pins-txdMNOPpins-ccUXWVpins-rxdQRSTpins-mdioYZpins-power[\eth-sleep-pins7pins-txdMNOPpins-ccUXWVpins-rxdQRSTpins-mdioYZgpio-keys-pinspinsji2c6-pinsNpinsmmc0-default-pins=pins-clkzfpins-cmd-dat$~}|{wvutyepins-rstxemmc0-uhs-pins>pins-clkzfpins-cmd-dat$~}|{wvutyepins-dsfpins-rstxemmc1-default-pinsApins-clkofpins-cmd-datnpqrsepins-insertmmc1-uhs-pinsBpins-clkofpins-cmd-datnpqrseuart0-pins.pinsbcuart1-pins/pinsfgsyscon@10006000)mediatek,mt8195-scpsyssysconsimple-mfd`power-controller!mediatek,mt8195-power-controller+*power-domain@8+power-domain@9 (mfgalt4+power-domain@10 power-domain@11 power-domain@12 power-domain@13 power-domain@14power-domain@15 @AK   (vppsysvppsys1vppsys2vppsys3vppsys4vppsys5vppsys6vppsys7vppsys0-0vppsys0-1vppsys0-2vppsys0-3vppsys0-4vppsys0-5vppsys0-6vppsys0-7vppsys0-8vppsys0-9vppsys0-10vppsys0-11vppsys0-12vppsys0-13vppsys0-14vppsys0-15vppsys0-16vppsys0-17vppsys0-184+power-domain@24(vdec1-04power-domain@27 (venc1-larb4power-domain@168$%&'()D(vdosys0vdosys0-0vdosys0-1vdosys0-2vdosys0-3vdosys0-4vdosys0-54+power-domain@17(vppsys1vppsys1-0vppsys1-14power-domain@22 $(wepsys-0wepsys-1wepsys-2wepsys-34power-domain@23 (vdec0-04power-domain@25!(vdec2-04power-domain@26" (venc0-larb4power-domain@18 ###&(vdosys1vdosys1-0vdosys1-1vdosys1-24+power-domain@194power-domain@204power-domain@21Q(hdmi_txpower-domain@28$$  (img-0img-14+power-domain@29power-domain@30$%(ipeipe-0ipe-14power-domain@31(&&&&&(cam-0cam-1cam-2cam-3cam-44+power-domain@32 power-domain@33!power-domain@34"power-domain@04power-domain@14power-domain@2power-domain@3power-domain@457(csi_rx_topcsi_rx_top1power-domain@5' (etherpower-domain@6Xn (adspadsp1+4power-domain@7 g"n2(audioaudio1audio2audio34watchdog@10007000mediatek,mt8195-wdtFpo-syscon@1000c000"mediatek,mt8195-apmixedsyssyscontimer@10017000,mediatek,mt8195-timermediatek,mt6765-timerp[ (pwrap@10024000mediatek,mt8195-pwrapsyscon@|pwrap[ (spiwrap^$npmicmediatek,mt6359Q) mt6359codecregulatorsbuck_vs1vs1 5!buck_vgpu11vgpu117 buck_vmodemvmodem*buck_vpuvpu7 buck_vcorevcore  buck_vs2vs2 5jbuck_vpavpa 7,buck_vproc2vproc27L buck_vproc1vproc17L buck_vcore_sshub vcore_sshub7buck_vgpu11_sshub vgpu11_sshub7ldo_vaud18vaud18w@w@ldo_vsim1vsim1/M`ldo_vibrvibrO2Zldo_vrf12vrf12 ldo_vusbvusb--;ldo_vsram_proc2 vsram_proc2 Lldo_vio18vio18ldo_vcamiovcamioldo_vcn18vcn18w@w@ldo_vfe28vfe28**xldo_vcn13vcn13  ldo_vcn33_1_bt vcn33_1_bt*5gldo_vcn33_1_wifi vcn33_1_wifi*5gldo_vaux18vaux18w@w@ldo_vsram_others vsram_others ldo_vefusevefuseldo_vxo22vxo22w@!ldo_vrfckvrfck`ldo_vrfck_1vrfckjldo_vbif28vbif28**ldo_vio28vio28*2Zldo_vemcvemc,@ 2Zldo_vemc_1vemc&%2Z?ldo_vcn33_2_bt vcn33_2_bt*5gldo_vcn33_2_wifi vcn33_2_wifi*5gldo_va12va12O ldo_va09va09 5Oldo_vrf18vrf18Pldo_vsram_md vsram_md *ldo_vufsvufs@ldo_vm18vm18ldo_vbbckvbbckOldo_vsram_proc1 vsram_proc1 Lldo_vsim2vsim2/M`ldo_vsram_others_sshubvsram_others_sshub mt6359rtcmediatek,mt6358-rtcspmi@10027000mediatek,mt8195-spmi p |pmifspmimstE((pmif_sys_ckpmif_tmr_ckspmimst_clk_mux^$ninfra-iommu@10315000mediatek,mt8195-iommu-infra1PPP[5Hmailbox@10320000mediatek,mt8195-gce2@[Bmailbox@10330000mediatek,mt8195-gce3@[B`scp@10500000mediatek,mt8195-scp0Prp|sramcfgl1tcm[ kdisabled~clock-controller@10720000mediatek,mt8195-scp_adspr)dsp@10803000mediatek,mt8195-dsp 0 |cfgsram,Xn)#K(adsp_selclk26m_ckaudio_local_busmainpll_d7_d2scp_adsp_audiodspaudio_hN*\rxtxg+, kdisabledmailbox@10816000mediatek,mt8195-adsp-mboxB`[+mailbox@10817000mediatek,mt8195-adsp-mboxBp[,mt8195-afe-pcm@10890000mediatek,mt8195-audionN*[6- audiosysg"#neabcd2)(clk26mapll1_ckapll2_ckapll12_div0apll12_div1apll12_div2apll12_div3apll12_div9a1sys_hp_selaud_intbus_selaudio_h_selaudio_local_bus_seldptx_m_seli2so1_m_seli2so2_m_seli2si1_m_seli2si2_m_selinfra_ao_audio_26m_bscp_adsp_audiodsp kdisabledserial@11001100*mediatek,mt8195-uartmediatek,mt6577-uart[  (baudbuskokaydefault.serial@11001200*mediatek,mt8195-uartmediatek,mt6577-uart[  (baudbuskokaydefault/serial@11001300*mediatek,mt8195-uartmediatek,mt6577-uart[  (baudbus kdisabledserial@11001400*mediatek,mt8195-uartmediatek,mt6577-uart[  (baudbus kdisabledserial@11001500*mediatek,mt8195-uartmediatek,mt6577-uart[  (baudbus kdisabledserial@11001600*mediatek,mt8195-uartmediatek,mt6577-uart[  (baudbus kdisabledauxadc@11002000.mediatek,mt8195-auxadcmediatek,mt8173-auxadc (main kdisabledsyscon@11003000"mediatek,mt8195-pericfg_aosyscon0'spi@1100a000(mediatek,mt8195-spimediatek,mt6765-spi+[(parent-clksel-clkspi-clk kdisabledthermal-sensor@1100b000mediatek,mt8195-lvts-ap[01$lvts-calib-data-1lvts-calib-data-2pwm@1100e0002mediatek,mt8195-disp-pwmmediatek,mt8183-disp-pwm[N**0(mainmm kdisabledpwm@1100f0002mediatek,mt8195-disp-pwmmediatek,mt8183-disp-pwm[+N(mainmm kdisabledspi@11010000(mediatek,mt8195-spimediatek,mt6765-spi+[3(parent-clksel-clkspi-clk kdisabledspi@11012000(mediatek,mt8195-spimediatek,mt6765-spi+ [4(parent-clksel-clkspi-clk kdisabledspi@11013000(mediatek,mt8195-spimediatek,mt6765-spi+0[5(parent-clksel-clkspi-clk kdisabledspi@11018000(mediatek,mt8195-spimediatek,mt6765-spi+[<(parent-clksel-clkspi-clk kdisabledspi@11019000(mediatek,mt8195-spimediatek,mt6765-spi+[=(parent-clksel-clkspi-clk kdisabledspi@1101d000mediatek,mt8195-spi-slave[R(spi^n kdisabledspi@1101e000mediatek,mt8195-spi-slave[S(spi^n kdisabledethernet@11021000&mediatek,mt8195-gmacsnps,dwmac-5.10a@[macirq.(axiapbmac_mainptp_refrmii_internalmac_cg0''RST' ^RSTnN* 2,3?4R]hkokay urgmii-id~5 ] '8defaultsleep67mdiosnps,dwmac-mdio+ethernet-phy@15stmmac-axi-config2rx-queues-config3queue0 queue1 queue2 queue3 tx-queues-config4J4queue0\ hqueue1\ hqueue2\ hqueue3\ husb@11200000'mediatek,mt8195-xhcimediatek,mtk-xhci   > |macippc[v89^,-n$/B$(sys_ckref_ckmcu_ckdma_ckxhci_ck {:gkokay;<mmc@11230000(mediatek,mt8195-mmcmediatek,mt8183-mmc #[(sourcehclksource_cgkokaydefaultstate_uhs=> !L0?<@Immc@11240000(mediatek,mt8195-mmcmediatek,mt8183-mmc $[$(sourcehclksource_cg^nkokaydefaultstate_uhsAB W `q~0C<Dmmc@11250000(mediatek,mt8195-mmcmediatek,mt8183-mmc %[ I(sourcehclksource_cg^ n kdisabledthermal-sensor@11278000mediatek,mt8195-lvts-mcu'[01$lvts-calib-data-1lvts-calib-data-2usb@11290000'mediatek,mt8195-xhcimediatek,mtk-xhci ))> |macippc[vE^./n$''$(sys_ckref_ckmcu_ckdma_ckxhci_ck {:hkokay;usb@112a0000'mediatek,mt8195-xhcimediatek,mtk-xhci **> |macippc[vF^01n ''$(sys_ckref_ckmcu_ckdma_ckxhci_ck {:ikokay;usb@112b0000'mediatek,mt8195-xhcimediatek,mtk-xhci ++> |macippc[vG^23n '' $(sys_ckref_ckmcu_ckdma_ckxhci_ck {:jkokay;pcie@112f0000*mediatek,mt8195-pciemediatek,mt8192-pciepci+/@ |pcie-mac[8 H0V#&+K'/(pl_250mtl_26mtl_96mtl_32kperi_26mperi_mem^GnvI pcie-phyN*mac)`JJJJ kdisabledinterrupt-controllerQ)Jpcie@112f8000*mediatek,mt8195-pciemediatek,mt8192-pciepci+/@ |pcie-mac[8$$ $ $ H(WXQ'/(pl_250mtl_26mtl_96mtl_32kperi_26mperi_mem^HnvK pcie-phyN*mac)`LLLL kdisabledinterrupt-controllerQ)Lspi@1132c000(mediatek,mt8195-normediatek,mt8173-nor2[9o'' (spisfaxi+ kdisabledefuse@11c10000%mediatek,mt8195-efusemediatek,efuse+usb3-tx-imp@184,1Vusb3-rx-imp@184,2Uusb3-intr@185Tusb3-tx-imp@186,1Susb3-rx-imp@186,2Rusb3-intr@187Qusb2-intr-p0@188,1usb2-intr-p1@188,2usb2-intr-p2@189,1usb2-intr-p3@189,2pciephy-rx-ln1@190,1]pciephy-tx-ln1-nmos@190,2\pciephy-tx-ln1-pmos@191,1[pciephy-rx-ln0@191,2Zpciephy-tx-ln0-nmos@192,1Ypciephy-tx-ln0-pmos@192,2Xpciephy-glb-intr@193Wdp-data@1aclvts1-calib@1bc0lvts2-calib@1d081t-phy@11c40000.mediatek,mt8195-tphymediatek,generic-tphy-v3+kokayusb-phy@0(refFt-phy@11c50000.mediatek,mt8195-tphymediatek,generic-tphy-v3+kokayusb-phy@0(refGi2c@11d00000(mediatek,mt8195-i2cmediatek,mt8192-i2c "[M; (maindma+ kdisabledi2c@11d01000(mediatek,mt8195-i2cmediatek,mt8192-i2c "[M; (maindma+kokay#Ndefaultpmic@34mediatek,mt63604Q) eIRQBchargermediatek,mt6360-chg@usb-otg-vbus-regulator usb-otg-vbus usb-otg-vbusC(X<regulatormediatek,mt6360-regulator Obuck1 BUCK1 mt6360,buck1  buck2 BUCK2 mt6360,buck2  Oldo1 LDO1 mt6360,ldo1O6ldo2 LDO2 mt6360,ldo2O6ldo3 LDO3 mt6360,ldo3O6Dldo5 LDO5 mt6360,ldo5)26Cldo6 LDO6 mt6360,ldo6  ldo7 LDO7 mt6360,ldo7  i2c@11d02000(mediatek,mt8195-i2cmediatek,mt8192-i2c  "[M; (maindma+ kdisabledclock-controller@11d03000mediatek,mt8195-imp_iic_wrap_s0Mi2c@11e00000(mediatek,mt8195-i2cmediatek,mt8192-i2c "[P; (maindma+ kdisabledi2c@11e01000(mediatek,mt8195-i2cmediatek,mt8192-i2c "[P; (maindma+ kdisabledi2c@11e02000(mediatek,mt8195-i2cmediatek,mt8192-i2c  "[P; (maindma+ kdisabledi2c@11e03000(mediatek,mt8195-i2cmediatek,mt8192-i2c 0"[P; (maindma+ kdisabledi2c@11e04000(mediatek,mt8195-i2cmediatek,mt8192-i2c @"[P; (maindma+ kdisabledclock-controller@11e05000mediatek,mt8195-imp_iic_wrap_wPPt-phy@11e30000.mediatek,mt8195-tphymediatek,generic-tphy-v3+N*kokayusb-phy@0  (refda_refEusb-phy@700 (refda_ref QRSintrrx_imptx_impKt-phy@11e40000.mediatek,mt8195-tphymediatek,generic-tphy-v3+kokayusb-phy@0  (refda_ref8usb-phy@700 (refda_ref TUVintrrx_imptx_imp9phy@11e80000mediatek,mt8195-pcie-phy|sifWXYZ[\]Gglb_intrtx_ln0_pmostx_ln0_nmosrx_ln0tx_ln1_pmostx_ln1_nmosrx_ln1N* kdisabledIufs-phy@11fa0000.mediatek,mt8195-ufsphymediatek,mt8183-ufsphy (unipromp kdisabledgpu@13000000>mediatek,mt8195-malimediatek,mt8192-maliarm,mali-valhall-jm@^0[ jobmmugpu (_(N* * * * *