8H($mediatek,mt8192-evbmediatek,mt8192 +!7MediaTek MT8192 evaluation boardaliases=/soc/ovl@14005000B/soc/ovl@14006000J/soc/ovl@14014000R/soc/rdma@14007000X/soc/rdma@14015000^/soc/serial@11002000fixed-factor-clock-13mfixed-factor-clockfszclk13m$oscillator0 fixed-clockfclk26moscillator1 fixed-clockfclk32kcpus+cpu@0cpuarm,cortex-a55psciec3@@!@3@Qe cpu@100cpuarm,cortex-a55psciec3@@!@3@Qe cpu@200cpuarm,cortex-a55psciec3@@!@3@Qe cpu@300cpuarm,cortex-a55psciec3@@!@3@Qe cpu@400cpuarm,cortex-a76pscif@!@3@ Qecpu@500cpuarm,cortex-a76pscif@!@3@ Qecpu@600cpuarm,cortex-a76pscif@!@3@ Qecpu@700cpuarm,cortex-a76pscif@!@3@ Qecpu-mapcluster0core0x core1x core2x core3x core4xcore5xcore6xcore7xl2-cache0cache|@ @l2-cache1cache|@ @ l3-cachecache| @ idle-statespscicpu-retention-larm,idle-state7 cpu-retention-barm,idle-state#cpu-off-larm,idle-state<\cpu-off-barm,idle-state( pmu-a55arm,cortex-a55-pmu pmu-a76arm,cortex-a76-pmu psci arm,psci-1.0smctimerarm,armv8-timer @   ]@opp-table-0operating-points-v23opp-358000000V @*opp-399000000A popp-4400000009 opp-482000000 Ҧopp-523000000,X zopp-564000000! 4Nopp-605000000$@ e"opp-647000000&o opp-688000000)  opp-724000000+'] opp-748000000, @opp-772000000. qopp-795000000/b opp-8190000000 Xopp-8430000002?( ,opp-8660000003 5soc+ simple-bus(,performance-controller@11bc10mediatek,cpufreq-hw  0 3interrupt-controller@c000000 arm,gic-v3M^ u    ppi-partitionsinterrupt-partition-0 interrupt-partition-1syscon@10000000 mediatek,mt8192-topckgensysconfsyscon@10001000 mediatek,mt8192-infracfgsysconfsyscon@10003000mediatek,mt8192-pericfgsyscon0f(pinctrl@10005000mediatek,mt8192-pinctrlP]iocfg0iocfg_rmiocfg_bmiocfg_bliocfg_briocfg_lmiocfg_lbiocfg_rtiocfg_ltiocfg_tleintuMsyscon@10006000)mediatek,mt8192-scpsyssysconsimple-mfd`power-controller!mediatek,mt8192-power-controller+*power-domain@0s:/audioaudio1audio2power-domain@1sconnpower-domain@2s mfgalt+power-domain@3+power-domain@4power-domain@5power-domain@6power-domain@7power-domain@8power-domain@9 (s !dispdisp-0disp-1disp-2disp-3+power-domain@10 (sipeipe-0ipe-1ipe-2ipe-3power-domain@11 sispisp-0isp-1power-domain@12 sisp2isp2-0isp2-1power-domain@13 s mdpmdp-0power-domain@14s3 vencvenc-0power-domain@15 s4vdecvdec-0vdec-1vdec-2+power-domain@16svdec2-0vdec2-1vdec2-2power-domain@17(s   camcam-0cam-1cam-2cam-3+power-domain@18s! cam_rawa-0power-domain@19s" cam_rawb-0power-domain@20s# cam_rawc-0watchdog@10007000mediatek,mt8192-wdtp)syscon@1000c000"mediatek,mt8192-apmixedsyssysconf'timer@10017000,mediatek,mt8192-timermediatek,mt6765-timerps$pwrap@10026000mediatek,mt6873-pwrap`pwraps spiwrappmicmediatek,mt6359uMmt6359codecregulatorsbuck_vs1+vs1: 5R!jbuck_vgpu11+vgpu11:R7j buck_vmodem+vmodem:R*jbuck_vpu+vpu:R7j buck_vcore+vcore:R j buck_vs2+vs2: 5Rjjbuck_vpa+vpa: R7j,buck_vproc2+vproc2:R7Lj buck_vproc1+vproc1:R7Lj buck_vcore_sshub +vcore_sshub:R7buck_vgpu11_sshub +vgpu11_sshub:R7ldo_vaud18+vaud18:w@Rw@jldo_vsim1+vsim1:R/M`ldo_vibr+vibr:OR2Zldo_vrf12+vrf12:R ldo_vusb+vusb:-R-jldo_vsram_proc2 +vsram_proc2: RLjldo_vio18+vio18:Rjldo_vcamio+vcamio:Rldo_vcn18+vcn18:w@Rw@jldo_vfe28+vfe28:*R*jxldo_vcn13+vcn13: R ldo_vcn33_1_bt +vcn33_1_bt:*R5gldo_vcn33_1_wifi +vcn33_1_wifi:*R5gldo_vaux18+vaux18:w@Rw@jldo_vsram_others +vsram_others: Rjldo_vefuse+vefuse:Rldo_vxo22+vxo22:w@R!ldo_vrfck+vrfck:`Rldo_vrfck_1+vrfck:Rjldo_vbif28+vbif28:*R*jldo_vio28+vio28:*R2Zldo_vemc+vemc:,@ R2Zldo_vemc_1+vemc:&%R2Zldo_vcn33_2_bt +vcn33_2_bt:*R5gldo_vcn33_2_wifi +vcn33_2_wifi:*R5gldo_va12+va12:OR ldo_va09+va09: 5ROldo_vrf18+vrf18:RPldo_vsram_md +vsram_md: R*jldo_vufs+vufs:Rldo_vm18+vm18:Rldo_vbbck+vbbck:ROldo_vsram_proc1 +vsram_proc1: RLjldo_vsim2+vsim2:R/M`ldo_vsram_others_sshub+vsram_others_sshub: Rmt6359rtcmediatek,mt6358-rtcspmi@10027000mediatek,mt6873-spmi p pmifspmimsts8(pmif_sys_ckpmif_tmr_ckspmimst_clk_muxmailbox@10228000mediatek,mt8192-gce"@sgce4clock-controller@10720000mediatek,mt8192-scp_adsprffailserial@11002000*mediatek,mt8192-uartmediatek,mt6577-uart m s baudbusokayserial@11003000*mediatek,mt8192-uartmediatek,mt6577-uart0n s baudbus disabledclock-controller@11007000mediatek,mt8192-imp_iic_wrap_cpfspi@1100a000(mediatek,mt8192-spimediatek,mt6765-spi+sMparent-clksel-clkspi-clk disabledpwm@1100e000mediatek,mt8183-disp-pwms!8mainmm disabledspi@11010000(mediatek,mt8192-spimediatek,mt6765-spi+sM<parent-clksel-clkspi-clk disabledspi@11012000(mediatek,mt8192-spimediatek,mt6765-spi+ sM>parent-clksel-clkspi-clk disabledspi@11013000(mediatek,mt8192-spimediatek,mt6765-spi+0sM?parent-clksel-clkspi-clk disabledspi@11018000(mediatek,mt8192-spimediatek,mt6765-spi+sMLparent-clksel-clkspi-clk disabledspi@11019000(mediatek,mt8192-spimediatek,mt6765-spi+sMMparent-clksel-clkspi-clk disabledspi@1101d000(mediatek,mt8192-spimediatek,mt6765-spi+sMmparent-clksel-clkspi-clk disabledspi@1101e000(mediatek,mt8192-spimediatek,mt6765-spi+sMnparent-clksel-clkspi-clk disabledscp@10500000mediatek,mt8192-scp0Prpsramcfgl1tcmsmain disabledGusb@11200000'mediatek,mt8192-xhcimediatek,mtk-xhci   > macippcahost %&"#]] s7'R$sys_ckref_ckmcu_ckdma_ckxhci_ck ( f disabledsyscon@11210000mediatek,mt8192-audsyssyscon! f+mt8192-afe-pcmmediatek,mt8192-audio3) :audiosysF'Zl*s+++++++++++ + ++++++++/:H/e0i+g,k;<=>?@ABCD7uaud_afe_clkaud_dac_clkaud_dac_predis_clkaud_adc_clkaud_adda6_adc_clkaud_apll22m_clkaud_apll24m_clkaud_apll1_tuner_clkaud_apll2_tuner_clkaud_tdm_clkaud_tml_clkaud_nleaud_dac_hires_clkaud_adc_hires_clkaud_adc_hires_tmlaud_adda6_adc_hires_clkaud_3rd_dac_clkaud_3rd_dac_predis_clkaud_3rd_dac_tmlaud_3rd_dac_hires_clkaud_infra_clkaud_infra_26m_clktop_mux_audiotop_mux_audio_inttop_mainpll_d4_d4top_mux_aud_1top_apll1_cktop_mux_aud_2top_apll2_cktop_mux_aud_eng1top_apll1_d4top_mux_aud_eng2top_apll2_d4top_i2s0_m_seltop_i2s1_m_seltop_i2s2_m_seltop_i2s3_m_seltop_i2s4_m_seltop_i2s5_m_seltop_i2s6_m_seltop_i2s7_m_seltop_i2s8_m_seltop_i2s9_m_seltop_apll12_div0top_apll12_div1top_apll12_div2top_apll12_div3top_apll12_div4top_apll12_divbtop_apll12_div5top_apll12_div6top_apll12_div7top_apll12_div8top_apll12_div9top_mux_audio_htop_clk26m_clkpcie@11230000mediatek,mt8192-pciepci#  pcie-mac+0s+'*j^\/pl_250mtl_26mtl_96mtl_32kperi_26mtop_133m)Qz8,M`,,,,interrupt-controlleruM,spi@11234000mediatek,mt8192-nor#@s:w] spisfaxi:+ disabledefuse@11c10000%mediatek,mt8192-efusemediatek,efuse+data1@1c0Xcalib@580hi2c@11cb0000mediatek,mt8192-i2c !sss-x maindmaz+ disabledclock-controller@11cb1000mediatek,mt8192-imp_iic_wrap_ef-i2c@11d00000mediatek,mt8192-i2c !vws.x maindmaz+ disabledi2c@11d01000mediatek,mt8192-i2c !wxs.x maindmaz+ disabledi2c@11d02000mediatek,mt8192-i2c  !yys.x maindmaz+ disabledclock-controller@11d03000mediatek,mt8192-imp_iic_wrap_s0f.i2c@11d20000mediatek,mt8192-i2c !qqs/x maindmaz+ disabledi2c@11d21000mediatek,mt8192-i2c !qrs/x maindmaz+ disabledi2c@11d22000mediatek,mt8192-i2c  !sts/x maindmaz+ disabledclock-controller@11d23000 mediatek,mt8192-imp_iic_wrap_ws0f/i2c@11e00000mediatek,mt8192-i2c !uus0x maindmaz+ disabledclock-controller@11e01000mediatek,mt8192-imp_iic_wrap_wf0t-phy@11e40000.mediatek,mt8192-tphymediatek,generic-tphy-v2+,usb-phy@0sref%usb-phy@700 sref&dsi-phy@11e50000mediatek,mt8183-mipi-txs' f mipi_tx0_pll disabled7i2c@11f00000mediatek,mt8192-i2c !pps1x maindmaz+ disabledi2c@11f01000mediatek,mt8192-i2c !uvs1x maindmaz+ disabledclock-controller@11f02000mediatek,mt8192-imp_iic_wrap_n f1clock-controller@11f10000mediatek,mt8192-msdc_topf2mmc@11f60000(mediatek,mt8192-mmcmediatek,mt8183-mmc c8s2 222223sourcehclksource_cgsys_cgpclk_cgaxi_cgahb_cg disabledmmc@11f70000(mediatek,mt8192-mmcmediatek,mt8183-mmc g8s2 222223sourcehclksource_cgsys_cgpclk_cgaxi_cgahb_cg disabledgpu@13000000)mediatek,mt8192-maliarm,mali-valhall-jm@0mlk jobmmugpus'(l*****core0core1core2core3core43 disabledclock-controller@13fbf000mediatek,mt8192-mfgcfgfsyscon@14000000mediatek,mt8192-mmsyssysconf444mutex@14001000mediatek,mt8192-disp-mutexs4l* smi@14002000mediatek,mt8192-smi-common  s apbsmigals0gals1l* 5larb@14003000mediatek,mt8192-smi-larb0 5sapbsmil* 8larb@14004000mediatek,mt8192-smi-larb@ 5sapbsmil* 9ovl@14005000mediatek,mt8192-disp-ovlPs(66l* 4Povl@14006000mediatek,mt8192-disp-ovl-2l`l* s(6"6 4`rdma@140070004mediatek,mt8192-disp-rdmamediatek,mt8183-disp-rdmaps(6/l* 4pcolor@140090006mediatek,mt8192-disp-colormediatek,mt8173-disp-colorl* s4ccorr@1400a000mediatek,mt8192-disp-ccorrl* s 4aal@1400b0002mediatek,mt8192-disp-aalmediatek,mt8183-disp-aall* s4gamma@1400c0006mediatek,mt8192-disp-gammamediatek,mt8183-disp-gammal* s 4postmask@1400d000mediatek,mt8192-disp-postmaskl* s 4dither@1400e0008mediatek,mt8192-disp-dithermediatek,mt8183-disp-ditherl* s 4dsi@14010000mediatek,mt8183-dsi s 7enginedigitalhs 7Gdphyl* 3 disabledportendpointovl@14014000mediatek,mt8192-disp-ovl-2l@ l* s(6#6!4@rdma@140150004mediatek,mt8192-disp-rdmamediatek,mt8183-disp-rdmaP l* s(6%/4Pdpi@14016000mediatek,mt8192-dpi`s!'pixelenginepll disabledm4u@1401d000mediatek,mt8192-m4u<Q89:;<=>?@ABCDEFsbclkl* `6clock-controller@15020000mediatek,mt8192-imgsysflarb@1502e000mediatek,mt8192-smi-larb 5sapbsmil* >clock-controller@15820000mediatek,mt8192-imgsys2flarb@1582e000mediatek,mt8192-smi-larb 5sapbsmil* ?video-codec@16000000mediatek,mt8192-vcodec-decmG(6+,`video-codec@10000mediatek,mtk-vcodec-lat@(66666666(s4Fselsoc-vdecsoc-latvdectop4Fl*video-codec@25000mediatek,mtk-vcodec-corePX(66666666666(s4Fselsoc-vdecsoc-latvdectop4Fl*larb@1600d000mediatek,mt8192-smi-larb 5sapbsmil*<clock-controller@1600f000mediatek,mt8192-vdecsys_socflarb@1602e000mediatek,mt8192-smi-larb 5sapbsmil*;clock-controller@1602f000mediatek,mt8192-vdecsysfclock-controller@17000000mediatek,mt8192-vencsysflarb@17010000mediatek,mt8192-smi-larb 5sapbsmil*=vcodec@17020000mediatek,mt8192-vcodec-enc X(666666666665mGl*s venc_sel3Wclock-controller@1a000000mediatek,mt8192-camsysf larb@1a001000mediatek,mt8192-smi-larb 5s  apbsmil*@larb@1a002000mediatek,mt8192-smi-larb  5s  apbsmil*Alarb@1a00f000mediatek,mt8192-smi-larb 5s!!apbsmil*Blarb@1a010000mediatek,mt8192-smi-larb 5s""apbsmil*Clarb@1a011000mediatek,mt8192-smi-larb 5s##apbsmil*Dclock-controller@1a04f000mediatek,mt8192-camsys_rawaf!clock-controller@1a06f000mediatek,mt8192-camsys_rawbf"clock-controller@1a08f000mediatek,mt8192-camsys_rawcf#clock-controller@1b000000mediatek,mt8192-ipesysflarb@1b00f000mediatek,mt8192-smi-larb 5sapbsmil* Flarb@1b10f000mediatek,mt8192-smi-larb 5sapbsmil* Eclock-controller@1f000000mediatek,mt8192-mdpsysflarb@1f002000mediatek,mt8192-smi-larb  5sapbsmil* :chosenzserial0:921600n8memory@40000000memory@ compatibleinterrupt-parent#address-cells#size-cellsmodelovl0ovl-2l0ovl-2l2rdma0rdma4serial0#clock-cellsclocksclock-divclock-multclock-output-namesphandleclock-frequencydevice_typeregenable-methodcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheperformance-domainscapacity-dmips-mhzcpucache-levelcache-unifiedentry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-usinterruptsopp-sharedopp-hzopp-microvoltdma-ranges#performance-domain-cells#interrupt-cells#redistributor-regionsinterrupt-controlleraffinity#reset-cellsreg-namesgpio-controller#gpio-cellsgpio-ranges#power-domain-cellsclock-namesmediatek,infracfgassigned-clocksassigned-clock-parentsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-enable-ramp-delayregulator-always-onregulator-ramp-delayregulator-allowed-modes#mbox-cellsstatus#pwm-cellsinterrupts-extendedinterrupt-namesphyswakeup-sourcemediatek,syscon-wakeupresetsreset-namesmediatek,apmixedsysmediatek,topckgenpower-domainsbus-rangeinterrupt-map-maskinterrupt-map#phy-cellspower-domain-namesoperating-points-v2mboxesmediatek,gce-client-regmediatek,gce-eventsmediatek,larb-idmediatek,smiiommusmediatek,rdma-fifo-sizephy-namesmediatek,larbs#iommu-cellsmediatek,scpstdout-path