f8}(b|$mediatek,mt8173-evbmediatek,mt8173 +!7MediaTek MT8173 evaluation board =embeddedaliasesJ/soc/ovl@1400c000O/soc/ovl@1400d000T/soc/rdma@1400e000Z/soc/rdma@1400f000`/soc/rdma@14010000f/soc/wdma@14011000l/soc/wdma@14012000r/soc/color@14013000y/soc/color@14014000/soc/split@14018000/soc/split@14019000/soc/dpi@1401d000/soc/dsi@1401b000/soc/dsi@1401c000/soc/rdma@14001000/soc/rdma@14002000/soc/rsz@14003000/soc/rsz@14004000/soc/rsz@14005000/soc/wdma@14006000/soc/wrot@14007000/soc/wrot@14008000/soc/serial@11002000/soc/serial@11003000/soc/serial@11004000/soc/serial@11005000opp-table-0operating-points-v2  opp-50700000084$ xopp-702000000)׫$ opp-1001000000; @$opp-1105000000A@$ehopp-1209000000H@$opp-1300000000M|m$ opp-1508000000YA$opp-1703000000e$*opp-table-1operating-points-v2  opp-50700000084$ `opp-702000000)׫$ :opp-1001000000; @$%opp-1209000000H@$@opp-1404000000SW$]opp-1612000000`+$opp-1807000000k$opp-2106000000}$*cpus+cpu-mapcluster0core02core12cluster1core02core12cpu@06cpuarm,cortex-a53BFpsciTds cpuintermediate  cpu@16cpuarm,cortex-a53BFpsciTds cpuintermediate  cpu@1006cpuarm,cortex-a72BFpsciTdscpuintermediate   cpu@1016cpuarm,cortex-a72BFpsciTdscpuintermediate   idle-statespscicpu-sleep-0arm,idle-state@/pmu_a53arm,cortex-a53-pmuF Qpmu_a72arm,cortex-a72-pmuF  Qpsci#arm,psci-1.0arm,psci-0.2arm,psciMsmcdpxoscillator0 fixed-clockclk26moscillator1 fixed-clock}clk32koscillator2 fixed-clockcpum_ckthermal-zonescpu-thermaltripstrip-point0 Epassivetrip-point1LEpassivecpu_crit08 Ecriticalcooling-mapsmap0  map1  reserved-memory+-vpu_dma_mem_region@b7000000shared-dma-poolBP4>timerarm,armv8-timer 0F   Esoc+ simple-bus-clock-controller@10000000mediatek,mt8173-topckgenBpower-controller@10001000 mediatek,mt8173-infracfgsysconB\power-controller@10003000mediatek,mt8173-pericfgsysconB0\syscfg_pctl_a@10005000%mediatek,mt8173-pctl-a-syscfgsysconBPpinctrl@1000b000mediatek,mt8173-pinctrlBi~$FxxxApins1i2c0pins1-.i2c1 pins1}~i2c2!pins1+,i2c3%pins1jki2c4&pins1i2c6'pins1dedisp_pwm0_pins?pins1Wmmc0default(pins_cmd_dat$9:;<=>?@Bpins_clkApins_rstDmmc1default,pins_cmd_datIJKLNfpins_clkMpins_insertmmc0)pins_cmd_dat$9:;<=>?@Bepins_clkAepins_rstDmmc1-pins_cmd_datIJKLNfpins_clkMfusb_iddig_pull_up6pins_iddigusb_iddig_pull_downpins_iddigspi0"pins_spiEFGHsyscon@10006000)mediatek,mt8173-scpsyssysconsimple-mfdB`power-controller!mediatek,mt8173-power-controller+power-domain@0BUmmpower-domain@1BUXmmvencpower-domain@2BUmmpower-domain@3BUmm+power-domain@4BUi mmvencltpower-domain@5Bpower-domain@6Bpower-domain@7Bmfg+=power-domain@8B+power-domain@9B +watchdog@10007000(mediatek,mt8173-wdtmediatek,mt6589-wdtBptimer@10008000,mediatek,mt8173-timermediatek,mt6577-timerB F xpwrap@1000d000mediatek,mt8173-pwrapBKpwrap FU\pwrap   spiwraphpmicmediatek,mt6397 F mt6397regulatormediatek,mt6397-regulatorbuck_vpca15 vbuck_vpca15vpca15 `p0 buck_vpca7 vbuck_vpca7vpca7 `p0sbuck_vsramca15vbuck_vsramca15 vsramca15 `p0buck_vsramca7vbuck_vsramca7 vsramca7 `p0 buck_vcore vbuck_vcorevcore `p0buck_vgpu vbuck_vgpuvgpu `p0sbuck_vdrm vbuck_vdrmvdrmO\0buck_vio18 vbuck_vio18vio18 6`0+ldo_vtcxo vldo_vtcxovtcxoldo_va28 vldo_va28va28ldo_vcama vldo_vcamavcama`*ldo_vio28 vldo_vio28vio28ldo_vusb vldo_vusbvusb3ldo_vmcvldo_vmcvmcw@2Z/ldo_vmch vldo_vmchvmch-2Z.ldo_vemc3v3 vldo_vemc3v3 vemc_3v3-2Z*ldo_vgp1 vldo_vgp1vcamd2Zldo_vgp2 vldo_vgp2vcamioB@2Zldo_vgp3 vldo_vgp3vcamafO2Zldo_vgp4 vldo_vgp4vgp4O2Zldo_vgp5 vldo_vgp5vgp5O-ldo_vgp6 vldo_vgp6vgp6O2Zldo_vibr vldo_vibrvibr 2Zcec@10013000mediatek,mt8173-cecB0 F okayvpu@10020000mediatek,mt8173-vpu B Ktcmcfg_reg Fgmain;intpol-controller@10200620.mediatek,mt8173-sysirqmediatek,mt6577-sysirq B  iommu@10205000mediatek,mt8173-m4uB P Fbclk+$3:efuse@10206000mediatek,mt8173-efuseB `+calib@528B( $clock-controller@10209000mediatek,mt8173-apmixedsysB hdmi-phy@10209100mediatek,mt8173-hdmi-phyB $pll_refhdmitx_dig_cts@ OaokayBmailbox@10212000mediatek,mt8173-gceB!  Fgcel8dsi-phy@10215000mediatek,mt8173-mipi-txB!P mipi_tx0_plla disabled<dsi-phy@10216000mediatek,mt8173-mipi-txB!` mipi_tx1_plla disabled=interrupt-controller@10221000 arm,gic-400 @B"" "@ "`  F auxadc@11001000mediatek,mt8173-auxadcBmainx#serial@11002000*mediatek,mt8173-uartmediatek,mt6577-uartB  FS$ baudbusokayserial@11003000*mediatek,mt8173-uartmediatek,mt6577-uartB0 FT% baudbus disabledserial@11004000*mediatek,mt8173-uartmediatek,mt6577-uartB@ FU& baudbus disabledserial@11005000*mediatek,mt8173-uartmediatek,mt6577-uartBP FV' baudbus disabledi2c@11007000mediatek,mt8173-i2c Bpp FL  maindmadefault+ disabledi2c@11008000mediatek,mt8173-i2c Bp FM  maindmadefault +okayda9211@68 dlg,da9211BhregulatorsBUCKAVBUCKA `0C#' BUCKBVBUCKB `0-'i2c@11009000mediatek,mt8173-i2c Bp FN  maindmadefault!+ disabledspi@1100a000mediatek,mt8173-spi+B Fn4\parent-clksel-clkspi-clkokaydefault"thermal@1100b000mediatek,mt8173-thermalB FF thermauxadcU#($4calibration-dataspi@1100d000mediatek,mt8173-norBE\U!r spisfaxi+ disabledi2c@11010000mediatek,mt8173-i2c Bp FO  maindmadefault%+ disabledi2c@11011000mediatek,mt8173-i2c Bp FP  maindmadefault&+ disabledi2c@11012000mediatek,mt8173-hdmi-ddc FQB ddc-i2ci2c@11013000mediatek,mt8173-i2c B0p FR#  maindmadefault'+ disabledaudio-controller@11220000mediatek,mt8173-afe-pcmB" FhPdeybinfra_sys_audio_clktop_pdn_audiotop_pdn_aud_intbusbck0bck1i2s0_mi2s1_mi2s2_mi2s3_mi2s3_bEmnUmmc@11230000mediatek,mt8173-mmcB# FG_ sourcehclkokaydefaultstate_uhs(l)v* +mmc@11240000mediatek,mt8173-mmcB$ FHR sourcehclkokaydefaultstate_uhs,l-v$5 B. /mmc@11250000mediatek,mt8173-mmcB% FIR sourcehclk disabledmmc@11260000mediatek,mt8173-mmcB& FJu sourcehclk disabledusb@11271000#mediatek,mt8173-mtu3mediatek,mtu3 B'0( Kmacippc F@K012h ^sys_ckref_ck P+-okayg3u45otgdefault6usb@11270000'mediatek,mt8173-xhcimediatek,mtk-xhciB'Kmac Fsh ^sys_ckref_ckokayg3u7t-phy@11290000mediatek,mt8173-u3phyB)+-okayusb-phy@11290800B)refaokay0usb-phy@11290900B) refaokay1usb-phy@11291000B)refaokay2syscon@14000000mediatek,mt8173-mmsyssysconBhEUׄ\8889rdma@14001000-mediatek,mt8173-mdp-rdmamediatek,mt8173-mdpB99h:;rdma@14002000mediatek,mt8173-mdp-rdmaB 99h:rsz@14003000mediatek,mt8173-mdp-rszB09hrsz@14004000mediatek,mt8173-mdp-rszB@9hrsz@14005000mediatek,mt8173-mdp-rszBP9hwdma@14006000mediatek,mt8173-mdp-wdmaB`9 h:wrot@14007000mediatek,mt8173-mdp-wrotBp9 h:wrot@14008000mediatek,mt8173-mdp-wrotB9 h:ovl@1400c000mediatek,mt8173-disp-ovlB Fh9:8ovl@1400d000mediatek,mt8173-disp-ovlB Fh9:8rdma@1400e000mediatek,mt8173-disp-rdmaB Fh9:8rdma@1400f000mediatek,mt8173-disp-rdmaB Fh9:8rdma@14010000mediatek,mt8173-disp-rdmaB Fh9:8wdma@14011000mediatek,mt8173-disp-wdmaB Fh9:8wdma@14012000mediatek,mt8173-disp-wdmaB  Fh9:8 color@14013000mediatek,mt8173-disp-colorB0 Fh980color@14014000mediatek,mt8173-disp-colorB@ Fh98@aal@14015000mediatek,mt8173-disp-aalBP Fh98Pgamma@14016000mediatek,mt8173-disp-gammaB` Fh98`merge@14017000mediatek,mt8173-disp-mergeBph9split@14018000mediatek,mt8173-disp-splitBh9split@14019000mediatek,mt8173-disp-splitBh9ufoe@1401a000mediatek,mt8173-disp-ufoeB Fh98dsi@1401b000mediatek,mt8173-dsiB Fh9$9%<enginedigitalhsU9K<dphy disableddsi@1401c000mediatek,mt8173-dsiB Fh9&9'=enginedigitalhsK=dphy disableddpi@1401d000mediatek,mt8173-dpiB Fh9(9)pixelenginepllokayportendpoint>Cpwm@1401e0002mediatek,mt8173-disp-pwmmediatek,mt6595-disp-pwmB9!9 mainmmokaydefault?pwm@1401f0002mediatek,mt8173-disp-pwmmediatek,mt6595-disp-pwmB9#9"mainmm disabledmutex@14020000mediatek,mt8173-disp-mutexB Fh98 56larb@14021000mediatek,mt8173-smi-larbB@h99apbsmismi@14022000mediatek,mt8173-smi-commonB h99apbsmi@od@14023000mediatek,mt8173-disp-odB0980hdmi@14025000mediatek,mt8173-hdmiBP F 9,9-9.9/pixelpllbclkspdifdefaultAKBhdmi,9 EsUBokayports+port@0BendpointC>port@1BendpointDIlarb@14027000mediatek,mt8173-smi-larbBp@h9292apbsmiclock-controller@15000000mediatek,mt8173-imgsyssysconBElarb@15001000mediatek,mt8173-smi-larbB@hEEapbsmiclock-controller@16000000mediatek,mt8173-vdecsyssysconBFvcodec@16000000mediatek,mt8173-vcodec-decB 0@Phpx F@: :!:%:&:':":#:$;h@ >lWMiNZvcodecpllunivpll_d2clk_cci400_selvdec_selvdecpllvencpllvenc_lt_selvdec_bus_clk_src(EilW UN>MXU/larb@16010000mediatek,mt8173-smi-larbB@hFFapbsmiclock-controller@18000000mediatek,mt8173-vencsyssysconBGlarb@18001000mediatek,mt8173-smi-larbB@hGGapbsmivcodec@18002000mediatek,mt8173-vcodec-encB  FX:`:a:b:c:d:i:j:k:l:m:n;X venc_selEXUMhjpegdec@18004000mediatek,mt8173-jpgdecB@ FGGjpgdec-smijpgdech:g:hclock-controller@19000000!mediatek,mt8173-vencltsyssysconBHlarb@19001000mediatek,mt8173-smi-larbB@hHHapbsmivcodec@19002000mediatek,mt8173-vcodec-enc-vp8B  FH:::::::::;i venc_lt_selEiUNhmemory@400000006memoryB@chosenconnectorhdmi-connectorAhdmiEdportendpointIDextcon_iddiglinux,extcon-usb-gpio G5regulator-usb-p1regulator-fixed usb_vbusLK@LK@ JO7regulator-usb-p0regulator-fixedvbusLK@LK@ J O4 compatibleinterrupt-parent#address-cells#size-cellsmodelchassis-typeovl0ovl1rdma0rdma1rdma2wdma0wdma1color0color1split0split1dpi0dsi0dsi1mdp-rdma0mdp-rdma1mdp-rsz0mdp-rsz1mdp-rsz2mdp-wdma0mdp-wrot0mdp-wrot1serial0serial1serial2serial3opp-sharedphandleopp-hzopp-microvoltcpudevice_typeregenable-methodcpu-idle-states#cooling-cellsdynamic-power-coefficientclocksclock-namesoperating-points-v2capacity-dmips-mhzproc-supplysram-supplyentry-methodlocal-timer-stopentry-latency-usexit-latency-usmin-residency-usarm,psci-suspend-paraminterruptsinterrupt-affinitycpu_suspendcpu_offcpu_on#clock-cellsclock-frequencyclock-output-namespolling-delay-passivepolling-delaythermal-sensorssustainable-powertemperaturehysteresistripcooling-devicecontributionrangesalignmentno-maparm,no-tick-in-suspend#reset-cellsmediatek,pctl-regmapgpio-controller#gpio-cellsinterrupt-controller#interrupt-cellspinmuxinput-enablebias-pull-downbias-disableoutput-lowbias-pull-updrive-strength#power-domain-cellsmediatek,infracfgdomain-supplyreg-namesresetsreset-namespower-domainsregulator-compatibleregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-enable-ramp-delaystatusmemory-regionmediatek,larbs#iommu-cellsmediatek,ibiasmediatek,ibias_up#phy-cells#mbox-cells#io-channel-cellsclock-divpinctrl-namespinctrl-0regulator-min-microampregulator-max-microampmediatek,pad-select#thermal-sensor-cellsmediatek,auxadcmediatek,apmixedsysnvmem-cellsnvmem-cell-namesassigned-clocksassigned-clock-parentspinctrl-1bus-widthmax-frequencycap-mmc-highspeedmediatek,hs200-cmd-int-delaymediatek,hs400-cmd-int-delaymediatek,hs400-cmd-resp-sel-risingvmmc-supplyvqmmc-supplynon-removablecap-sd-highspeedsd-uhs-sdr25cd-gpiosphysmediatek,syscon-wakeupvusb33-supplyvbus-supplyextcondr_modewakeup-sourceassigned-clock-ratesmboxesmediatek,gce-client-regiommusmediatek,vpuphy-namesremote-endpoint#pwm-cellsmediatek,gce-eventsmediatek,smimediatek,syscon-hdmilabelid-gpioenable-active-high