8( `google,hana-rev6google,hana-rev5google,hana-rev4google,hana-rev3google,hanamediatek,mt8173 + 7Google Hanaaliases=/soc/ovl@1400c000B/soc/ovl@1400d000G/soc/rdma@1400e000M/soc/rdma@1400f000S/soc/rdma@14010000Y/soc/wdma@14011000_/soc/wdma@14012000e/soc/color@14013000l/soc/color@14014000s/soc/split@14018000z/soc/split@14019000/soc/dpi@1401d000/soc/dsi@1401b000/soc/dsi@1401c000/soc/rdma@14001000/soc/rdma@14002000/soc/rsz@14003000/soc/rsz@14004000/soc/rsz@14005000/soc/wdma@14006000/soc/wrot@14007000/soc/wrot@14008000/soc/serial@11002000/soc/serial@11003000/soc/serial@11004000/soc/serial@11005000/soc/mmc@11230000/soc/mmc@11240000/soc/mmc@11260000opp_table0operating-points-v2  opp-50700000084& xopp-702000000)׫& opp-1001000000; @&opp-1105000000A@&ehopp-1209000000H@&opp-1300000000M|m& opp-1508000000YA&opp-1703000000e&*opp_table1operating-points-v2  opp-50700000084& `opp-702000000)׫& :opp-1001000000; @&%opp-1209000000H@&@opp-1404000000SW&]opp-1612000000`+&opp-1807000000k&opp-2106000000}&*cpus+cpu-mapcluster0core04core14cluster1core04core14cpu@08cpuarm,cortex-a53DHpsciVfu cpuintermediate  cpu@18cpuarm,cortex-a53DHpsciVfu cpuintermediate  cpu@1008cpuarm,cortex-a72DHpsciVfucpuintermediate   cpu@1018cpuarm,cortex-a72DHpsciVfucpuintermediate   idle-statespscicpu-sleep-0arm,idle-state @1pmu_a53arm,cortex-a53-pmuH Spmu_a72arm,cortex-a72-pmuH  Spsci#arm,psci-1.0arm,psci-0.2arm,psciOsmcfrzoscillator0 fixed-clockclk26moscillator1 fixed-clock}clk32koscillator2 fixed-clockcpum_ckthermal-zonescpu_thermaltripstrip-point0`?passivetrip-point1?passivecpu_crit08 ?criticalcooling-mapsmap0" map1"reserved-memory+/vpu_dma_mem_region@b7000000shared-dma-poolDP6@timerarm,armv8-timer 0H   Gsoc+ simple-bus/clock-controller@10000000mediatek,mt8173-topckgenDpower-controller@10001000 mediatek,mt8173-infracfgsysconD^power-controller@10003000mediatek,mt8173-pericfgsysconD0^syscfg_pctl_a@10005000%mediatek,mt8173-pctl-a-syscfgsysconDPpinctrl@1000b000mediatek,mt8173-pinctrlDk$H%EC_INT_1V8SD_CD_LALC5514_IRQALC5650_IRQAP_FLASH_WP_LSFINSFCS0SFHOLDSFOUTSFCKWRAP_EVENT_S_EINT10PMU_INTI2S2_WS_ALC5650I2S2_BCK_ALC5650PWR_BTN_1V8DA9212_IRQIDDIGWATCHDOGCECHDMISCKHDMISDHTPLGMSDC3_DAT0MSDC3_DAT1MSDC3_DAT2MSDC3_DAT3MSDC3_CLKMSDC3_CMDUSB_C0_OC_FLAGBUSBA_OC1_LPS8640_1V2_ENABLETHERM_ALERT_NPANEL_LCD_POWER_ENANX7688_CHIP_PD_CEC_IN_RW_1V8ANX7688_1V_EN_CUSB_DP_HPD_CTPM_DAVINT_NMARVELL8897_IRQEN_USB_A0_PWRUSBA_A0_OC_LEN_PP3300_DX_EDPSOC_I2C2_1V8_SDA_400KSOC_I2C2_1V8_SCL_400KSOC_I2C0_1V8_SDA_400KSOC_I2C0_1V8_SCL_400KEMMC_ID1EMMC_ID0MEM_CONFIG3EMMC_ID2MEM_CONFIG1MEM_CONFIG2BRD_ID2MEM_CONFIG0BRD_ID0BRD_ID1EMMC_DAT0EMMC_DAT1EMMC_DAT2EMMC_DAT3EMMC_DAT4EMMC_DAT5EMMC_DAT6EMMC_DAT7EMMC_CLKEMMC_CMDEMMC_RCLKPLT_RST_LLID_OPEN_1V8_LAUDIO_SPI_MISO_RAC_OK_1V8SD_DATA0SD_DATA1SD_DATA2SD_DATA3SD_CLKSD_CMDPWRAP_SPI0_MIPWRAP_SPI0_MOPWRAP_SPI0_CKPWRAP_SPI0_CSNWIFI_PDNRTC32K_1V8DISP_PWM0TOUCHSCREEN_INT_LSRCLKENA0SRCLKENA1PS8640_MODE_CONFTOUCHSCREEN_RESET_RPLATFORM_PROCHOT_LPANEL_POWER_ENREC_MODE_LEC_FW_UPDATE_LACCEL2_INT_LHDMI_DP_INTACCELGYRO3_INT_LACCELGYRO4_INT_LSPI_EC_CLKSPI_EC_MISPI_EC_MOSPI_EC_CSNSOC_I2C3_1V8_SDA_400KSOC_I2C3_1V8_SCL_400KPS8640_SYSRSTN_1V8APIN_MAX98090_DOUT2TP_INT_1V8_L_RRST_USB_HUB_RBT_WAKE_LACCEL1_INT_LTABLET_MODE_LV_UP_IN_L_RV_DOWN_IN_L_RSOC_I2C1_1V8_SDA_1MSOC_I2C1_1V8_SCL_1MPS8640_PDN_1V8MAX98090_LRCLKMAX98090_BCLKMAX98090_MCLKAPOUT_MAX98090_DINAPIN_MAX98090_DOUTSOC_I2C4_1V8_SDA_400KSOC_I2C4_1V8_SCL_400KxxxLpins1i2c0pins1-.i2c1'pins1}~da9211_pinsi2c2(pins1+,i2c3-pins1jki2c4pins1i2c60pins1deaud_i2s2bpins1  bl_fixed_pinsWpins1 !bt_wake_pinspins1wdisp_pwm0_pinsVpins1W!gpio_keys_pinsXvolume_pins{|tablet_mode_pinsyhdmi_mux_pinspins1$pins2b,mmc0default2pins_cmd_dat$9:;<=>?@Bpins_clkApins_rstDmmc1default6pins_cmd_datIJKLN8fpins_clkM8pins_insertpins_wp*mmc3default:pins_dat8fpins_cmd8fpins_clk8mmc03pins_cmd_dat$9:;<=>?@B8epins_clkA8epins_dsC8 epins_rstDmmc17pins_cmd_datIJKLN8fpins_clkM8fmmc3;pins_dat8fpins_cmd8fpins_clk8fnor,pins1 8pins28pins_clk 8panel_fixed_pins\pins1)ps8640_pins"pins1 \sps8640_fixed_pins]pins1rt5650_irq!pins1sdio_fixed_3v3_pins^pins1U!spi1)pins1pins_spifghitrackpad_irq.pins1uusbBpins1e,wifi_wake_pinspins1&syscon@10006000sysconsimple-mfdD`Gpower-controller!mediatek,mt8173-power-controller+G1power-domain@0DUmmGpower-domain@1DUXmmvencGpower-domain@2DUmmGpower-domain@3DUmmG[power-domain@4DUi mmvencltGpower-domain@5DGpower-domain@6DGpower-domain@7Dmfg+Gmpower-domain@8D+Gpower-domain@9D G[watchdog@10007000(mediatek,mt8173-wdtmediatek,mt6589-wdtDptimer@10008000,mediatek,mt8173-timermediatek,mt6577-timerD H xpwrap@1000d000mediatek,mt8173-pwrapD{pwrap Hpwrap   spiwrapmt6397mediatek,mt6397+ H mt6397clockmediatek,mt6397-clkpinctrlmediatek,mt6397-pinctrlmt6397regulatormediatek,mt6397-regulatorbuck_vpca15 buck_vpca15vpca15 `p0 buck_vpca7 buck_vpca7vpca7 `p0-sbuck_vsramca15buck_vsramca15 vsramca15 `p0buck_vsramca7buck_vsramca7 vsramca7 `p0 buck_vcore buck_vcorevcore `p0buck_vgpu buck_vgpuvgpu `p0-sbuck_vdrm buck_vdrmvdrmO\0buck_vio18 buck_vio18vio18 6`05ldo_vtcxo ldo_vtcxovtcxoldo_va28 ldo_va28va28ldo_vcama ldo_vcamavcamaw@w@- ldo_vio28 ldo_vio28vio28ldo_vusb ldo_vusbvusbAldo_vmcldo_vmcvmcw@2Z-9ldo_vmch ldo_vmchvmch-2Z-8ldo_vemc3v3 ldo_vemc3v3 vemc_3v3-2Z-4ldo_vgp1 ldo_vgp1vcamdw@w@-ldo_vgp2 ldo_vgp2vcamio2Z2Z-$ldo_vgp3 ldo_vgp3vcamafw@w@-=ldo_vgp4 ldo_vgp4vgp4O2Z-ldo_vgp5 ldo_vgp5vgp5O--ldo_vgp6 ldo_vgp6vgp62Z2Z-/ldo_vibr ldo_vibrvibr 2Z-mt6397rtcmediatek,mt6397-rtcsyscfg_pctl_pmic@c000(mediatek,mt6397-pctl-pmic-syscfgsysconDcec@10013000mediatek,mt8173-cecD0 H Iokayvpu@10020000mediatek,mt8173-vpu D {tcmcfg_reg HgmainPFintpol-controller@10200620.mediatek,mt8173-sysirqmediatek,mt6577-sysirq D  iommu@10205000mediatek,mt8173-m4uD P Hbclk^mEefuse@10206000mediatek,mt8173-efuseD `+calib@528D( +clock-controller@10209000mediatek,mt8173-apmixedsysD hdmi-phy@10209100mediatek,mt8173-hdmi-phyD $pll_refhdmitx_dig_ctsz IokayMmailbox@10212000mediatek,mt8173-gceD!  HgceCdsi-phy@10215000mediatek,mt8173-mipi-txD!P mipi_tx0_pllIokayGdsi-phy@10216000mediatek,mt8173-mipi-txD!` mipi_tx1_pll IdisabledIinterrupt-controller@10221000 arm,gic-400 @D"" "@ "`  H auxadc@11001000mediatek,mt8173-auxadcDmain*serial@11002000*mediatek,mt8173-uartmediatek,mt6577-uartD  HS$ baudbusIokayserial@11003000*mediatek,mt8173-uartmediatek,mt6577-uartD0 HT% baudbus Idisabledserial@11004000*mediatek,mt8173-uartmediatek,mt6577-uartD@ HU& baudbus Idisabledserial@11005000*mediatek,mt8173-uartmediatek,mt6577-uartDP HV' baudbus Idisabledi2c@11007000mediatek,mt8173-i2c Dpp HL  maindmadefault+Iokay @audio-codec@1arealtek,rt5650D  Hdefault!'_edp-bridge@8parade,ps8640D 7 Gsdefault"S#`$ports+port@0Dendpointm%Hport@1Dendpointm&[i2c@11008000mediatek,mt8173-i2c Dp HM  maindmadefault'+Iokay`da9211@68 dlg,da9211Dh HregulatorsBUCKAVBUCKA `0}C#' BUCKBVBUCKB `0}-'i2c@11009000mediatek,mt8173-i2c Dp HN  maindmadefault(+Iokaytpm@20infineon,slb9645ttD spi@1100a000mediatek,mt8173-spi+D Hn4\parent-clksel-clkspi-clkIokaydefault)ec@0google,cros-ec-spiD Hi2c-tunnel0google,cros-ec-i2c-tunnel+sbs-battery@bsbs,sbs-batteryD ,keyboard-controllergoogle,cros-ec-keybAQ dD~;<=>?@A B CD}0Y1 d"#(  \V |})   + ^a !%$' & + ,./-32*5 4 9    8 l j6  g ithermal@1100b000mediatek,mt8173-thermalD HF thermauxadc*+calibration-data  spi@1100d000mediatek,mt8173-norD!rspisf+Iokaydefault,flash@0jedec,spi-norDi2c@11010000mediatek,mt8173-i2c Dp HO  maindmadefault-+Iokaytouchscreen@10elan,ekth3500D HXtouchscreen@34melfas,mip4_tsD4 HXtouchscreen@20 hid-over-i2cD   HXi2c@11011000mediatek,mt8173-i2c Dp HP  maindmadefault.+Iokaytrackpad@15elan,ekth3000 HuD /trackpad@2c hid-over-i2c HuD, i2c@11012000mediatek,mt8173-hdmi-ddc HQD ddc-i2cci2c@11013000mediatek,mt8173-i2c D0p HR#  maindmadefault0+ Idisabledaudio-controller@11220000mediatek,mt8173-afe-pcmD" H$1Pdeybinfra_sys_audio_clktop_pdn_audiotop_pdn_aud_intbusbck0bck1i2s0_mi2s1_mi2s2_mi2s3_mi2s3_b2mnBammc@11230000mediatek,mt8173-mmcD# HG_ sourcehclkIokaydefaultstate_uhs2Y3c m@ 4 &52`B& 3mmc@11240000mediatek,mt8173-mmcD$ HHR sourcehclkIokaydefaultstate_uhs6Y7c  A R _ m 8 &9 v*mmc@11250000mediatek,mt8173-mmcD% HIR sourcehclk Idisabledmmc@11260000mediatek,mt8173-mmcD& HJu sourcehclkIokaydefaultstate_uhs:Y;c  A R _    < &= 3 +btmrvl@2marvell,sd8897-btD Hw  dmwifiex@1marvell,sd8897D H& usb@11271000#mediatek,mt8173-mtu3mediatek,mtu3 D'0( {macippc H@ >?@$1 ^sys_ckref_ck +/Iokay host Ausb@11270000'mediatek,mt8173-xhcimediatek,mtk-xhciD'{mac Hs$1 ^sys_ckref_ckIokaydefaultB At-phy@11290000mediatek,mt8173-u3phyD)+/Iokayusb-phy@11290800D)refIokay>usb-phy@11290900D) refIokay?usb-phy@11291000D)refIokay@syscon@14000000mediatek,mt8173-mmsyssysconD$12U #ׄ 8CC ?CDrdma@14001000-mediatek,mt8173-mdp-rdmamediatek,mt8173-mdpDDD$1 WE ^ lFrdma@14002000mediatek,mt8173-mdp-rdmaD DD$1 WE ^rsz@14003000mediatek,mt8173-mdp-rszD0D$1rsz@14004000mediatek,mt8173-mdp-rszD@D$1rsz@14005000mediatek,mt8173-mdp-rszDPD$1wdma@14006000mediatek,mt8173-mdp-wdmaD`D $1 WE ^wrot@14007000mediatek,mt8173-mdp-wrotDpD $1 WE ^wrot@14008000mediatek,mt8173-mdp-wrotDD $1 WE ^ovl@1400c000mediatek,mt8173-disp-ovlD H$1D WE ^ ?Covl@1400d000mediatek,mt8173-disp-ovlD H$1D WE ^ ?Crdma@1400e000mediatek,mt8173-disp-rdmaD H$1D WE ^ ?Crdma@1400f000mediatek,mt8173-disp-rdmaD H$1D WE ^ ?Crdma@14010000mediatek,mt8173-disp-rdmaD H$1D WE ^ ?Cwdma@14011000mediatek,mt8173-disp-wdmaD H$1D WE ^ ?Cwdma@14012000mediatek,mt8173-disp-wdmaD  H$1D WE ^ ?C color@14013000mediatek,mt8173-disp-colorD0 H$1D ?C0color@14014000mediatek,mt8173-disp-colorD@ H$1D ?C@aal@14015000mediatek,mt8173-disp-aalDP H$1D ?CPgamma@14016000mediatek,mt8173-disp-gammaD` H$1D ?C`merge@14017000mediatek,mt8173-disp-mergeDp$1Dsplit@14018000mediatek,mt8173-disp-splitD$1Dsplit@14019000mediatek,mt8173-disp-splitD$1Dufoe@1401a000mediatek,mt8173-disp-ufoeD H$1Ddsi@1401b000mediatek,mt8173-dsiD H$1D$D%Genginedigitalhs G ydphyIokayportsportendpointmH%dsi@1401c000mediatek,mt8173-dsiD H$1D&D'Ienginedigitalhs I ydphy Idisableddpi@1401d000mediatek,mt8173-dpiD H$1D(D)pixelenginepllIokayportendpointmJNpwm@1401e0002mediatek,mt8173-disp-pwmmediatek,mt6595-disp-pwmD D!D mainmmIokayTpwm@1401f0002mediatek,mt8173-disp-pwmmediatek,mt6595-disp-pwmD D#D"mainmm Idisabledmutex@14020000mediatek,mt8173-disp-mutexD H$1D 56larb@14021000mediatek,mt8173-smi-larbD K$1DDapbsmismi@14022000mediatek,mt8173-smi-commonD $1DDapbsmiKod@14023000mediatek,mt8173-disp-odD0Dhdmi@14025000mediatek,mt8173-hdmiDP H D,D-D.D/pixelpllbclkspdifdefaultL M yhdmi D 2sBMIokay`ports+port@0DendpointmNJport@1DendpointmOdlarb@14027000mediatek,mt8173-smi-larbDp K$1D2D2apbsmiclock-controller@15000000mediatek,mt8173-imgsyssysconDPlarb@15001000mediatek,mt8173-smi-larbD K$1PPapbsmiclock-controller@16000000mediatek,mt8173-vdecsyssysconDQvcodec@16000000mediatek,mt8173-vcodec-decD 0@Phpx H ^@ WE E!E%E&E'E"E#E$ lF$1@ >lWMiNZvcodecpllunivpll_d2clk_cci400_selvdec_selvdecpllvencpllvenc_lt_selvdec_bus_clk_src(2ilW BN>M #XU/larb@16010000mediatek,mt8173-smi-larbD K$1QQapbsmiclock-controller@18000000mediatek,mt8173-vencsyssysconDRlarb@18001000mediatek,mt8173-smi-larbD K$1RRapbsmivcodec@18002000mediatek,mt8173-vcodec-encD  H ^X WE`EaEbEcEdEiEjEkElEmEn lFX venc_sel2XBMjpegdec@18004000mediatek,mt8173-jpgdecD@ HRRjpgdec-smijpgdec$1 ^ WEgEhclock-controller@19000000!mediatek,mt8173-vencltsyssysconDSlarb@19001000mediatek,mt8173-smi-larbD K$1SSapbsmivcodec@19002000mediatek,mt8173-vcodec-enc-vp8D  HH WEEEEEEEEE ^ lFi venc_lt_sel2iBNmemory@400000008memoryD@backlightpwm-backlight TB@ U _defaultVIokayZfixedregulator2regulator-fixed bl_fixedw@w@    defaultWUchosen serial0:115200n8gpio-keys gpio-keysdefaultXlid Lid AE  ) :power Power A t J :tablet_mode Tablet_mode Ay  ) :volume_down Volume_down A{ rvolume_up Volume_up A| spanel lg,lp120up1 Y \Zportendpointm[&regulator1regulator-fixed PANEL_3V32Z2Z  )default\Yregulator2regulator-fixed PS8640_1V2OO-  f default]#fixedregulator0regulator-fixed3V32Z2Z Udefault^<soundmediatek,mt8173-rt5650 x_` adefaultb codec-capture _connectorhdmi-connector hdmi?a cportendpointmdO compatibleinterrupt-parent#address-cells#size-cellsmodelovl0ovl1rdma0rdma1rdma2wdma0wdma1color0color1split0split1dpi0dsi0dsi1mdp-rdma0mdp-rdma1mdp-rsz0mdp-rsz1mdp-rsz2mdp-wdma0mdp-wrot0mdp-wrot1serial0serial1serial2serial3mmc0mmc1mmc2opp-sharedphandleopp-hzopp-microvoltcpudevice_typeregenable-methodcpu-idle-states#cooling-cellsdynamic-power-coefficientclocksclock-namesoperating-points-v2capacity-dmips-mhzproc-supplysram-supplyentry-methodlocal-timer-stopentry-latency-usexit-latency-usmin-residency-usarm,psci-suspend-paraminterruptsinterrupt-affinitycpu_suspendcpu_offcpu_on#clock-cellsclock-frequencyclock-output-namespolling-delay-passivepolling-delaythermal-sensorssustainable-powertemperaturehysteresistripcooling-devicecontributionrangesalignmentno-maparm,no-tick-in-suspend#reset-cellsmediatek,pctl-regmappins-are-numberedgpio-controller#gpio-cellsinterrupt-controller#interrupt-cellsgpio-line-namespinmuxinput-enablebias-pull-downbias-disablebias-pull-upoutput-lowoutput-highdrive-strength#power-domain-cellsmediatek,infracfgdomain-supplyreg-namesresetsreset-namesregulator-compatibleregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-allowed-modesregulator-enable-ramp-delaystatusmemory-regionmediatek,larbs#iommu-cellsmediatek,ibiasmediatek,ibias_up#phy-cells#mbox-cells#io-channel-cellsclock-divpinctrl-namespinctrl-0avdd-supplycpvdd-supply#sound-dai-cellsrealtek,dmic1-data-pinrealtek,jd-modepowerdown-gpiosreset-gpiosvdd12-supplyvdd33-supplyremote-endpointregulator-min-microampregulator-max-microamppowered-while-suspendedmediatek,pad-selectspi-max-frequencygoogle,cros-ec-spi-msg-delaygoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countkeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymap#thermal-sensor-cellsmediatek,auxadcmediatek,apmixedsysnvmem-cellsnvmem-cell-namesbank0-supplybank1-supplyhid-descr-addrvcc-supplywakeup-sourcepower-domainsassigned-clocksassigned-clock-parentspinctrl-1bus-widthcap-mmc-highspeedmmc-hs200-1_8vmmc-hs400-1_8vcap-mmc-hw-reseths400-ds-delaymediatek,hs200-cmd-int-delaymediatek,hs400-cmd-int-delaymediatek,hs400-cmd-resp-sel-risingvmmc-supplyvqmmc-supplynon-removablecap-sd-highspeedsd-uhs-sdr50sd-uhs-sdr104cd-gpioswp-gpioskeep-power-in-suspendenable-sdio-wakeupcap-sdio-irqcap-power-off-cardmarvell,wakeup-pinmarvell,wakeup-gap-msphysmediatek,syscon-wakeupdr_modevusb33-supplyassigned-clock-ratesmboxesmediatek,gce-client-regiommusmediatek,larbmediatek,vpuphy-names#pwm-cellsmediatek,gce-eventsmediatek,smimediatek,syscon-hdmipwmspower-supplyenable-gpiosstartup-delay-usenable-active-highgpiostdout-pathlabellinux,codelinux,input-typegpio-key,wakeupdebounce-intervalbacklightregulator-boot-onmediatek,audio-codecmediatek,platformmediatek,mclksound-daiddc-i2c-bus