b 8[(0[#geekbuying,geekboxrockchip,rk3368 +7GeekBoxaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff660000Q/i2c@ff140000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/serial@ff180000m/serial@ff190000u/serial@ff690000}/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/mmc@ff0f0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1core2core3 cpu@0cpuarm,cortex-a53pscicpu@1cpuarm,cortex-a53pscicpu@2cpuarm,cortex-a53pscicpu@3cpuarm,cortex-a53psci cpu@100cpuarm,cortex-a53pscicpu@101cpuarm,cortex-a53pscicpu@102cpuarm,cortex-a53pscicpu@103cpuarm,cortex-a53psciarm-pmuarm,armv8-pmuv3`pqrstuvw  psci arm,psci-0.2smctimerarm,armv8-timer0   oscillator fixed-clockn6xin24mmmc@ff0c00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @(р 6  D r v=biuciuciu-driveciu-sampleI T [reset gdisabledmmc@ff0d00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @(р 6  E s w=biuciuciu-driveciu-sampleI !T [reset gdisabledmmc@ff0f00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc@(р 6  G u y=biuciuciu-driveciu-sampleI #T [resetgokaynxр  default  saradc@ff100000rockchip,saradc $6 I [=saradcapb_pclkT W [saradc-apb gdisabledspi@ff110000(rockchip,rk3368-spirockchip,rk3066-spi6 A R=spiclkapb_pclk ,default+ gdisabledspi@ff120000(rockchip,rk3368-spirockchip,rk3066-spi6 B S=spiclkapb_pclk -default+ gdisabledspi@ff130000(rockchip,rk3368-spirockchip,rk3066-spi6 C T=spiclkapb_pclk )default+ gdisabledi2c@ff140000(rockchip,rk3368-i2crockchip,rk3288-i2c >+=i2c6 Ndefault gdisabledi2c@ff150000(rockchip,rk3368-i2crockchip,rk3288-i2c ?+=i2c6 Odefault gdisabledi2c@ff160000(rockchip,rk3368-i2crockchip,rk3288-i2c @+=i2c6 Pdefault gdisabledi2c@ff170000(rockchip,rk3368-i2crockchip,rk3288-i2c A+=i2c6 Qdefault gdisabledserial@ff180000&rockchip,rk3368-uartsnps,dw-apb-uartn66 M U=baudclkapb_pclk 7 gdisabledserial@ff190000&rockchip,rk3368-uartsnps,dw-apb-uartn66 N V=baudclkapb_pclk 8 gdisabledserial@ff1b0000&rockchip,rk3368-uartsnps,dw-apb-uartn66 P X=baudclkapb_pclk : gdisabledserial@ff1c0000&rockchip,rk3368-uartsnps,dw-apb-uartn66 Q Y=baudclkapb_pclk ; gdisableddma-controller@ff250000arm,pl330arm,primecell%@6  =apb_pclkthermal-zonescpu-thermal/dES tripscpu_alert0c$opassive!cpu_alert1c8opassive"cpu_critcso criticalcooling-mapsmap0z!0map1z"0 gpu-thermal/dES tripsgpu_alert0c8opassive#gpu_critc8o criticalcooling-mapsmap0z#0tsadc@ff280000rockchip,rk3368-tsadc( %6 H Z=tsadcapb_pclkT  [tsadc-apbinitdefaultsleep$%$sgokay ethernet@ff290000rockchip,rk3368-gmac) macirq&86  f g c ]M=stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macgokay')rgmii2input? O(default)f0ousb@ff500000 generic-ehciP 6 gokayusb@ff5800002rockchip,rk3368-usbrockchip,rk3066-usbsnps,dwc2X 6 =otgxotg@@ gokaydma-controller@ff600000arm,pl330arm,primecell`@6  =apb_pclk4i2c@ff650000(rockchip,rk3368-i2crockchip,rk3288-i2ce6 L=i2c <default*+gokaypmic@1brockchip,rk808default+, -..... . %.1.>.K xin32krk808-clkout2regulatorsDCDC_REG1Xl~ ``vdd_cpuDCDC_REG2Xl~ ``vdd_logDCDC_REG3Xlvcc_ddrDCDC_REG4Xl~2Z2Zvcc_io LDO_REG1Xl~w@w@ vcc18_flash LDO_REG2Xl~2Z2Z vcc33_lcdLDO_REG3Xl~B@B@vdd_10LDO_REG4l~w@w@vcca_18LDO_REG5Xl~w@2Z vccio_sdLDO_REG6Xl~B@B@ vdd10_lcdLDO_REG7Xl~w@w@vcc_18LDO_REG8Xl~w@w@ vcc18_lcdSWITCH_REG1vcc_sdSWITCH_REG2Xlvcc_lan'i2c@ff660000(rockchip,rk3368-i2crockchip,rk3288-i2cf =+=i2c6 Mdefault/ gdisabledpwm@ff680000(rockchip,rk3368-pwmrockchip,rk3288-pwmhdefault06 _ gdisabledpwm@ff680010(rockchip,rk3368-pwmrockchip,rk3288-pwmhdefault16 _ gdisabledpwm@ff680020(rockchip,rk3368-pwmrockchip,rk3288-pwmh 6 _ gdisabledpwm@ff680030(rockchip,rk3368-pwmrockchip,rk3288-pwmh0default26 _ gdisabledserial@ff690000&rockchip,rk3368-uartsnps,dw-apb-uarti6 O W=baudclkapb_pclk 9default3gokaymbox@ff6b0000rockchip,rk3368-mailboxk06 E =pclk_mailbox gdisabledsyscon@ff738000)rockchip,rk3368-pmugrfsysconsimple-mfds7io-domains&rockchip,rk3368-pmu-io-voltage-domain gdisabledreboot-modesyscon-reboot-modeRBRBRB RBclock-controller@ff760000rockchip,rk3368-cruv& syscon@ff770000&rockchip,rk3368-grfsysconsimple-mfdw&io-domains"rockchip,rk3368-io-voltage-domain gdisabledwatchdog@ff800000 rockchip,rk3368-wdtsnps,dw-wdt6 p Ogokaytimer@ff810000,rockchip,rk3368-timerrockchip,rk3288-timer  B6 a U =pclktimerspdif@ff880000rockchip,rk3368-spdif 66 S  =mclkhclk4#txdefault5 gdisabledi2s-2ch@ff890000(rockchip,rk3368-i2srockchip,rk3066-i2s (=i2s_clki2s_hclk6 T 44#txrx gdisabledi2s-8ch@ff898000(rockchip,rk3368-i2srockchip,rk3066-i2s 5=i2s_clki2s_hclk6 R 44#txrxdefault6 gdisablediommu@ff900800rockchip,iommu iep_mmu6  =aclkiface- gdisablediommu@ff914000rockchip,iommu @P isp_mmu6  =aclkiface-: gdisablediommu@ff930300rockchip,iommu vop_mmu6  =aclkiface- gdisablediommu@ff9a0440rockchip,iommu @@@  hevc_mmu6  =aclkiface- gdisablediommu@ff9a0800rockchip,iommu  vepu_mmuvdpu_mmu6  =aclkiface- gdisabledefuse@ffb00000rockchip,rk3368-efuse +6 q =pclk_efusecpu-leakage@17temp-adjust@1finterrupt-controller@ffb71000 arm,gic-400Uj@ @ `   pinctrlrockchip,rk3368-pinctrl&{7+gpio0@ff750000rockchip,gpio-banku6 @ QUj-gpio1@ff780000rockchip,gpio-bankx6 A RUjgpio2@ff790000rockchip,gpio-banky6 B SUj>gpio3@ff7a0000rockchip,gpio-bankz6 C TUj;pcfg-pull-up9pcfg-pull-downpcfg-pull-none8pcfg-pull-none-12ma :emmcemmc-clk8 emmc-cmd9emmc-pwr9emmc-bus19emmc-bus4@9999emmc-bus899999999gmacrgmii-pins888: : ::: :888888)rmii-pins888: : :8888i2c0i2c0-xfer 88*i2c1i2c1-xfer 88/i2c2i2c2-xfer  88i2c3i2c3-xfer 88i2c4i2c4-xfer 88i2c5i2c5-xfer 88i2si2s-8ch-bus 8 888888886pwm0pwm0-pin80pwm1pwm1-pin81pwm3pwm3-pin82sdio0sdio0-bus19sdio0-bus4@9999sdio0-cmd9sdio0-clk8sdio0-cd9sdio0-wp9sdio0-pwr9sdio0-bkpwr9sdio0-int9sdmmcsdmmc-clk 8sdmmc-cmd 9sdmmc-cd 9sdmmc-bus19sdmmc-bus4@9999spdifspdif-tx85spi0spi0-clk9spi0-cs09spi0-cs19spi0-tx9spi0-rx9spi1spi1-clk9spi1-cs09spi1-cs19spi1-rx9spi1-tx9spi2spi2-clk 9spi2-cs0 9spi2-rx 9spi2-tx 9tsadcotp-pin8$otp-out8%uart0uart0-xfer 98uart0-cts8uart0-rts8uart1uart1-xfer 98uart1-cts8uart1-rts8uart2uart2-xfer 983uart3uart3-xfer 98uart3-cts8uart3-rts8uart4uart4-xfer 98uart4-cts8uart4-rts8irir-int8<keyspwr-key8=pmicpmic-sleep8,pmic-int9+chosenserial2:115200n8memory@0memorygmac-clk fixed-clocksY@ ext_gmac(ir-receivergpio-ir-receiver ;default<gpio-keys gpio-keysdefault=power - GPIO Power tgpio-leds gpio-ledsled-0 >geekbox:blue:led"onled-1 >geekbox:red:led"offvcc-sys-regulatorregulator-fixedvcc_sys~LK@LK@Xl. compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2mmc0cpudevice_typeregenable-method#cooling-cellsphandleinterruptsinterrupt-affinityclock-frequencyclock-output-names#clock-cellsmax-frequencyclocksclock-namesfifo-depthresetsreset-namesstatusbus-widthcap-mmc-highspeednon-removablevmmc-supplyvqmmc-supplypinctrl-namespinctrl-0#io-channel-cellsreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outassigned-clocksassigned-clock-parentstx_delayrx_delaydr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-name#pwm-cells#mbox-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsdmasdma-names#iommu-cellsrockchip,disable-mmu-resetinterrupt-controller#interrupt-cellsrockchip,pmurangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsstdout-pathgpioslabellinux,codewakeup-sourcedefault-state