8( T rockchip,px30-evbrockchip,px30 +7Rockchip PX30 EVBaliases=/ethernet@ff360000G/i2c@ff180000L/i2c@ff190000Q/i2c@ff1a0000V/i2c@ff1b0000[/serial@ff030000c/serial@ff158000k/serial@ff160000s/serial@ff168000{/serial@ff170000/serial@ff178000/spi@ff1d0000/spi@ff1d8000/mmc@ff370000/mmc@ff380000/mmc@ff390000cpus+cpu@0cpuarm,cortex-a35psciZ!cpu@1cpuarm,cortex-a35psciZ!cpu@2cpuarm,cortex-a35psciZ! cpu@3cpuarm,cortex-a35psciZ! idle-states)pscicpu-sleeparm,idle-state6G^xo!cluster-sleeparm,idle-state6G^o!cpu0-opp-tableoperating-points-v2!opp-600000000#F ~~p@opp-8160000000, p@opp-1008000000< p@opp-1200000000G   p@opp-1296000000M?d ppp@arm-pmuarm,cortex-a35-pmu0defg display-subsystemrockchip,display-subsystem okayexternal-gmac-clock fixed-clock gmac_clkinpsci arm,psci-1.0smctimerarm,armv8-timer0   thermal-zonessoc-thermal(>L^ tripstrip-point-0npzpassivetrip-point-1nLzpassive!soc-critn8z criticalcooling-mapsmap0 map1 gpu-thermal(d>^ xin24m fixed-clockn6xin24m!apower-management@ff000000$rockchip,px30-pmusysconsimple-mfdpower-controllerrockchip,px30-power-controller+!cpower-domain@5<power-domain@7;power-domain@9  C@?power-domain@10 @978:power-domain@11 Kpower-domain@12 XD56power-domain@13 (3 !"power-domain@14I#syscon@ff010000'rockchip,px30-pmugrfsysconsimple-mfd+!io-domains$rockchip,px30-pmu-io-voltage-domainokay$$reboot-modesyscon-reboot-modeRBRB RBRBRBserial@ff030000$rockchip,px30-uartsnps,dw-apb-uart %%(baudclkapb_pclk4&&9txrxCMZdefault h'() disabledi2s@ff070000&rockchip,px30-i2srockchip,rk3066-i2s  (i2s_clki2s_hclk4&&9txrxZdefaulth*+,-rokayi2s@ff080000&rockchip,px30-i2srockchip,rk3066-i2s (i2s_clki2s_hclk4&&9txrxZdefaulth./01r disabledinterrupt-controller@ff131000 arm,gic-400@ @ `   !syscon@ff140000$rockchip,px30-grfsysconsimple-mfd+!6io-domains rockchip,px30-io-voltage-domainokay234$42lvdsrockchip,px30-lvds5dphy 6lvds disabledports+port@0+endpoint@0)7!endpoint@1)8!serial@ff158000$rockchip,px30-uartsnps,dw-apb-uart I(baudclkapb_pclk4&&9txrxCMZdefaulth9:okayserial@ff160000$rockchip,px30-uartsnps,dw-apb-uart J(baudclkapb_pclk4&&9txrxCMZdefaulth; disabledserial@ff168000$rockchip,px30-uartsnps,dw-apb-uart K(baudclkapb_pclk4&&9txrxCMZdefault h<=> disabledserial@ff170000$rockchip,px30-uartsnps,dw-apb-uart L(baudclkapb_pclk4&& 9txrxCMZdefault h?@A disabledserial@ff178000$rockchip,px30-uartsnps,dw-apb-uart M(baudclkapb_pclk4& & 9txrxCMZdefault hBCDokayi2c@ff180000&rockchip,px30-i2crockchip,rk3399-i2cN (i2cpclk ZdefaulthE+okaypmic@20rockchip,rk809  FZdefaulthG9Zxin32khHtHHHIIIIHregulatorsDCDC_REG1vdd_log~pq(<!regulator-state-memNf~DCDC_REG2vdd_arm~pq(<!regulator-state-memf~DCDC_REG3vcc_ddr(<regulator-state-memNDCDC_REG4vcc_3v0--(<!4regulator-state-memNf-DCDC_REG5 vcc3v3_sys2Z2Z(<!Iregulator-state-memNf2ZLDO_REG1vcc_1v0B@B@(<regulator-state-memNfB@LDO_REG2vcc_1v8w@w@(<!2regulator-state-memNfw@LDO_REG3vdd_1v0B@B@(<regulator-state-memNfB@LDO_REG4 vcc3v0_pmu--(<!$regulator-state-memNf-LDO_REG5 vccio_sdw@2Z(<!3regulator-state-memNf2ZLDO_REG6vcc_sd2Z2Z<!mregulator-state-memNf2ZLDO_REG7 vcc2v8_dvp**<regulator-state-memf*LDO_REG8 vcc1v8_dvpw@w@<regulator-state-memNfw@LDO_REG9 vcc1v5_dvp``<regulator-state-memf`SWITCH_REG1 vcc3v3_lcd<!KSWITCH_REG2 vcc5v0_host(<i2c@ff190000&rockchip,px30-i2crockchip,rk3399-i2cO (i2cpclk ZdefaulthJ+okaysensor@dasahi-kasei,ak8963  F$100010001touchscreen@14goodix,gt1151 F F F Ksensor@4c fsl,mma7660L Fi2c@ff1a0000&rockchip,px30-i2crockchip,rk3399-i2cP (i2cpclk  ZdefaulthL+ disabledi2c@ff1b0000&rockchip,px30-i2crockchip,rk3399-i2c Q (i2cpclk  ZdefaulthM+ disabledspi@ff1d0000&rockchip,px30-spirockchip,rk3066-spi $U(spiclkapb_pclk4& & 9txrxZdefaulthNOPQ+ disabledspi@ff1d8000&rockchip,px30-spirockchip,rk3066-spi %V(spiclkapb_pclk4&&9txrxZdefaulthRSTUV+ disabledwatchdog@ff1e0000rockchip,px30-wdtsnps,dw-wdt[ % disabledpwm@ff200000&rockchip,px30-pwmrockchip,rk3328-pwm "S (pwmpclkZdefaulthW disabledpwm@ff200010&rockchip,px30-pwmrockchip,rk3328-pwm "S (pwmpclkZdefaulthXokay!pwm@ff200020&rockchip,px30-pwmrockchip,rk3328-pwm "S (pwmpclkZdefaulthY disabledpwm@ff200030&rockchip,px30-pwmrockchip,rk3328-pwm 0"S (pwmpclkZdefaulthZ disabledpwm@ff208000&rockchip,px30-pwmrockchip,rk3328-pwm #T (pwmpclkZdefaulth[ disabledpwm@ff208010&rockchip,px30-pwmrockchip,rk3328-pwm #T (pwmpclkZdefaulth\ disabledpwm@ff208020&rockchip,px30-pwmrockchip,rk3328-pwm #T (pwmpclkZdefaulth] disabledpwm@ff208030&rockchip,px30-pwmrockchip,rk3328-pwm 0#T (pwmpclkZdefaulth^ disabledtimer@ff210000*rockchip,px30-timerrockchip,rk3288-timer! Y& (pclktimerdmac@ff240000arm,pl330arm,primecell$@ (apb_pclk!&tsadc@ff280000rockchip,px30-tsadc( $ ,P,X(tsadcapb_pclk. 5tsadc-apb 6AZinitdefaultsleeph_X`b_lokay! saradc@ff288000,rockchip,px30-saradcrockchip,rk3399-saradc( T-W(saradcapb_pclk. 5saradc-apbokay2!nvmem@ff290000rockchip,px30-otp)@/Za(otpapb_pclkphy.5phy+id@7cpu-leakage@17performance@1eclock-controller@ff2b0000rockchip,px30-cru+ a% (xin24mgpll 68 @IFq рр !clock-controller@ff2bc000rockchip,px30-pmucru+a(xin24m 6 %%% G!%syscon@ff2c0000,rockchip,px30-usb2phy-grfsysconsimple-mfd,+usb2phy@100rockchip,px30-usb2phy % (phyclk b usb480m_phyokay!bhost-port D linestateokay!eotg-port$BA@otg-bvalidotg-idlinestateokay!dphy@ff2e0000rockchip,px30-dsi-dphy.% E (refpclk.>5apbc okay!5usb@ff3000000rockchip,px30-usbrockchip,rk3066-usbsnps,dwc20 >(otg$otg,>M@ d usb2-phycokayusb@ff340000 generic-ehci4 <eusbcokayusb@ff350000 generic-ohci5 =eusbcokayethernet@ff360000rockchip,px30-gmac6 +macirq@>??@ACL[(stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macclk_mac_speed 6\rmiiZdefaulthfgc .^ 5stmmacethokayeoutputr4 }h  PPmmc@ff370000.rockchip,px30-dw-mshcrockchip,rk3288-dw-mshc7@ 6 ;CD(biuciuciu-driveciu-sampleрZdefaulthijklcokay *7EmQ3mmc@ff380000.rockchip,px30-dw-mshcrockchip,rk3288-dw-mshc8@ 7 8EF(biuciuciu-driveciu-sampleрZdefault hnopc okay^tq7mmc@ff390000.rockchip,px30-dw-mshcrockchip,rk3288-dw-mshc9@ 5 9GH(biuciuciu-driveciu-sampleрZdefault hrstc okaytuE4Q2nand-controller@ff3b0000rockchip,px30-nfc;@ 97(ahbnfc 7рZdefault hvwxyz{|}c  disabledopp-table2operating-points-v2!~opp-200000000 ~opp-300000000opp-400000000ׄopp-4800000008*gpu@ff400000$rockchip,px30-maliarm,mali-bifrost@@$/.- jobmmugpuIc~okay!dsi@ff450000rockchip,px30-mipi-dsiE KD(pclk5dphyc .=5apb 6+okayports+port@0+endpoint@0)!endpoint@1)!port@1endpoint)!panel@0xinpeng,xpp055c2722Kportendpoint)!vop@ff460000rockchip,px30-vop-bigF M(aclk_vopdclk_vophclk_vop.345 5axiahbdclkc okayport+! endpoint@0)!endpoint@1)!7iommu@ff460f00rockchip,iommuF M (aclkifacec okay!vop@ff470000rockchip,px30-vop-litG N(aclk_vopdclk_vophclk_vop.789 5axiahbdclkc okayport+! endpoint@0)!endpoint@1)!8iommu@ff470f00rockchip,iommuG N (aclkifacec okay!qos@ff518000rockchip,px30-qossysconQ !qos@ff520000rockchip,px30-qossysconR !#qos@ff52c000rockchip,px30-qossysconR !qos@ff538000rockchip,px30-qossysconS !qos@ff538080rockchip,px30-qossysconS !qos@ff538100rockchip,px30-qossysconS !qos@ff538180rockchip,px30-qossysconS !qos@ff540000rockchip,px30-qossysconT !qos@ff540080rockchip,px30-qossysconT !qos@ff548000rockchip,px30-qossysconT !qos@ff548080rockchip,px30-qossysconT !qos@ff548100rockchip,px30-qossysconT ! qos@ff548180rockchip,px30-qossysconT !!qos@ff548200rockchip,px30-qossysconT !"qos@ff550000rockchip,px30-qossysconU !qos@ff550080rockchip,px30-qossysconU !qos@ff550100rockchip,px30-qossysconU !qos@ff550180rockchip,px30-qossysconU !qos@ff558000rockchip,px30-qossysconU !qos@ff558080rockchip,px30-qossysconU !pinctrlrockchip,px30-pinctrl 6+gpio0@ff040000rockchip,gpio-bank % !Fgpio1@ff250000rockchip,gpio-bank% \ !gpio2@ff260000rockchip,gpio-bank& ] !hgpio3@ff270000rockchip,gpio-bank' ^ pcfg-pull-up !pcfg-pull-down !pcfg-pull-none *!pcfg-pull-none-2ma * 7pcfg-pull-up-2ma  7pcfg-pull-up-4ma  7!pcfg-pull-none-4ma * 7pcfg-pull-down-4ma  7pcfg-pull-none-8ma * 7!pcfg-pull-up-8ma  7!pcfg-pull-none-12ma * 7 !pcfg-pull-up-12ma  7 !pcfg-pull-none-smt * F!pcfg-output-high [pcfg-output-low g!pcfg-input-high  r!pcfg-input ri2c0i2c0-xfer  !Ei2c1i2c1-xfer !Ji2c2i2c2-xfer !Li2c3i2c3-xfer   !Mtsadctsadc-otp-pin !_tsadc-otp-out !`uart0uart0-xfer   !'uart0-cts  !(uart0-rts  !)uart1uart1-xfer !9uart1-cts !:uart1-rts uart2-m0uart2m0-xfer !;uart2-m1uart2m1-xfer  uart3-m0uart3m0-xfer uart3m0-cts uart3m0-rts uart3-m1uart3m1-xfer !<uart3m1-cts  !=uart3m1-rts  !>uart4uart4-xfer !?uart4-cts !@uart4-rts !Auart5uart5-xfer !Buart5-cts !Cuart5-rts !Dspi0spi0-clk !Nspi0-csn !Ospi0-miso  !Pspi0-mosi  !Qspi0-clk-hs spi0-miso-hs  spi0-mosi-hs  spi1spi1-clk !Rspi1-csn0  !Sspi1-csn1  !Tspi1-miso !Uspi1-mosi  !Vspi1-clk-hs spi1-miso-hs spi1-mosi-hs  pdmpdm-clk0m0 pdm-clk0m1 pdm-clk1 pdm-sdi0m0 pdm-sdi0m1 pdm-sdi1 pdm-sdi2 pdm-sdi3 pdm-clk0m0-sleep pdm-clk0m1-sleep pdm-clk1-sleep pdm-sdi0m0-sleep pdm-sdi0m1-sleep pdm-sdi1-sleep pdm-sdi2-sleep pdm-sdi3-sleep i2s0i2s0-8ch-mclk i2s0-8ch-sclktx i2s0-8ch-sclkrx  i2s0-8ch-lrcktx i2s0-8ch-lrckrx  i2s0-8ch-sdo0 i2s0-8ch-sdo1 i2s0-8ch-sdo2 i2s0-8ch-sdo3 i2s0-8ch-sdi0 i2s0-8ch-sdi1  i2s0-8ch-sdi2  i2s0-8ch-sdi3 i2s1i2s1-2ch-mclk i2s1-2ch-sclk !*i2s1-2ch-lrck !+i2s1-2ch-sdi !,i2s1-2ch-sdo !-i2s2i2s2-2ch-mclk i2s2-2ch-sclk !.i2s2-2ch-lrck !/i2s2-2ch-sdi !0i2s2-2ch-sdo !1sdmmcsdmmc-clk !isdmmc-cmd !jsdmmc-det !ksdmmc-bus1 sdmmc-bus4@ !lsdiosdio-clk !psdio-cmd !osdio-bus4@ !nemmcemmc-clk  !remmc-cmd  !semmc-rstnout  emmc-bus1 emmc-bus4@ emmc-bus8 !temmc-reset  !flashflash-cs0 !yflash-rdy  !{flash-dqs  !}flash-ale  !vflash-cle  !xflash-wrn  !|flash-csl flash-rdn !zflash-bus8 !wlcdclcdc-rgb-dclk-pin lcdc-rgb-m0-hsync-pin lcdc-rgb-m0-vsync-pin lcdc-rgb-m0-den-pin lcdc-rgb888-m0-data-pins      lcdc-rgb666-m0-data-pins      lcdc-rgb565-m0-data-pins      lcdc-rgb888-m1-data-pins    lcdc-rgb666-m1-data-pins    lcdc-rgb565-m1-data-pins    pwm0pwm0-pin !Wpwm1pwm1-pin !Xpwm2pwm2-pin  !Ypwm3pwm3-pin !Zpwm4pwm4-pin ![pwm5pwm5-pin !\pwm6pwm6-pin !]pwm7pwm7-pin !^gmacrmii-pins  !fmac-refclk-12ma  !gmac-refclk  cif-m0cif-clkout-m0  dvp-d2d9-m0    dvp-d0d1-m0  d10-d11-m0 cif-m1cif-clkout-m1 dvp-d2d9-m1   dvp-d0d1-m1 d10-d11-m1 ispisp-prelight headphonehp-det pmicpmic_int !Gsoc_slppin_gpio soc_slppin_slp soc_slppin_rst sdio-pwrseqwifi-enable-h !chosen serial5:115200n8adc-keys adc-keys  buttons w@ desc-key esc  0home-key home f menu-key menu  xvol-down-key volume down r vol-up-key volume up s Bhbacklightpwm-backlight a K!emmc-pwrseqmmc-pwrseq-emmchZdefault  !usdio-pwrseqmmc-pwrseq-simpleZdefaulth F!qvccsysregulator-fixed vcc5v0_sys(<LK@LK@!H compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3serial0serial1serial2serial3serial4serial5spi0spi1mmc0mmc1mmc2device_typeregenable-methodclocks#cooling-cellscpu-idle-statesdynamic-power-coefficientoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendinterruptsinterrupt-affinityportsstatusclock-frequencyclock-output-names#clock-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontribution#power-domain-cellspm_qospmuio1-supplypmuio2-supplyoffsetmode-bootloadermode-fastbootmode-loadermode-normalmode-recoveryclock-namesdmasdma-namesreg-shiftreg-io-widthpinctrl-namespinctrl-0#sound-dai-cells#interrupt-cellsinterrupt-controllervccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyphysphy-namesrockchip,grfrockchip,outputremote-endpointrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onregulator-on-in-suspendregulator-suspend-microvoltregulator-off-in-suspendgpiosvdd-supplymount-matrixirq-gpiosreset-gpiosVDDIO-supply#pwm-cellsarm,pl330-periph-burst#dma-cellsassigned-clocksassigned-clock-ratesresetsreset-namesrockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplybits#reset-cellsassigned-clock-parents#phy-cellsinterrupt-namespower-domainsdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy-modeclock_in_outphy-supplysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usbus-widthfifo-depthmax-frequencycap-mmc-highspeedcap-sd-highspeedcard-detect-delaysd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplykeep-power-in-suspendnon-removablemmc-pwrseqmmc-hs200-1_8vmali-supplybacklightiovcc-supplyvci-supplyiommus#iommu-cellsrockchip,pmurangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enableoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltpwmspower-supply