N8`( (vamrs,rock960rockchip,rk3399 +796boards Rock960aliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/serial@ff180000|/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53pscid  % 0cpu@1cpuarm,cortex-a53pscid  % 0cpu@2cpuarm,cortex-a53pscid  % 0cpu@3cpuarm,cortex-a53pscid  % 0cpu@100cpuarm,cortex-a72psci   %0cpu@101cpuarm,cortex-a72psci   %0idle-states8pscicpu-sleeparm,idle-stateEVmx~0 cluster-sleeparm,idle-stateEVm~0 display-subsystemrockchip,display-subsystempmu_a53arm,cortex-a53-pmupmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clockn6xin24mamba simple-bus+dma-controller@ff6d0000arm,pl330arm,primecellm@   apb_pclk0Tdma-controller@ff6e0000arm,pl330arm,primecelln@   apb_pclk0Cpcie@f8000000rockchip,rk3399-pcie axi-baseapb-base+0< G aclkaclk-perfhclkpm0123FsyslegacyclientV`iw ,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-388(coremgmtmgmt-stickypipepmpclkaclkokaydefault interrupt-controller0ethernet@fe300000rockchip,rk3399-gmac0 Fmacirq8ighfjfM stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac stmmaceth& disableddwmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@3р M biuciuciu-driveciu-sampleAyresetokayLVctdefault +wifi@1brcm,bcm4329-fmac  Fhost-wakedefault dwmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@A3р  L biuciuciu-driveciu-sampleAzresetokayLc ! default"#$%sdhci@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 .N N clk_xinclk_ahbemmc_cardclock& phy_arasanDokayLUd0usb@fe380000 generic-ehci8' usbhostarbiterutmi(usbokayusb@fe3a0000 generic-ohci:' usbhostarbiterutmi(usbokayusb@fe3c0000 generic-ehci<) usbhostarbiterutmi*usbokayusb@fe3e0000 generic-ohci> ) usbhostarbiterutmi*usbokayusb@fe800000rockchip,rk3399-dwc3+0G ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% usb3-otgokayusb@fe800000 snps,dwc3i refbus_earlysuspend~otg+,usb2-phyusb3-phy utmi_wideokayusb@fe900000rockchip,rk3399-dwc3+0G ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk& usb3-otgokayusb@fe900000 snps,dwc3n refbus_earlysuspend~host-.usb2-phyusb3-phy utmi_wideokaydp@fec00000rockchip,rk3399-cdn-dp r  ruo core-clkpclkspdifgrf/0 HJspdifdptxapbcore&$ disabledportsport+endpoint@0510endpoint@1520interrupt-controller@fee00000 arm,gic-v3+P  0interrupt-controller@fee20000arm,gic-v3-itsE0ppi-partitionsinterrupt-partition-0T0interrupt-partition-1T0saradc@ff100000rockchip,rk3399-saradc>]Pe saradcapb_pclk saradc-apb disabledi2c@ff110000rockchip,rk3399-i2cA AU  i2cpclk;default3+okayi2c@ff120000rockchip,rk3399-i2cB BV  i2cpclk#default4+okayi2c@ff130000rockchip,rk3399-i2cC CW  i2cpclk"default5+okay0i2c@ff140000rockchip,rk3399-i2cD DX  i2cpclk&default6+ disabledi2c@ff150000rockchip,rk3399-i2cE EY  i2cpclk%default7+ disabledi2c@ff160000rockchip,rk3399-i2cF FZ  i2cpclk$default8+ disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ` baudclkapb_pclkcoydefault 9:;okaybluetoothbrcm,bcm43438-bt<  ext_clock    default =>?serial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRa baudclkapb_pclkboydefault@ disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSb baudclkapb_pclkdoydefaultAokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTc baudclkapb_pclkeoydefaultB disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[ spiclkapb_pclkDC C txrxdefaultDEFG+okayspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\ spiclkapb_pclk5C C txrxdefaultHIJK+ disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI] spiclkapb_pclk4CCtxrxdefaultLMNO+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^ spiclkapb_pclkCCCtxrxdefaultPQRS+okayspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_ spiclkapb_pclkTT txrxdefaultUVWX+ disabledthermal-zonescpudYtripscpu_alert0passivecpu_alert1$passive0Zcpu_crits criticalcooling-mapsmap0'Z,map1'ZH,gpudYtripsgpu_alert0$passivegpu_crits criticaltsadc@ff260000rockchip,rk3399-tsadc&aO qOd tsadcapb_pclk tsadc-apb&;initdefaultsleep[R\\[fokay|0Yqos@ffa58000syscon 0dqos@ffa5c000syscon 0eqos@ffa60080syscon qos@ffa60100syscon qos@ffa60180syscon qos@ffa70000syscon 0hqos@ffa70080syscon 0iqos@ffa74000syscon@ 0fqos@ffa76000syscon` 0gqos@ffa90000syscon 0jqos@ffa98000syscon 0]qos@ffaa0000syscon 0kqos@ffaa0080syscon 0lqos@ffaa8000syscon 0mqos@ffaa8080syscon 0nqos@ffab0000syscon 0^qos@ffab0080syscon 0_qos@ffab8000syscon 0`qos@ffac0000syscon 0aqos@ffac0080syscon 0bqos@ffac8000syscon 0oqos@ffac8080syscon 0pqos@ffad0000syscon 0qqos@ffad8080syscon qos@ffae0000syscon 0cpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller+0pd_iep@34"]pd_rga@33!^_pd_vcodec@31`pd_vdu@32 abpd_gpu@35#cpd_edp@25lpd_emmc@23dpd_gmac@22fepd_sd@27Lfpd_sdioaudio@28gpd_usb3@24hipd_vio@15+pd_hdcp@21rjpd_isp0@19klpd_isp1@20mnpd_tcpc0@RK3399_PD_TCPC0~}pd_tcpc1@RK3399_PD_TCPC1 pd_vo@16+pd_vopb@17oppd_vopl@18qsyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2+0io-domains&rockchip,rk3399-pmu-io-voltage-domainokayrspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5ss spiclkapb_pclk<defaulttuvw+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7ss" baudclkapb_pclkfoydefaultx disabledi2c@ff3c0000rockchip,rk3399-i2c<s  s s  i2cpclk9defaulty+okayregulator@40silergy,syr827@ $vdd_cpu_b3 4K`cxzokay0regulator-state-memregulator@41silergy,syr828A$vdd_gpu3 4K`cxz0regulator-state-mempmic@1brockchip,rk808 {default|xin32krk808-clkout2zz zz!z-z9}EzQz^zk}xr0<regulatorsDCDC_REG1 $vdd_center3 qKpxregulator-state-memDCDC_REG2 $vdd_cpu_l3 qKpx0 regulator-state-memDCDC_REG3$vcc_ddrxregulator-state-memDCDC_REG4$vcc_1v83w@Kw@x0rregulator-state-memw@LDO_REG1 $vcc1v8_dvp3w@Kw@xregulator-state-memw@LDO_REG2 $vcca1v8_hdmi3w@Kw@xregulator-state-memw@LDO_REG3 $vcca_1v83w@Kw@xregulator-state-memw@LDO_REG4$vcc_sd3w@K2Zx0!regulator-state-mem2ZLDO_REG5 $vcc3v0_sd3-K-xregulator-state-mem-LDO_REG6$vcc_1v53`K`xregulator-state-mem`LDO_REG7 $vcca0v9_hdmi3 K xregulator-state-mem LDO_REG8$vcc_3v03-K-x0regulator-state-mem-SWITCH_REG1 $vcc3v3_s3xregulator-state-memSWITCH_REG2 $vcc3v3_s0xregulator-state-memi2c@ff3d0000rockchip,rk3399-i2c=s  s s  i2cpclk8default~+okayi2c@ff3e0000rockchip,rk3399-i2c>s  s s  i2cpclk:default+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmBdefaults pwm disabledpwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmBdefaults pwm disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB defaults pwmokaypwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0defaults pwmokayvideo-codec@ff650000rockchip,rk3399-vpue rq Fvepuvdpu  aclkhclkiommu@ff650800rockchip,iommue@sFvpu_mmu  aclkiface0iommu@ff660480rockchip,iommu f@f@u Fvdec_mmu  aclkiface disablediommu@ff670800rockchip,iommug@*Fiep_mmu  aclkiface disabledrga@ff680000rockchip,rk3399-rgah7m aclkhclksclkjgi coreaxiahb!efuse@ff690000rockchip,rk3399-efusei+}  pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cpmu-clock-controller@ff750000rockchip,rk3399-pmucruu&s(J0sclock-controller@ff760000rockchip,rk3399-cruv&@BCx@#g/;рxh<4`#Fׄׄ 0syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+0io-domains"rockchip,rk3399-io-voltage-domainokay! usb2-phy@e450rockchip,rk3399-usb2phyP{ phyclkclk_usbphy0_480mokay0'host-port  Flinestateokay '0(otg-port 0ghjFotg-bvalidotg-idlinestateokay0+usb2-phy@e460rockchip,rk3399-usb2phy`| phyclkclk_usbphy1_480mokay0)host-port  Flinestateokay '0*otg-port 0lmoFotg-bvalidotg-idlinestateokay0-phy@f780rockchip,rk3399-emmc-phy$ emmcclk okay0&pcie-phyrockchip,rk3399-pcie-phy refclk  22phyokay0phy@ff7c0000rockchip,rk3399-typec-phy|~} tcpdcoretcpdphy-ref~Luphyuphy-pipeuphy-tcphy&okaydp-port 0/usb3-port 0,phy@ff800000rockchip,rk3399-typec-phy tcpdcoretcpdphy-ref Muphyuphy-pipeuphy-tcphy&okaydp-port 00usb3-port 0.watchdog@ff848000 snps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ  pclktimerspdif@ff870000rockchip,rk3399-spdifBTtx  mclkhclkUdefault$ disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s&'TTtxrx i2s_clki2s_hclkVdefault$ disabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s(TTtxrx i2s_clki2s_hclkWdefault$ disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)TTtxrx i2s_clki2s_hclkX$okay0vop@ff8f0000rockchip,rk3399-vop-lit>wׄ aclk_vopdclk_vophclk_vop axiahbdclkokayport+0endpoint@050endpoint@150endpoint@250endpoint@350endpoint@4502iommu@ff8f3f00rockchip,iommu?w Fvopl_mmu  aclkifaceokay0vop@ff900000rockchip,rk3399-vop-big>vׄ aclk_vopdclk_vophclk_vop axiahbdclkokayport+0endpoint@050endpoint@150endpoint@250endpoint@350endpoint@4501iommu@ff903f00rockchip,iommu?v Fvopb_mmu  aclkifaceokay0iommu@ff914000rockchip,iommu @P+ Fisp0_mmu  aclkiface Fiommu@ff924000rockchip,iommu @P, Fisp1_mmu  aclkiface Fhdmi-soundsimple-audio-card ai2s z hdmi-soundokaysimple-audio-card,cpu simple-audio-card,codec hdmi@ff940000rockchip,rk3399-dw-hdmi(tqop iahbisfrvpllgrfcecy&$okay default0portsport+endpoint@050endpoint@150mipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- po refpclkphy_cfggrfapb&+ disabledports+port@0+endpoint@050endpoint@150mipi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi. qo refpclkphy_cfggrfapb&+ disabledports+port@0+endpoint@050endpoint@150edp@ff970000rockchip,rk3399-edp jlo  dppclkgrfdefaultdp& disabledports+port@0+endpoint@050endpoint@150gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 Fjobmmugpu#okay pinctrlrockchip,rk3399-pinctrl& +gpio0@ff720000rockchip,gpio-bankrs  0gpio1@ff730000rockchip,gpio-bankss  0{gpio2@ff780000rockchip,gpio-bankxP  0gpio3@ff788000rockchip,gpio-bankxQ  gpio4@ff790000rockchip,gpio-bankyR  0pcfg-pull-up 0pcfg-pull-down 0pcfg-pull-none 0pcfg-pull-none-12ma   0pcfg-pull-none-13ma   0pcfg-pull-none-18ma  0pcfg-pull-none-20ma  0pcfg-pull-up-2ma  pcfg-pull-up-8ma  0pcfg-pull-up-18ma  pcfg-pull-up-20ma  0pcfg-pull-down-4ma  pcfg-pull-down-8ma  pcfg-pull-down-12ma   pcfg-pull-down-18ma  pcfg-pull-down-20ma  pcfg-output-high .pcfg-output-low :clockclk-32k Eedpedp-hpd E0gmacrgmii-pins E    rmii-pins E     i2c0i2c0-xfer E0yi2c1i2c1-xfer E03i2c2i2c2-xfer E04i2c3i2c3-xfer E05i2c4i2c4-xfer E  0~i2c5i2c5-xfer E  06i2c6i2c6-xfer E  07i2c7i2c7-xfer E08i2c8i2c8-xfer E0i2s0i2s0-2ch-bus` Ei2s0-8ch-bus E0i2s1i2s1-2ch-busP E0sdio0sdio0-bus1 Esdio0-bus4@ E0sdio0-cmd E0sdio0-clk E0sdio0-cd Esdio0-pwr Esdio0-bkpwr Esdio0-wp Esdio0-int Esdmmcsdmmc-bus1 Esdmmc-bus4@ E   0%sdmmc-clk E 0"sdmmc-cmd E 0#sdmmc-cd E0$sdmmc-wp Esleepap-pwroff Eddrio-pwroff Espdifspdif-bus E0spdif-bus-1 Espi0spi0-clk E0Dspi0-cs0 E0Gspi0-cs1 Espi0-tx E0Espi0-rx E0Fspi1spi1-clk E 0Hspi1-cs0 E 0Kspi1-rx E0Jspi1-tx E0Ispi2spi2-clk E 0Lspi2-cs0 E 0Ospi2-rx E 0Nspi2-tx E 0Mspi3spi3-clk E0tspi3-cs0 E0wspi3-rx E0vspi3-tx E0uspi4spi4-clk E0Pspi4-cs0 E0Sspi4-rx E0Rspi4-tx E0Qspi5spi5-clk E0Uspi5-cs0 E0Xspi5-rx E0Wspi5-tx E0Vtestclktest-clkout0 Etest-clkout1 Etest-clkout2 Etsadcotp-gpio E0[otp-out E0\uart0uart0-xfer E09uart0-cts E0:uart0-rts E0;uart1uart1-xfer E  0@uart2auart2a-xfer E uart2buart2b-xfer Euart2cuart2c-xfer E0Auart3uart3-xfer E0Buart3-cts Euart3-rts Euart4uart4-xfer E0xuarthdcpuarthdcp-xfer Epwm0pwm0-pin E0pwm0-pin-pull-down Evop0-pwm-pin Evop1-pwm-pin Epwm1pwm1-pin E0pwm1-pin-pull-down Epwm2pwm2-pin E0pwm2-pin-pull-down Epwm3apwm3a-pin E0pwm3bpwm3b-pin Ehdmihdmi-i2c-xfer Ehdmi-cec E0pciepci-clkreqn-cpm E0pci-clkreqnb-cpm Epcie-drv E0btbt-enable-h E 0?bt-host-wake-l E0=bt-wake-l E0>pmicpmic-int-l E0|vsel1-gpio Evsel2-gpio Esdio-pwrseqwifi-enable-h E 0wifiwifi-host-wake-l E0 ledsuser_led1 E0user_led2 E0user_led3 E0user_led4 E0wlan_led E0bt_led E0usb2host-vbus-drv E0opp-table0operating-points-v2 S0 opp00 ^Q e 5 s@opp01 ^#F e 5opp02 ^0, e Popp03 ^< eHopp04 ^G eB@opp05 ^Tfr e*opp-table1operating-points-v2 S0 opp00 ^Q e 5 s@opp01 ^#F e 5opp02 ^0, e opp03 ^< e Yopp04 ^G e~opp05 ^Tfr eopp06 ^_" eopp07 ^kI eOopp-table2operating-points-v20opp00 ^  e 5opp01 ^@ e 5opp02 ^ׄ e opp03 ^e e Yopp04 ^#F eHopp05 ^/ esdio-pwrseqmmc-pwrseq-simple<  ext_clockdefault  0vcc12v-dcinregulator-fixed $vcc12v_dcin3Kx0vcc1v8-s0regulator-fixed $vcc1v8_s03w@Kw@x0vcc5v0-sysregulator-fixed $vcc5v0_sys3LK@KLK@x0zvcc3v3-sysregulator-fixed $vcc3v3_sys32ZK2Zxz0}vcc3v3-pcie-regulatorregulator-fixed default $vcc3v3_pcie32ZK2Z} 0vcc5v0-host-regulatorregulator-fixed default $vcc5v0_host3LK@KLK@xz 0chosen serial2:1500000n8leds gpio-ledsdefaultuser_led1 green:user1  heartbeatuser_led2 green:user2  mmc0user_led3 green:user3  mmc1user_led4 green:user4   nonewlan_active_led yellow:wlan  phy0tx offbt_active_led blue:bt  hci0-power off compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usportsinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsranges#dma-cellsclock-namesreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapphysphy-namesresetsreset-namesstatusnum-lanespinctrl-namespinctrl-0vpcie3v3-supplyep-gpiosinterrupt-controllerpower-domainsrockchip,grfmax-frequencyfifo-depthbus-widthcap-sdio-irqcap-sd-highspeedkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clocksassigned-clock-ratescap-mmc-highspeedclock-freq-min-maxcd-gpiosdisable-wpvqmmc-supplycard-detect-delayarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobedr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controlleraffinity#io-channel-cellsreg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosdmasdma-namespolling-delay-passivepolling-delaythermal-sensorssustainable-powertemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsfcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supplyregulator-off-in-suspendrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-on-in-suspendregulator-suspend-microvolt#pwm-cellsiommus#iommu-cells#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsphy-supplydrive-impedance-ohmrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplyrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowrockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsreset-gpiosenable-active-highgpiostdout-pathlabellinux,default-triggerpanic-indicatordefault-state