78t( <'firefly,firefly-rk3399rockchip,rk3399 +7Firefly-RK3399 Boardaliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/serial@ff180000|/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53pscid  % 0cpu@1cpuarm,cortex-a53pscid  % 0cpu@2cpuarm,cortex-a53pscid  % 0cpu@3cpuarm,cortex-a53pscid  % 0cpu@100cpuarm,cortex-a72psci   %0cpu@101cpuarm,cortex-a72psci   %0idle-states8pscicpu-sleeparm,idle-stateEVmx~0 cluster-sleeparm,idle-stateEVm~0 display-subsystemrockchip,display-subsystempmu_a53arm,cortex-a53-pmupmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clockn6xin24mamba simple-bus+dma-controller@ff6d0000arm,pl330arm,primecellm@   apb_pclk0Rdma-controller@ff6e0000arm,pl330arm,primecelln@   apb_pclk0Apcie@f8000000rockchip,rk3399-pcie axi-baseapb-base+0< G aclkaclk-perfhclkpm0123FsyslegacyclientV`iw ,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-388(coremgmtmgmt-stickypipepmpclkaclkokay defaultinterrupt-controller0ethernet@fe300000rockchip,rk3399-gmac0 Fmacirq8ighfjfM stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac stmmacethokay#3JinputWbrgmiidefault k{ 'P(dwmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@р M biuciuciu-driveciu-sampleyresetokay(default  !2 @/vcc1v8-s3*M/i2c@ff3c0000/pmic@1b/regulators/LDO_REG4+wifi@1brcm,bcm4329-fmac " Fhost-wakeYdefault#dwmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@Aр#m  L biuciuciu-driveciu-samplezresetokay "default $%&sdhci@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 #Nm N clk_xinclk_ahbemmc_cardclock' phy_arasanokay0usb@fe380000 generic-ehci8( usbhostarbiterutmi)usbokayusb@fe3a0000 generic-ohci:( usbhostarbiterutmi)usbokayusb@fe3c0000 generic-ehci<* usbhostarbiterutmi+usbokayusb@fe3e0000 generic-ohci> * usbhostarbiterutmi+usbokayusb@fe800000rockchip,rk3399-dwc3+0G ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% usb3-otgokayusb@fe800000 snps,dwc3i refbus_earlysuspendotg,-usb2-phyusb3-phy utmi_wide !B[|okayusb@fe900000rockchip,rk3399-dwc3+0G ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk& usb3-otgokayusb@fe900000 snps,dwc3n refbus_earlysuspendhost./usb2-phyusb3-phy utmi_wide !B[|okaydp@fec00000rockchip,rk3399-cdn-dp #rm  ruo core-clkpclkspdifgrf01 HJspdifdptxapbcore disabledportsport+endpoint@020endpoint@130interrupt-controller@fee00000 arm,gic-v3+P  0interrupt-controller@fee20000arm,gic-v3-its0ppi-partitionsinterrupt-partition-00interrupt-partition-10saradc@ff100000rockchip,rk3399-saradc>Pe saradcapb_pclk saradc-apbokay4i2c@ff110000rockchip,rk3399-i2c#Am AU  i2cpclk;default5+okay, rt5640@1crealtek,rt5640Y mclk$default60i2c@ff120000rockchip,rk3399-i2c#Bm BV  i2cpclk#default7+ disabledi2c@ff130000rockchip,rk3399-i2c#Cm CW  i2cpclk"default8+okay 0i2c@ff140000rockchip,rk3399-i2c#Dm DX  i2cpclk&default9+ disabledi2c@ff150000rockchip,rk3399-i2c#Em EY  i2cpclk%default:+ disabledi2c@ff160000rockchip,rk3399-i2c#Fm FZ  i2cpclk$default;+ disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ` baudclkapb_pclkc=Gdefault<=okayserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRa baudclkapb_pclkb=Gdefault> disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSb baudclkapb_pclkd=Gdefault?okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTc baudclkapb_pclke=Gdefault@ disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[ spiclkapb_pclkDTA A YtxrxdefaultBCDE+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\ spiclkapb_pclk5TA A YtxrxdefaultFGHI+ disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI] spiclkapb_pclk4TAAYtxrxdefaultJKLM+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^ spiclkapb_pclkCTAAYtxrxdefaultNOPQ+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_ spiclkapb_pclkTRR YtxrxdefaultSTUV+ disabledthermal-zonescpucdyWtripscpu_alert0ppassive0Xcpu_alert1$passive0Ycpu_crits criticalcooling-mapsmap0Xmap1YHgpucdyWtripsgpu_alert0$passivegpu_crits criticaltsadc@ff260000rockchip,rk3399-tsadc&a#Om qOd tsadcapb_pclk tsadc-apbsinitdefaultsleepZ[Zokay0Wqos@ffa58000syscon 0cqos@ffa5c000syscon 0dqos@ffa60080syscon qos@ffa60100syscon qos@ffa60180syscon qos@ffa70000syscon 0gqos@ffa70080syscon 0hqos@ffa74000syscon@ 0eqos@ffa76000syscon` 0fqos@ffa90000syscon 0iqos@ffa98000syscon 0\qos@ffaa0000syscon 0jqos@ffaa0080syscon 0kqos@ffaa8000syscon 0lqos@ffaa8080syscon 0mqos@ffab0000syscon 0]qos@ffab0080syscon 0^qos@ffab8000syscon 0_qos@ffac0000syscon 0`qos@ffac0080syscon 0aqos@ffac8000syscon 0nqos@ffac8080syscon 0oqos@ffad0000syscon 0pqos@ffad8080syscon qos@ffae0000syscon 0bpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller5+0pd_iep@34"I\pd_rga@33!I]^pd_vcodec@31I_pd_vdu@32 I`apd_gpu@35#Ibpd_edp@25lpd_emmc@23Icpd_gmac@22fIdpd_sd@27LIepd_sdioaudio@28Ifpd_usb3@24Ighpd_vio@15+pd_hdcp@21rIipd_isp0@19Ijkpd_isp1@20Ilmpd_tcpc0@RK3399_PD_TCPC0~}pd_tcpc1@RK3399_PD_TCPC1 pd_vo@16+pd_vopb@17Inopd_vopl@18Ipsyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2+0io-domains&rockchip,rk3399-pmu-io-voltage-domainokayPqspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5rr spiclkapb_pclk<defaultstuv+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7rr" baudclkapb_pclkf=Gdefaultw disabledi2c@ff3c0000rockchip,rk3399-i2c<#r m r r  i2cpclk9defaultx+okay pmic@1brockchip,rk808 yxin32krk808-clkout2defaultz_{{{{{{|{{{|}0regulatorsDCDC_REG1 "vdd_center1EW qopqregulator-state-memDCDC_REG2 "vdd_cpu_l1EW qopq0 regulator-state-memDCDC_REG3"vcc_ddr1Eregulator-state-memDCDC_REG4"vcc_1v81EWw@ow@0regulator-state-memw@LDO_REG1 "vcc1v8_dvp1EWw@ow@0regulator-state-memLDO_REG2 "vcc2v8_dvp1EW*o*regulator-state-memLDO_REG3 "vcc1v8_pmu1EWw@ow@0}regulator-state-memw@LDO_REG4 "vcc_sdio1EWw@o-0regulator-state-mem-LDO_REG5"vcca3v0_codec1EW-o-regulator-state-memLDO_REG6"vcc_1v51EW`o`regulator-state-mem`LDO_REG7"vcca1v8_codec1EWw@ow@0regulator-state-memLDO_REG8"vcc_3v01EW-o-0qregulator-state-mem-SWITCH_REG1 "vcc3v3_s31E0regulator-state-memSWITCH_REG2 "vcc3v3_s01Eregulator-state-memregulator@40silergy,syr827@ "vdd_cpu_bW 4o`1E {0regulator-state-memregulator@41silergy,syr828A"vdd_gpuW 4o`1E {regulator-state-memi2c@ff3d0000rockchip,rk3399-i2c=#r m r r  i2cpclk8default~+okayX accelerometer@68invensense,mpu6500h yi2c@ff3e0000rockchip,rk3399-i2c>#r m r r  i2cpclk:default+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmB defaultr pwmokay0pwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmB defaultr pwm disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB  defaultr pwmokay0pwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0 defaultr pwm disabledvideo-codec@ff650000rockchip,rk3399-vpue rq Fvepuvdpu  aclkhclk iommu@ff650800rockchip,iommue@sFvpu_mmu  aclkiface #0iommu@ff660480rockchip,iommu f@f@u Fvdec_mmu  aclkiface # disablediommu@ff670800rockchip,iommug@*Fiep_mmu  aclkiface # disabledrga@ff680000rockchip,rk3399-rgah7m aclkhclksclkjgi coreaxiahb!efuse@ff690000rockchip,rk3399-efusei+}  pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cpmu-clock-controller@ff750000rockchip,rk3399-pmucruu 0#rm(J0rclock-controller@ff760000rockchip,rk3399-cruv 0#@BCx@m#g/;рxh<4`#Fׄׄ 0syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+0io-domains"rockchip,rk3399-io-voltage-domainokay = J W dqusb2-phy@e450rockchip,rk3399-usb2phyP{ phyclkclk_usbphy0_480mokay0(host-port t FlinestateokayW0)otg-port t0ghjFotg-bvalidotg-idlinestateokay0,usb2-phy@e460rockchip,rk3399-usb2phy`| phyclkclk_usbphy1_480mokay0*host-port t FlinestateokayW0+otg-port t0lmoFotg-bvalidotg-idlinestateokay0.phy@f780rockchip,rk3399-emmc-phy$ emmcclk tokay0'pcie-phyrockchip,rk3399-pcie-phy refclk t 2phyokay0phy@ff7c0000rockchip,rk3399-typec-phy|~} tcpdcoretcpdphy-ref#~mLuphyuphy-pipeuphy-tcphyokaydp-port t00usb3-port t0-phy@ff800000rockchip,rk3399-typec-phy tcpdcoretcpdphy-ref#m Muphyuphy-pipeuphy-tcphyokaydp-port t01usb3-port t0/watchdog@ff848000 snps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ  pclktimerspdif@ff870000rockchip,rk3399-spdifBTRYtx  mclkhclkUdefault disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s'TRRYtxrx i2s_clki2s_hclkVdefaultokay  i2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s(TRRYtxrx i2s_clki2s_hclkWdefaultokay  0i2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)TRRYtxrx i2s_clki2s_hclkXokay0vop@ff8f0000rockchip,rk3399-vop-lit>w#mׄ aclk_vopdclk_vophclk_vop  axiahbdclkokayport+0endpoint@00endpoint@10endpoint@20endpoint@30endpoint@403iommu@ff8f3f00rockchip,iommu?w Fvopl_mmu  aclkiface #okay0vop@ff900000rockchip,rk3399-vop-big>v#mׄ aclk_vopdclk_vophclk_vop  axiahbdclkokayport+0endpoint@00endpoint@10endpoint@20endpoint@30endpoint@402iommu@ff903f00rockchip,iommu?v Fvopb_mmu  aclkiface #okay0iommu@ff914000rockchip,iommu @P+ Fisp0_mmu  aclkiface # iommu@ff924000rockchip,iommu @P, Fisp1_mmu  aclkiface # hdmi-soundsimple-audio-card i2s  hdmi-sound disabledsimple-audio-card,cpu -simple-audio-card,codec -hdmi@ff940000rockchip,rk3399-dw-hdmi(tqop iahbisfrvpllgrfcecGokay 7default0portsport+endpoint@00endpoint@10mipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- po refpclkphy_cfggrfapb+ disabledports+port@0+endpoint@00endpoint@10mipi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi. qo refpclkphy_cfggrfapb+ disabledports+port@0+endpoint@00endpoint@10edp@ff970000rockchip,rk3399-edp jlo  dppclkgrfdefaultdp disabledports+port@0+endpoint@00endpoint@10gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 Fjobmmugpu# disabledpinctrlrockchip,rk3399-pinctrl C+gpio0@ff720000rockchip,gpio-bankrr P `0"gpio1@ff730000rockchip,gpio-banksr P `0ygpio2@ff780000rockchip,gpio-bankxP P `0gpio3@ff788000rockchip,gpio-bankxQ P `0gpio4@ff790000rockchip,gpio-bankyR P `0pcfg-pull-up l0pcfg-pull-down y0pcfg-pull-none 0pcfg-pull-none-12ma ^ 0pcfg-pull-none-13ma ^ 0pcfg-pull-none-18ma ^pcfg-pull-none-20ma ^pcfg-pull-up-2ma l^pcfg-pull-up-8ma l^pcfg-pull-up-18ma l^pcfg-pull-up-20ma l^pcfg-pull-down-4ma y^pcfg-pull-down-8ma y^pcfg-pull-down-12ma y^ pcfg-pull-down-18ma y^pcfg-pull-down-20ma y^pcfg-output-high pcfg-output-low clockclk-32k edpedp-hpd 0gmacrgmii-pins     0rmii-pins      i2c0i2c0-xfer 0xi2c1i2c1-xfer 05i2c2i2c2-xfer 07i2c3i2c3-xfer 08i2c4i2c4-xfer   0~i2c5i2c5-xfer   09i2c6i2c6-xfer   0:i2c7i2c7-xfer 0;i2c8i2c8-xfer 0i2s0i2s0-2ch-bus` i2s0-8ch-bus 0i2s1i2s1-2ch-busP 0sdio0sdio0-bus1 sdio0-bus4@ 0sdio0-cmd 0 sdio0-clk 0!sdio0-cd sdio0-pwr sdio0-bkpwr sdio0-wp sdio0-int sdmmcsdmmc-bus1 sdmmc-bus4@    0&sdmmc-clk  0$sdmmc-cmd  0%sdmmc-cd sdmmc-wp sleepap-pwroff ddrio-pwroff spdifspdif-bus 0spdif-bus-1 spi0spi0-clk 0Bspi0-cs0 0Espi0-cs1 spi0-tx 0Cspi0-rx 0Dspi1spi1-clk  0Fspi1-cs0  0Ispi1-rx 0Hspi1-tx 0Gspi2spi2-clk  0Jspi2-cs0  0Mspi2-rx  0Lspi2-tx  0Kspi3spi3-clk 0sspi3-cs0 0vspi3-rx 0uspi3-tx 0tspi4spi4-clk 0Nspi4-cs0 0Qspi4-rx 0Pspi4-tx 0Ospi5spi5-clk 0Sspi5-cs0 0Vspi5-rx 0Uspi5-tx 0Ttestclktest-clkout0 test-clkout1 test-clkout2 tsadcotp-gpio 0Zotp-out 0[uart0uart0-xfer 0<uart0-cts 0=uart0-rts uart1uart1-xfer   0>uart2auart2a-xfer  uart2buart2b-xfer uart2cuart2c-xfer 0?uart3uart3-xfer 0@uart3-cts uart3-rts uart4uart4-xfer 0wuarthdcpuarthdcp-xfer pwm0pwm0-pin 0pwm0-pin-pull-down vop0-pwm-pin vop1-pwm-pin pwm1pwm1-pin 0pwm1-pin-pull-down pwm2pwm2-pin 0pwm2-pin-pull-down pwm3apwm3a-pin 0pwm3bpwm3b-pin hdmihdmi-i2c-xfer hdmi-cec 0pciepci-clkreqn-cpm 0pci-clkreqnb-cpm pcie-pwr-en 0pcie-3g-drv buttonspwrbtn 0lcd-panellcd-panel-reset pmicvsel1-gpio vsel2-gpio pmic-int-l 0zsdio-pwrseqwifi-enable-h 0rt5640rt5640-hpcon 06usb2vcc5v0-host-en 0wifiwifi-host-wake-l 0#ledswork_led-gpio 0diy_led-gpio 0opp-table0operating-points-v2 0 opp00 Q 5 @opp01 #F 5opp02 0, Popp03 < Hopp04 G B@opp05 Tfr *opp-table1operating-points-v2 0 opp00 Q 5 @opp01 #F 5opp02 0, opp03 < Yopp04 G ~opp05 Tfr opp06 _" opp07 kI Oopp-table2operating-points-v20opp00  5opp01 @ 5opp02 ׄ opp03 e Yopp04 #F Hopp05 / chosen serial2:1500000n8backlightpwm-backlight y  a   !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ external-gmac-clock fixed-clocksY@ clkin_gmac0dc-12vregulator-fixed"dc_12v1EWo0gpio-keys gpio-keys 4defaultpower ?d " QGPIO Key Power Wtleds gpio-ledsdefaultwork-led Qwork bon diy-led Qdiy boff " rt5640-soundsimple-audio-card rockchip,rt5640-codec i2s - pMicrophoneMic JackHeadphoneHeadphone JackH Mic JackMICBIAS1IN1PMic JackHeadphone JackHPOLHeadphone JackHPORsimple-audio-card,cpu -simple-audio-card,codec -sdio-pwrseqmmc-pwrseq-simple  ext_clockdefault " 0vcc1v8-s3regulator-fixed "vcc1v8_s31EWw@ow@ 04vcc3v3-pcie-regulatorregulator-fixed  vydefault "vcc3v3_pcie1E vcc3v3-sysregulator-fixed "vcc3v3_sys1EW2Zo2Z {0|vcc5v0-host-regulatorregulator-fixed  vydefault "vcc5v0_host1 {0vcc-sysregulator-fixed"vcc_sys1EWLK@oLK@ 0{vdd-logpwm-regulator a"vdd_log1EW 5o\ { compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usportsinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsranges#dma-cellsclock-namesreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapphysphy-namesresetsreset-namesstatusep-gpiosnum-lanespinctrl-namespinctrl-0interrupt-controllerpower-domainsrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthbus-widthcap-sdio-irqcap-sd-highspeedkeep-power-in-suspendmmc-pwrseqnon-removablenum-slotssd-uhs-sdr104vqmmc-supplyvmmc-supplybrcm,drive-strengthassigned-clock-ratescap-mmc-highspeedcd-gpiosdisable-wparasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobedr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controlleraffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsrealtek,in1-differentialreg-shiftreg-io-widthdmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supply#pwm-cellsiommus#iommu-cells#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmrockchip,playback-channelsrockchip,capture-channelsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disableoutput-highoutput-lowrockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathenable-gpiospwmsbrightness-levelsdefault-brightness-levelautorepeatdebounce-intervallabellinux,codedefault-statesimple-audio-card,widgetssimple-audio-card,routingreset-gpiosenable-active-high