988(:rockchip,rk3399-evbrockchip,rk3399google,rk3399evb-rev2 +!7Rockchip RK3399 Evaluation Boardaliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/serial@ff180000|/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53pscid cpu@1cpuarm,cortex-a53pscid cpu@2cpuarm,cortex-a53pscid cpu@3cpuarm,cortex-a53pscid cpu@100cpuarm,cortex-a72psci  cpu@101cpuarm,cortex-a72psci  idle-statespscicpu-sleeparm,idle-state&7Nx_o cluster-sleeparm,idle-state&7N_o display-subsystemrockchip,display-subsystem pmu_a53arm,cortex-a53-pmu pmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clockn6xin24mamba simple-bus+dma-controller@ff6d0000arm,pl330arm,primecellm@  apb_pclkAdma-controller@ff6e0000arm,pl330arm,primecelln@  apb_pclk0pcie@f8000000rockchip,rk3399-pcie axi-baseapb-base+ Gaclkaclk-perfhclkpm0123'syslegacyclient7`JXix ,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38؃8(coremgmtmgmt-stickypipepmpclkaclk disabled  defaultinterrupt-controllerethernet@fe300000rockchip,rk3399-gmac0 'macirq8ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac stmmacethokay+input8Crgmiidefault L\ r'P(dwmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@р Mbiuciuciu-driveciu-sampleyreset disableddwmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@Aр  Lbiuciuciu-driveciu-samplezreset disabledsdhci@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 N Nclk_xinclk_ahbemmc_cardclock phy_arasanokay!pusb@fe380000 generic-ehci8usbhostarbiterutmiusbokayusb@fe3a0000 generic-ohci:usbhostarbiterutmiusbokayusb@fe3c0000 generic-ehci<usbhostarbiterutmiusbokayusb@fe3e0000 generic-ohci> usbhostarbiterutmiusbokayusb@fe800000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% usb3-otg disabledusb@fe800000 snps,dwc3irefbus_earlysuspend/otgusb2-phyusb3-phy 7utmi_wide@Xy disabledusb@fe900000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk& usb3-otg disabledusb@fe900000 snps,dwc3nrefbus_earlysuspend/otg !usb2-phyusb3-phy 7utmi_wide@Xy disableddp@fec00000rockchip,rk3399-cdn-dp r  ruocore-clkpclkspdifgrf"# HJspdifdptxapbcore disabledportsport+endpoint@0$endpoint@1%yinterrupt-controller@fee00000 arm,gic-v3+P  interrupt-controller@fee20000arm,gic-v3-itsppi-partitionsinterrupt-partition-0 interrupt-partition-1saradc@ff100000rockchip,rk3399-saradc>Pesaradcapb_pclk saradc-apb disabledi2c@ff110000rockchip,rk3399-i2cA AU i2cpclk;default&+ disabledi2c@ff120000rockchip,rk3399-i2cB BV i2cpclk#default'+ disabledi2c@ff130000rockchip,rk3399-i2cC CW i2cpclk"default(+ disabledi2c@ff140000rockchip,rk3399-i2cD DX i2cpclk&default)+ disabledi2c@ff150000rockchip,rk3399-i2cE EY i2cpclk%default*+ disabledi2c@ff160000rockchip,rk3399-i2cF FZ i2cpclk$default++ disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclkc *default, disabledserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclkb *default- disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclkd *default.okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclke *default/ disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclkD70 0 ?@+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclk7AA `  ` ` i2cpclk:defaulth+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmBdefaulti`pwmokaypwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmBdefaultj`pwm disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB defaultk`pwmokaypwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0defaultl`pwmokayvideo-codec@ff650000rockchip,rk3399-vpue rq 'vepuvdpu aclkhclk miommu@ff650800rockchip,iommue@s'vpu_mmu aclkifacemiommu@ff660480rockchip,iommu f@f@u 'vdec_mmu aclkiface disablediommu@ff670800rockchip,iommug@*'iep_mmu aclkiface disabledrga@ff680000rockchip,rk3399-rgah7maclkhclksclkjgi coreaxiahb!efuse@ff690000rockchip,rk3399-efusei+} pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cpmu-clock-controller@ff750000rockchip,rk3399-pmucruun `(J`clock-controller@ff760000rockchip,rk3399-cruv @BCx@#g/;рxh<4`#Fׄׄ syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+io-domains"rockchip,rk3399-io-voltage-domain disabledusb2-phy@e450rockchip,rk3399-usb2phyP{phyclkclk_usbphy0_480mokayhost-port- 'linestateokay8ootg-port-0ghj'otg-bvalidotg-idlinestate disabledusb2-phy@e460rockchip,rk3399-usb2phy`|phyclkclk_usbphy1_480mokayhost-port- 'linestateokay8ootg-port-0lmo'otg-bvalidotg-idlinestate disabled phy@f780rockchip,rk3399-emmc-phy$pemmcclk-okaypcie-phyrockchip,rk3399-pcie-phyrefclk-82phy disabledphy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-ref~Luphyuphy-pipeuphy-tcphy disableddp-port-"usb3-port-phy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-ref Muphyuphy-pipeuphy-tcphy disableddp-port-#usb3-port-!watchdog@ff848000 snps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ pclktimerspdif@ff870000rockchip,rk3399-spdifB7Awׄaclk_vopdclk_vophclk_vop t axiahbdclk disabledport+ endpoint@0uendpoint@1vendpoint@2wendpoint@3xendpoint@4y%iommu@ff8f3f00rockchip,iommu?w 'vopl_mmu aclkiface disabledtvop@ff900000rockchip,rk3399-vop-big>vׄaclk_vopdclk_vophclk_vop z axiahbdclk disabledport+ endpoint@0{endpoint@1|endpoint@2}endpoint@3~endpoint@4$iommu@ff903f00rockchip,iommu?v 'vopb_mmu aclkiface disabledziommu@ff914000rockchip,iommu @P+ 'isp0_mmu aclkifaceLiommu@ff924000rockchip,iommu @P, 'isp1_mmu aclkifaceLhdmi-soundsimple-audio-cardgi2s hdmi-sound disabledsimple-audio-card,cpusimple-audio-card,codechdmi@ff940000rockchip,rk3399-dw-hdmi(tqopiahbisfrvpllgrfcec* disabledportsport+endpoint@0}endpoint@1wmipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- porefpclkphy_cfggrfapb+ disabledports+port@0+endpoint@0|endpoint@1umipi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi. qorefpclkphy_cfggrfapb+ disabledports+port@0+endpoint@0~endpoint@1xedp@ff970000rockchip,rk3399-edp jlo dppclkgrfdefaultdp disabledports+port@0+endpoint@0{endpoint@1vgpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 'jobmmugpu# disabledpinctrlrockchip,rk3399-pinctrln+gpio0@ff720000rockchip,gpio-bankr`gpio1@ff730000rockchip,gpio-banks`gpio2@ff780000rockchip,gpio-bankxPgpio3@ff788000rockchip,gpio-bankxQgpio4@ff790000rockchip,gpio-bankyRpcfg-pull-uppcfg-pull-downpcfg-pull-nonepcfg-pull-none-12ma pcfg-pull-none-13ma pcfg-pull-none-18ma pcfg-pull-none-20ma pcfg-pull-up-2ma pcfg-pull-up-8ma pcfg-pull-up-18ma pcfg-pull-up-20ma pcfg-pull-down-4ma pcfg-pull-down-8ma pcfg-pull-down-12ma pcfg-pull-down-18ma pcfg-pull-down-20ma pcfg-output-highpcfg-output-low(clockclk-32k3edpedp-hpd3gmacrgmii-pins3    rmii-pins3     i2c0i2c0-xfer 3fi2c1i2c1-xfer 3&i2c2i2c2-xfer 3'i2c3i2c3-xfer 3(i2c4i2c4-xfer 3  gi2c5i2c5-xfer 3  )i2c6i2c6-xfer 3  *i2c7i2c7-xfer 3+i2c8i2c8-xfer 3hi2s0i2s0-2ch-bus`3i2s0-8ch-bus3ri2s1i2s1-2ch-busP3ssdio0sdio0-bus13sdio0-bus4@3sdio0-cmd3sdio0-clk3sdio0-cd3sdio0-pwr3sdio0-bkpwr3sdio0-wp3sdio0-int3sdmmcsdmmc-bus13sdmmc-bus4@3   sdmmc-clk3 sdmmc-cmd3 sdmmc-cd3sdmmc-wp3sleepap-pwroff3ddrio-pwroff3spdifspdif-bus3qspdif-bus-13spi0spi0-clk31spi0-cs034spi0-cs13spi0-tx32spi0-rx33spi1spi1-clk3 5spi1-cs03 8spi1-rx37spi1-tx36spi2spi2-clk3 9spi2-cs03 <spi2-rx3 ;spi2-tx3 :spi3spi3-clk3aspi3-cs03dspi3-rx3cspi3-tx3bspi4spi4-clk3=spi4-cs03@spi4-rx3?spi4-tx3>spi5spi5-clk3Bspi5-cs03Espi5-rx3Dspi5-tx3Ctestclktest-clkout03test-clkout13test-clkout23tsadcotp-gpio3Iotp-out3Juart0uart0-xfer 3,uart0-cts3uart0-rts3uart1uart1-xfer 3  -uart2auart2a-xfer 3 uart2buart2b-xfer 3uart2cuart2c-xfer 3.uart3uart3-xfer 3/uart3-cts3uart3-rts3uart4uart4-xfer 3euarthdcpuarthdcp-xfer 3pwm0pwm0-pin3ipwm0-pin-pull-down3vop0-pwm-pin3vop1-pwm-pin3pwm1pwm1-pin3jpwm1-pin-pull-down3pwm2pwm2-pin3kpwm2-pin-pull-down3pwm3apwm3a-pin3lpwm3bpwm3b-pin3hdmihdmi-i2c-xfer 3hdmi-cec3pciepci-clkreqn-cpm3pci-clkreqnb-cpm3pmicpmic-int-l3pmic-dvs23usb2vcc5v0-host-en3backlightpwm-backlightA  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~S l yaexternal-gmac-clock fixed-clocksY@ clkin_gmacvdd-centerpwm-regulatorya ~vdd_center 5\okayvcc3v3-sysregulator-fixed ~vcc3v3_sys2Z2Zvcc5v0-sysregulator-fixed ~vcc5v0_sysLK@LK@vcc5v0-host-regulatorregulator-fixed Wdefault ~vcc5v0_hostovcc-phy-regulatorregulator-fixed~vcc_phy compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usportsinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsranges#dma-cellsclock-namesreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapphysphy-namesresetsreset-namesstatusep-gpiosnum-lanespinctrl-namespinctrl-0interrupt-controllerpower-domainsrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthassigned-clock-ratesarasan,soc-ctl-syscondisable-cqe-dcmdbus-widthmmc-hs400-1_8vmmc-hs400-enhanced-strobenon-removabledr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controlleraffinity#io-channel-cellsreg-shiftreg-io-widthdmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cells#power-domain-cellspm_qos#pwm-cellsiommus#iommu-cells#reset-cells#phy-cellsdrive-impedance-ohmrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-dairockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowrockchip,pinsbrightness-levelsdefault-brightness-levelenable-gpiospwmsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onenable-active-highvin-supply