8h( 0"nvidia,p2972-0000nvidia,tegra194 +'7NVIDIA Jetson AGX Xavier Developer Kitcbb simple-bus+=@gpio@2200000nvidia,tegra194-gpioDsecuritygpioN !HR (08@H]nethernet@24900000nvidia,tegra186-eqossnps,dwc-qos-ethernet-4.10NI R( "#!#master_busslave_busrxtxptp_refeqosokay   50 ;rgmii-idmdio+phy@0ethernet-phy-ieee802.3-c22N R4aconnect2nvidia,tegra194-aconnectnvidia,tegra210-aconnect apeapb2apeD+ = okaydma-controller@2930000*nvidia,tegra194-admanvidia,tegra186-admaN R     Rd_audiookayinterrupt-controller@2a40000*nvidia,tegra194-agicnvidia,tegra210-agic]nN  Rclkokaypinmux@2430000nvidia,tegra194-pinmuxNCp 0@okaypex_rst_c5_out$pex_rst]pex_l5_rst_n_pgg1ixclkreq_c5_bi_dir%clkreq]pex_l5_clkreq_n_pgg0ixserial@3100000)nvidia,tegra194-uartnvidia,tegra20-uartN@ Rpserialdserial disabledserial@3110000)nvidia,tegra194-uartnvidia,tegra20-uartN@ Rqserialeserialokayserial@3130000)nvidia,tegra194-uartnvidia,tegra20-uartN@ Rsserialgserial disabledserial@3140000)nvidia,tegra194-uartnvidia,tegra20-uartN@ Rtserialhserial disabledserial@3150000)nvidia,tegra194-uartnvidia,tegra20-uartN@ Ruserialiserial disabledi2c@3160000nvidia,tegra194-i2cN R+0div-clki2c disabledserial@3170000)nvidia,tegra194-uartnvidia,tegra20-uartN@ Rserialkserial disabledi2c@3180000nvidia,tegra194-i2cN R+2div-clki2c disabledi2c@3190000nvidia,tegra194-i2cN R+3div-clki2c disabledi2c@31b0000nvidia,tegra194-i2cN R+4div-clk i2c disabledi2c@31c0000nvidia,tegra194-i2cN R+5div-clk!i2cokayi2c@31e0000nvidia,tegra194-i2cN R!+7div-clk#i2c disabledpwm@3280000(nvidia,tegra194-pwmnvidia,tegra186-pwmN(ipwmDpwm disabledpwm@3290000(nvidia,tegra194-pwmnvidia,tegra186-pwmN)jpwmEpwm disabledpwm@32a0000(nvidia,tegra194-pwmnvidia,tegra186-pwmN*kpwmFpwm disabledpwm@32c0000(nvidia,tegra194-pwmnvidia,tegra186-pwmN,mpwmHpwm disabledpwm@32d0000(nvidia,tegra194-pwmnvidia,tegra186-pwmN-npwmIpwm disabledpwm@32e0000(nvidia,tegra194-pwmnvidia,tegra186-pwmN.opwmJpwm disabledpwm@32f0000(nvidia,tegra194-pwmnvidia,tegra186-pwmN/ppwmKpwm disabledsdhci@3400000,nvidia,tegra194-sdhcinvidia,tegra186-sdhciN@ R>x sdhcitmclkRsdhci>l okay sdhci@3440000,nvidia,tegra194-sdhcinvidia,tegra186-sdhciND R@z sdhcitmclkTsdhci Fz>l  disabledsdhci@3460000,nvidia,tegra194-sdhcinvidia,tegra186-sdhciNF RA{ sdhcitmclkn{~Usdhci> l   (okay)hda@3510000'nvidia,tegra194-hdanvidia,tegra30-hdaNQ R+,-hdahda2codec_2xhda2hdmihdahda2codec_2xhda2hdmiDokay5jetson-xavier-hdainterrupt-controller@3881000 arm,gic-400]n N @ `  R  cec@3960000nvidia,tegra194-cecN R cec disabledhsp@3c00000(nvidia,tegra194-hspnvidia,tegra186-hspN lRxyz{|}~IBdoorbellshared0shared1shared2shared3shared4shared5shared6shared7R0phy@3e10000nvidia,tegra194-p2uNDctl^phy@3e20000nvidia,tegra194-p2uNDctl^phy@3e30000nvidia,tegra194-p2uNDctl^ phy@3e40000nvidia,tegra194-p2uNDctl^!phy@3e50000nvidia,tegra194-p2uNDctl^"phy@3e60000nvidia,tegra194-p2uNDctl^#phy@3e70000nvidia,tegra194-p2uNDctl^phy@3e80000nvidia,tegra194-p2uNDctl^phy@3e90000nvidia,tegra194-p2uNDctl^phy@3ea0000nvidia,tegra194-p2uNDctl^phy@3eb0000nvidia,tegra194-p2uNDctl^(phy@3ec0000nvidia,tegra194-p2uNDctl^)phy@3ed0000nvidia,tegra194-p2uNDctl^*phy@3ee0000nvidia,tegra194-p2uNDctl^+phy@3ef0000nvidia,tegra194-p2uNDctl^,phy@3f00000nvidia,tegra194-p2uNDctl^-phy@3f10000nvidia,tegra194-p2uNDctl^.phy@3f20000nvidia,tegra194-p2uNDctl^/phy@3f30000nvidia,tegra194-p2uNDctl^phy@3f40000nvidia,tegra194-p2uNDctl^hsp@c150000(nvidia,tegra194-hspnvidia,tegra186-hspN  0R Bshared1shared2shared3shared4R5i2c@c240000nvidia,tegra194-i2cN $ R+1div-clki2c disabledi2c@c250000nvidia,tegra194-i2cN % R +6div-clk"i2c disabledserial@c280000)nvidia,tegra194-uartnvidia,tegra20-uartN (@ Rrserialfserial disabledserial@c290000)nvidia,tegra194-uartnvidia,tegra20-uartN )@ Rvserialjserial disabledrtc@c2a0000'nvidia,tegra194-rtcnvidia,tegra20-rtcN * RI!rtcokaygpio@c2f0000nvidia,tegra194-gpio-aonDsecuritygpioN / /0R89:;n]=pwm@c340000(nvidia,tegra194-pwmnvidia,tegra186-pwmN 4lpwmGpwmokay<pmc@c360000nvidia,tegra194-pmc(N 6 7 8 9 :Dpmcwakeaotagscratchmisc]nihost1x@13e00000"nvidia,tegra194-host1xsimple-busNDhypervisorvmR .host1xhost1x+ =display-hub@15200000#nvidia,tegra194-displaysimple-busN 81234567)miscwgrp0wgrp1wgrp2wgrp3wgrp4wgrp5UT disphubokayD+ =  display@15200000nvidia,tegra194-dcN  RVdc-dcD display@15210000nvidia,tegra194-dcN! RWdc.dcD display@15220000nvidia,tegra194-dcN" RXdc/dcD display@15230000nvidia,tegra194-dcN# Rdc0dcD vic@15340000nvidia,tegra194-vicN4 RvicqvicD dpaux@155c0000nvidia,tegra194-dpauxN\ Rb dpauxparentdpaux disabledDpinmux-aux dpaux-ioaux pinmux-i2c dpaux-ioi2cpinmux-off dpaux-iooffi2c-bus+dpaux@155d0000nvidia,tegra194-dpauxN] Rb dpauxparent dpaux disabledDpinmux-aux dpaux-ioauxpinmux-i2c dpaux-ioi2cpinmux-off dpaux-iooffi2c-bus+dpaux@155e0000nvidia,tegra194-dpauxN^ Rb dpauxparent dpauxokayDpinmux-aux dpaux-ioauxpinmux-i2c dpaux-ioi2cpinmux-off dpaux-iooffi2c-bus+dpaux@155f0000nvidia,tegra194-dpauxN_ Rb dpauxparent dpaux disabledDpinmux-aux dpaux-ioauxpinmux-i2c dpaux-ioi2cpinmux-off dpaux-iooffi2c-bus+sor@15b00000nvidia,tegra194-sorN R0~}_bsoroutparentdpsafepadWsor  auxi2coff disabledD sor@15b40000nvidia,tegra194-sorN\ R0`bsoroutparentdpsafepadXsor auxi2coff disabledD sor@15b80000nvidia,tegra194-sorN R0absoroutparentdpsafepadYsor auxi2coffokayD &b sor@15bc0000nvidia,tegra194-sorN R0cbsoroutparentdpsafepadZsor auxi2coff disabledD pcie@14100000nvidia,tegra194-pcieD@N000Dapplconfigatu_dmadbiokay+6pciBLYcorezu apbcoreR-. Bintrmsi]j }-<T=000@0p2u-0pcie@14120000nvidia,tegra194-pcieD@N222Dapplconfigatu_dmadbi disabled+6pciBLYcore{v apbcoreR/0 Bintrmsi]j }/<T=22@@0@ppcie@14140000nvidia,tegra194-pcieD@N444Dapplconfigatu_dmadbiokay+6pciBLYcore|w apbcoreR12 Bintrmsi]j }1<T=440@p2u-0pcie@14160000nvidia,tegra194-pcieD@N666Dapplconfigatu_dmadbi disabled+6pciBLYcore}x apbcoreR34 Bintrmsi]j }3<T=66@@@pcie@14180000nvidia,tegra194-pcieD@N888Dapplconfigatu_dmadbiokay+6pciBLYcoreyt apbcoreRHI Bintrmsi]j }H<T=88@@@ !"#p2u-0p2u-1p2u-2p2u-3pcie@141a0000nvidia,tegra194-pcieD@N:::Dapplconfigatu_dmadbiokay+6pciBLYdefault$%D corecore_m apbcoreR56 Bintrmsi]j }5<T=::@@@%&5' ()*+,-./0p2u-0p2u-1p2u-2p2u-3p2u-4p2u-5p2u-6p2u-7pcie_ep@14160000(nvidia,tegra194-pcie-epsnps,dw-pcie-epD@N66Dapplatu_dmadbiaddr_space disabledBETcore}x apbcore R3Bintr<pcie_ep@14180000(nvidia,tegra194-pcie-epsnps,dw-pcie-epD@N88Dapplatu_dmadbiaddr_space disabledBETcoreyt apbcore RHBintr<pcie_ep@141a0000(nvidia,tegra194-pcie-epsnps,dw-pcie-epD@N::Dapplatu_dmadbiaddr_space disabledBETdefault%core apbcore R5Bintr<sysram@40000000!nvidia,tegra194-sysrammmio-sramN@+=@shmem@4e000nvidia,tegra194-bpmp-shmemN ccpu-bpmp-txi1shmem@4f000nvidia,tegra194-bpmp-shmemN ccpu-bpmp-rxi2bpmpnvidia,tegra186-bpmp n0u12{i2cnvidia,tegra186-bpmp-i2c+okaypmic@3cmaxim,max20024N< R]ndefault3pinmux3gpio0dgpio0gpiogpio1dgpio1fps-outgpio2dgpio2fps-outgpio3dgpio3fps-outgpio4dgpio4 32k-out1gpio6dgpio6gpiogpio7dgpio7gpiofpsfps0fps1fps2regulatorsB4P4^4l4z44444sd0VDD_1V0B@B@.sd1 VDD_1V8HSw@w@.sd2 VDD_1V8LSw@w@.sd3 VDD_1V8AOw@w@.sd4 VDD_DDR_1V1.ldo0VDD_RTC 5 5.ldo2 VDD_AO_3V32Z2Z.ldo3 VDD_EMMC_3V32Z2Zldo5 VDD_USB_3V32Z2Zldo6 VDD_SDIO_3V32Z2Zldo7 VDD_CSI_1V2OOtemperature-sensor@4c ti,tmp451NL R:@Kthermalnvidia,tegra186-bpmp-thermalK6cpus+cpu@0nvidia,tegra194-carmel6cpuNapscicpu@1nvidia,tegra194-carmel6cpuNapscicpu@2nvidia,tegra194-carmel6cpuNapscicpu@3nvidia,tegra194-carmel6cpuNapscicpu@4nvidia,tegra194-carmel6cpuNapscicpu@5nvidia,tegra194-carmel6cpuNapscicpu@6nvidia,tegra194-carmel6cpuNapscicpu@7nvidia,tegra194-carmel6cpuNapscipsci arm,psci-1.0okayhsmctcunvidia,tegra194-tcun05orxtxthermal-zonescpuz6okaytripscriticalx =critical8hotp=hot9activeP=active:passiveu0=passive;cooling-mapscpu-critical 78cpu-hot 79cpu-active 7:cpu-passive 7;gpuz6okaytripscritical =criticalauxz6okaytripscritical_ =criticalpllxz6 disabledaoz6 disabledtjz6 disabledtimerarm,armv8-timer0R    $aliases/cbb/sdhci@3460000/cbb/sdhci@3400000/tcu /bpmp/i2c/cbb/i2c@3160000/cbb/i2c@c240000/cbb/i2c@3180000 /cbb/i2c@3190000 /cbb/i2c@31c0000 /cbb/i2c@c250000 /cbb/i2c@31e0000chosen console=ttyS0,115200n8 serial0:115200n8regulators simple-bus+regulator@0regulator-fixedN VIN_SYS_5V0LK@LK@.4regulator@1regulator-fixedNVDD_5V0_HDMI_CONLK@LK@ 1 ,regulator@2regulator-fixedNPEX_3V32Z2Z 1. ,&regulator@3regulator-fixedNVDD_12VOO 1.'fanpwm-fan ?< D@ S7gpio-keys gpio-keysforce-recoverycForce Recovery *0 b s ~ powercPower *=$ b st ~    compatibleinterrupt-parent#address-cells#size-cellsmodelrangesreg-namesreginterrupts#interrupt-cellsinterrupt-controller#gpio-cellsgpio-controllerphandleclocksclock-namesresetsreset-namesstatussnps,write-requestssnps,read-requestssnps,burst-mapsnps,txpblsnps,rxpblphy-reset-gpiosphy-handlephy-modepower-domains#dma-cellsnvidia,pinsnvidia,schmittnvidia,lpdrnvidia,enable-inputnvidia,io-high-voltagenvidia,tristatenvidia,pullreg-shift#pwm-cellsnvidia,pad-autocal-pull-up-offset-3v3-timeoutnvidia,pad-autocal-pull-down-offset-3v3-timeoutnvidia,pad-autocal-pull-up-offset-1v8-timeoutnvidia,pad-autocal-pull-down-offset-1v8-timeoutnvidia,pad-autocal-pull-up-offset-sdr104nvidia,pad-autocal-pull-down-offset-sdr104nvidia,default-tapnvidia,default-trimcd-gpiosnvidia,pad-autocal-pull-up-offset-1v8nvidia,pad-autocal-pull-down-offset-1v8assigned-clocksassigned-clock-parentsnvidia,pad-autocal-pull-up-offset-hs400nvidia,pad-autocal-pull-down-offset-hs400nvidia,dqs-trimsupports-cqebus-widthnon-removablevqmmc-supplyvmmc-supplynvidia,modelinterrupt-names#mbox-cells#phy-cellsnvidia,invert-interruptnvidia,outputsnvidia,headgroupsfunctionpinctrl-0pinctrl-1pinctrl-2pinctrl-namesnvidia,interfaceavdd-io-supplyvdd-pll-supplyhdmi-supplynvidia,ddc-i2c-busnvidia,hpd-gpiodevice_typenum-lanesnum-viewportlinux,pci-domaininterrupt-map-maskinterrupt-mapnvidia,bpmpsupports-clkreqnvidia,aspm-cmrt-usnvidia,aspm-pwr-on-t-usnvidia,aspm-l0s-entrance-latency-usbus-rangevddio-pex-ctl-supplyphysphy-namesvpcie3v3-supplyvpcie12v-supplynum-ib-windowsnum-ob-windowslabelpoolmboxesshmem#clock-cells#reset-cells#power-domain-cellsnvidia,bpmp-bus-idmaxim,active-fps-sourcedrive-push-pullmaxim,fps-event-sourcemaxim,shutdown-fps-time-period-usmaxim,device-state-on-disabled-eventin-sd0-supplyin-sd1-supplyin-sd2-supplyin-sd3-supplyin-sd4-supplyin-ldo0-1-supplyin-ldo2-supplyin-ldo3-5-supplyin-ldo4-6-supplyin-ldo7-8-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onvcc-supply#thermal-sensor-cellsenable-methodmbox-namesthermal-sensorspolling-delaypolling-delay-passivetemperaturehysteresiscooling-devicetripsdhci0sdhci1serial0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7bootargsstdout-pathenable-active-highpwmscooling-levels#cooling-cellslinux,input-typelinux,codedebounce-intervalwakeup-event-actionwakeup-source